1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Marvell DB-{88F6281,88F6282}-BP Development Board Setup 4*724ba675SRob Herring * 5*724ba675SRob Herring * Saeed Bishara <saeed@marvell.com> 6*724ba675SRob Herring * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 7*724ba675SRob Herring * 8*724ba675SRob Herring * This file contains the definitions that are common between the 6281 9*724ba675SRob Herring * and 6282 variants of the Marvell Kirkwood Development Board. 10*724ba675SRob Herring */ 11*724ba675SRob Herring 12*724ba675SRob Herring#include "kirkwood.dtsi" 13*724ba675SRob Herring 14*724ba675SRob Herring/ { 15*724ba675SRob Herring memory { 16*724ba675SRob Herring device_type = "memory"; 17*724ba675SRob Herring reg = <0x00000000 0x20000000>; /* 512 MB */ 18*724ba675SRob Herring }; 19*724ba675SRob Herring 20*724ba675SRob Herring chosen { 21*724ba675SRob Herring bootargs = "console=ttyS0,115200n8 earlyprintk"; 22*724ba675SRob Herring stdout-path = &uart0; 23*724ba675SRob Herring }; 24*724ba675SRob Herring 25*724ba675SRob Herring ocp@f1000000 { 26*724ba675SRob Herring pin-controller@10000 { 27*724ba675SRob Herring pmx_sdio_gpios: pmx-sdio-gpios { 28*724ba675SRob Herring marvell,pins = "mpp37", "mpp38"; 29*724ba675SRob Herring marvell,function = "gpio"; 30*724ba675SRob Herring }; 31*724ba675SRob Herring }; 32*724ba675SRob Herring 33*724ba675SRob Herring serial@12000 { 34*724ba675SRob Herring status = "okay"; 35*724ba675SRob Herring }; 36*724ba675SRob Herring 37*724ba675SRob Herring sata@80000 { 38*724ba675SRob Herring nr-ports = <2>; 39*724ba675SRob Herring status = "okay"; 40*724ba675SRob Herring }; 41*724ba675SRob Herring 42*724ba675SRob Herring ehci@50000 { 43*724ba675SRob Herring status = "okay"; 44*724ba675SRob Herring }; 45*724ba675SRob Herring 46*724ba675SRob Herring mvsdio@90000 { 47*724ba675SRob Herring pinctrl-0 = <&pmx_sdio_gpios>; 48*724ba675SRob Herring pinctrl-names = "default"; 49*724ba675SRob Herring wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; 50*724ba675SRob Herring cd-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; 51*724ba675SRob Herring status = "okay"; 52*724ba675SRob Herring }; 53*724ba675SRob Herring }; 54*724ba675SRob Herring}; 55*724ba675SRob Herring 56*724ba675SRob Herring&nand { 57*724ba675SRob Herring chip-delay = <25>; 58*724ba675SRob Herring status = "okay"; 59*724ba675SRob Herring 60*724ba675SRob Herring partition@0 { 61*724ba675SRob Herring label = "uboot"; 62*724ba675SRob Herring reg = <0x0 0x100000>; 63*724ba675SRob Herring }; 64*724ba675SRob Herring 65*724ba675SRob Herring partition@100000 { 66*724ba675SRob Herring label = "uImage"; 67*724ba675SRob Herring reg = <0x100000 0x400000>; 68*724ba675SRob Herring }; 69*724ba675SRob Herring 70*724ba675SRob Herring partition@500000 { 71*724ba675SRob Herring label = "root"; 72*724ba675SRob Herring reg = <0x500000 0x1fb00000>; 73*724ba675SRob Herring }; 74*724ba675SRob Herring}; 75*724ba675SRob Herring 76*724ba675SRob Herring&mdio { 77*724ba675SRob Herring status = "okay"; 78*724ba675SRob Herring 79*724ba675SRob Herring ethphy0: ethernet-phy@8 { 80*724ba675SRob Herring reg = <8>; 81*724ba675SRob Herring }; 82*724ba675SRob Herring}; 83*724ba675SRob Herring 84*724ba675SRob Herringð0 { 85*724ba675SRob Herring status = "okay"; 86*724ba675SRob Herring ethernet0-port@0 { 87*724ba675SRob Herring phy-handle = <ðphy0>; 88*724ba675SRob Herring }; 89*724ba675SRob Herring}; 90