xref: /linux/arch/arm/boot/dts/marvell/dove-cubox.dts (revision e7d759f31ca295d589f7420719c311870bb3166f)
1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
4#include "dove.dtsi"
5
6/ {
7	model = "SolidRun CuBox";
8	compatible = "solidrun,cubox", "marvell,dove";
9
10	memory {
11		device_type = "memory";
12		reg = <0x00000000 0x40000000>;
13	};
14
15	chosen {
16		bootargs = "console=ttyS0,115200n8 earlyprintk";
17	};
18
19	leds {
20		compatible = "gpio-leds";
21		pinctrl-0 = <&pmx_gpio_18>;
22		pinctrl-names = "default";
23
24		led-power {
25			label = "Power";
26			gpios = <&gpio0 18 1>;
27			default-state = "keep";
28		};
29	};
30
31	usb_power: regulator-1 {
32		compatible = "regulator-fixed";
33		regulator-name = "USB Power";
34		regulator-min-microvolt = <5000000>;
35		regulator-max-microvolt = <5000000>;
36		enable-active-high;
37		regulator-always-on;
38		regulator-boot-on;
39		gpio = <&gpio0 1 0>;
40		pinctrl-0 = <&pmx_gpio_1>;
41		pinctrl-names = "default";
42	};
43
44	clocks {
45		/* 25MHz reference crystal */
46		ref25: oscillator {
47			compatible = "fixed-clock";
48			#clock-cells = <0>;
49			clock-frequency = <25000000>;
50		};
51	};
52
53	ir_recv: ir-receiver {
54		compatible = "gpio-ir-receiver";
55		gpios = <&gpio0 19 1>;
56		pinctrl-0 = <&pmx_gpio_19>;
57		pinctrl-names = "default";
58	};
59
60	gpu-subsystem {
61		status = "okay";
62	};
63};
64
65&uart0 { status = "okay"; };
66&sata0 { status = "okay"; };
67&mdio { status = "okay"; };
68&eth {
69	status = "okay";
70	ethernet-port@0 {
71		phy-handle = <&ethphy>;
72	};
73};
74
75&mdio {
76	ethphy: ethernet-phy@1 {
77		compatible = "marvell,88e1310";
78		reg = <1>;
79	};
80};
81
82&gpu {
83	status = "okay";
84};
85
86&i2c0 {
87	status = "okay";
88	clock-frequency = <100000>;
89
90	si5351: clock-generator@60 {
91		compatible = "silabs,si5351a-msop";
92		reg = <0x60>;
93		#address-cells = <1>;
94		#size-cells = <0>;
95		#clock-cells = <1>;
96
97		/* connect xtal input to 25MHz reference */
98		clocks = <&ref25>;
99		clock-names = "xtal";
100
101		/* connect xtal input as source of pll0 and pll1 */
102		silabs,pll-source = <0 0>, <1 0>;
103
104		clkout0 {
105			reg = <0>;
106			silabs,drive-strength = <8>;
107			silabs,multisynth-source = <0>;
108			silabs,clock-source = <0>;
109			silabs,pll-master;
110		};
111
112		clkout2 {
113			reg = <2>;
114			silabs,drive-strength = <8>;
115			silabs,multisynth-source = <1>;
116			silabs,clock-source = <0>;
117			silabs,pll-master;
118		};
119	};
120};
121
122&sdio0 {
123	status = "okay";
124};
125
126&spi0 {
127	status = "okay";
128
129	/* spi0.0: 4M Flash Winbond W25Q32BV */
130	flash@0 {
131		compatible = "st,w25q32";
132		spi-max-frequency = <20000000>;
133		reg = <0>;
134	};
135};
136
137&audio1 {
138	status = "okay";
139	clocks = <&gate_clk 13>, <&si5351 2>;
140	clock-names = "internal", "extclk";
141	pinctrl-0 = <&pmx_audio1_i2s1_spdifo &pmx_audio1_extclk>;
142	pinctrl-names = "default";
143};
144