xref: /linux/arch/arm/boot/dts/marvell/armada-385-atl-x530.dts (revision 8c994eff8fcfe8ecb1f1dbebed25b4d7bb75be12) 
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Device Tree file for Armada 385 Allied Telesis x530/GS980MX Board.
4 (x530/AT-GS980MX)
5 *
6 Copyright (C) 2020 Allied Telesis Labs
7 */
8
9/dts-v1/;
10#include "armada-385.dtsi"
11
12#include <dt-bindings/gpio/gpio.h>
13
14/ {
15	model = "x530/AT-GS980MX";
16	compatible = "alliedtelesis,gs980mx", "alliedtelesis,x530", "marvell,armada385", "marvell,armada380";
17
18	chosen {
19		stdout-path = "serial1:115200n8";
20	};
21
22	memory {
23		device_type = "memory";
24		reg = <0x00000000 0x40000000>; /* 1GB */
25	};
26
27	soc {
28		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
29			  MBUS_ID(0x01, 0x3d) 0 0xf4800000 0x80000
30			  MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
31
32		internal-regs {
33			i2c0: i2c@11000 {
34				pinctrl-names = "default";
35				pinctrl-0 = <&i2c0_pins>;
36				status = "okay";
37			};
38
39			uart0: serial@12000 {
40				pinctrl-names = "default";
41				pinctrl-0 = <&uart0_pins>;
42				status = "okay";
43			};
44		};
45	};
46};
47
48&pciec {
49	status = "okay";
50};
51
52&pcie1 {
53	status = "okay";
54	reset-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
55	reset-delay-us = <400000>;
56};
57
58&pcie2 {
59	status = "okay";
60};
61
62&devbus_cs1 {
63	compatible = "marvell,mvebu-devbus";
64	status = "okay";
65
66	devbus,bus-width    = <8>;
67	devbus,turn-off-ps  = <60000>;
68	devbus,badr-skew-ps = <0>;
69	devbus,acc-first-ps = <124000>;
70	devbus,acc-next-ps  = <248000>;
71	devbus,rd-setup-ps  = <0>;
72	devbus,rd-hold-ps   = <0>;
73
74	/* Write parameters */
75	devbus,sync-enable = <0>;
76	devbus,wr-high-ps  = <60000>;
77	devbus,wr-low-ps   = <60000>;
78	devbus,ale-wr-ps   = <60000>;
79
80	nvs@0 {
81		status = "okay";
82
83		compatible = "mtd-ram";
84		reg = <0 0x00080000>;
85		bank-width = <1>;
86		label = "nvs";
87	};
88};
89
90&pinctrl {
91	i2c0_gpio_pins: i2c-gpio-pins-0 {
92		marvell,pins = "mpp2", "mpp3";
93		marvell,function = "gpio";
94	};
95};
96
97&i2c0 {
98	clock-frequency = <100000>;
99	status = "okay";
100
101	pinctrl-names = "default", "gpio";
102	pinctrl-0 = <&i2c0_pins>;
103	pinctrl-1 = <&i2c0_gpio_pins>;
104	scl-gpio = <&gpio0 2 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
105	sda-gpio = <&gpio0 3 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
106
107	i2c0mux: mux@71 {
108		#address-cells = <1>;
109		#size-cells = <0>;
110		compatible = "nxp,pca9544";
111		reg = <0x71>;
112		i2c-mux-idle-disconnect;
113
114		i2c@0 { /* POE devices MUX */
115			#address-cells = <1>;
116			#size-cells = <0>;
117			reg = <0>;
118		};
119
120		i2c@1 {
121			#address-cells = <1>;
122			#size-cells = <0>;
123			reg = <1>;
124
125			adt7476_2e: hwmon@2e {
126				compatible = "adi,adt7476";
127				reg = <0x2e>;
128			};
129
130			adt7476_2d: hwmon@2d {
131				compatible = "adi,adt7476";
132				reg = <0x2d>;
133			};
134		};
135
136		i2c@2 {
137			#address-cells = <1>;
138			#size-cells = <0>;
139			reg = <2>;
140
141			rtc@68 {
142				compatible = "dallas,ds1340";
143				reg = <0x68>;
144			};
145		};
146
147		i2c@3 {
148			#address-cells = <1>;
149			#size-cells = <0>;
150			reg = <3>;
151
152			gpio@20 {
153				compatible = "nxp,pca9554";
154				gpio-controller;
155				#gpio-cells = <2>;
156				reg = <0x20>;
157			};
158		};
159	};
160};
161
162&usb0 {
163	status = "okay";
164};
165
166&spi1 {
167	pinctrl-names = "default";
168	pinctrl-0 = <&spi1_pins>;
169	status = "okay";
170
171	flash@1 {
172		#address-cells = <1>;
173		#size-cells = <1>;
174		compatible = "jedec,spi-nor";
175		reg = <1>; /* Chip select 1 */
176		spi-max-frequency = <54000000>;
177
178		partitions {
179			compatible = "fixed-partitions";
180			#address-cells = <1>;
181			#size-cells = <1>;
182			partition@0 {
183				reg = <0x00000000 0x00100000>;
184				label = "u-boot";
185			};
186			partition@100000 {
187				reg = <0x00100000 0x00040000>;
188				label = "u-boot-env";
189			};
190			partition@140000 {
191				reg = <0x00140000 0x00e80000>;
192				label = "unused";
193			};
194			partition@fc0000 {
195				reg = <0x00fc0000 0x00040000>;
196				label = "idprom";
197			};
198		};
199	};
200};
201
202&nand_controller {
203	status = "okay";
204
205	nand@0 {
206		reg = <0>;
207		label = "pxa3xx_nand-0";
208		nand-rb = <0>;
209		nand-on-flash-bbt;
210		nand-ecc-strength = <4>;
211		nand-ecc-step-size = <512>;
212
213		marvell,nand-enable-arbiter;
214
215		partitions {
216			compatible = "fixed-partitions";
217			#address-cells = <1>;
218			#size-cells = <1>;
219			partition@0 {
220				reg = <0x00000000 0x0f000000>;
221				label = "user";
222			};
223			partition@f000000 {
224				/* Maximum mtdoops size is 8MB, so set to that. */
225				reg = <0x0f000000 0x00800000>;
226				label = "errlog";
227			};
228			partition@f800000 {
229				reg = <0x0f800000 0x00800000>;
230				label = "nand-bbt";
231			};
232		};
233	};
234};
235
236