1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Copyright (C) 2016 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 4 */ 5 6#include "socfpga_cyclone5.dtsi" 7#include <dt-bindings/gpio/gpio.h> 8#include <dt-bindings/input/input.h> 9 10/ { 11 model = "Altera SOCFPGA Cyclone V SoC Macnica Sodia board"; 12 compatible = "macnica,sodia", "altr,socfpga-cyclone5", "altr,socfpga"; 13 14 chosen { 15 bootargs = "earlyprintk"; 16 stdout-path = "serial0:115200n8"; 17 }; 18 19 memory@0 { 20 name = "memory"; 21 device_type = "memory"; 22 reg = <0x0 0x40000000>; 23 }; 24 25 aliases { 26 ethernet0 = &gmac1; 27 }; 28 29 regulator_3_3v: regulator { 30 compatible = "regulator-fixed"; 31 regulator-name = "3.3V"; 32 regulator-min-microvolt = <3300000>; 33 regulator-max-microvolt = <3300000>; 34 }; 35 36 leds: gpio-leds { 37 compatible = "gpio-leds"; 38 39 hps_led0 { 40 label = "hps:green:led0"; 41 gpios = <&portb 12 GPIO_ACTIVE_LOW>; 42 }; 43 44 hps_led1 { 45 label = "hps:green:led1"; 46 gpios = <&portb 13 GPIO_ACTIVE_LOW>; 47 }; 48 49 hps_led2 { 50 label = "hps:green:led2"; 51 gpios = <&portb 14 GPIO_ACTIVE_LOW>; 52 }; 53 54 hps_led3 { 55 label = "hps:green:led3"; 56 gpios = <&portb 15 GPIO_ACTIVE_LOW>; 57 }; 58 }; 59}; 60 61&gmac1 { 62 status = "okay"; 63 phy-mode = "rgmii"; 64 phy = <&phy0>; 65 66 mdio0 { 67 #address-cells = <1>; 68 #size-cells = <0>; 69 compatible = "snps,dwmac-mdio"; 70 71 phy0: ethernet-phy@4 { 72 reg = <4>; 73 rxd0-skew-ps = <0>; 74 rxd1-skew-ps = <0>; 75 rxd2-skew-ps = <0>; 76 rxd3-skew-ps = <0>; 77 rxdv-skew-ps = <0>; 78 rxc-skew-ps = <3000>; 79 txen-skew-ps = <0>; 80 txc-skew-ps = <3000>; 81 }; 82 }; 83}; 84 85&gpio1 { 86 status = "okay"; 87}; 88 89&i2c0 { 90 status = "okay"; 91 92 eeprom@51 { 93 compatible = "atmel,24c32"; 94 reg = <0x51>; 95 pagesize = <32>; 96 }; 97 98 rtc@68 { 99 compatible = "dallas,ds1339"; 100 reg = <0x68>; 101 }; 102}; 103 104&mmc0 { 105 cd-gpios = <&portb 18 0>; 106 vmmc-supply = <®ulator_3_3v>; 107 vqmmc-supply = <®ulator_3_3v>; 108 status = "okay"; 109}; 110 111&usb1 { 112 status = "okay"; 113}; 114 115&qspi { 116 status = "okay"; 117 118 flash0: flash@0 { 119 #address-cells = <1>; 120 #size-cells = <1>; 121 compatible = "micron,n25q512a", "jedec,spi-nor"; 122 reg = <0>; 123 spi-max-frequency = <100000000>; 124 125 m25p,fast-read; 126 cdns,read-delay = <4>; 127 cdns,tshsl-ns = <50>; 128 cdns,tsd2d-ns = <50>; 129 cdns,tchsh-ns = <4>; 130 cdns,tslch-ns = <4>; 131 }; 132}; 133