xref: /linux/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mcv.dtsi (revision 6e7fd890f1d6ac83805409e9c346240de2705584)
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2015 Marek Vasut <marex@denx.de>
4 */
5
6#include "socfpga_cyclone5.dtsi"
7
8/ {
9	model = "Aries/DENX MCV";
10	compatible = "altr,socfpga-cyclone5", "altr,socfpga";
11
12	memory@0 {
13		name = "memory";
14		device_type = "memory";
15		reg = <0x0 0x40000000>; /* 1 GiB */
16	};
17};
18
19&mmc0 {	/* On-SoM eMMC */
20	bus-width = <8>;
21	clk-phase-sd-hs = <0>, <135>;
22	status = "okay";
23};
24