1*724ba675SRob Herring// SPDX-License-Identifier: ISC 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Device Tree file for Intel XScale Network Processors 4*724ba675SRob Herring * in the IXP45x and IXP46x series. This series has 64 interrupts and adds a 5*724ba675SRob Herring * few more peripherals over the 42x and 43x series so this extends the 6*724ba675SRob Herring * basic IXP4xx DTSI. 7*724ba675SRob Herring */ 8*724ba675SRob Herring#include "intel-ixp4xx.dtsi" 9*724ba675SRob Herring 10*724ba675SRob Herring/ { 11*724ba675SRob Herring soc { 12*724ba675SRob Herring bus@c4000000 { 13*724ba675SRob Herring compatible = "intel,ixp46x-expansion-bus-controller", "syscon"; 14*724ba675SRob Herring /* Uses at least up to 0x124 */ 15*724ba675SRob Herring reg = <0xc4000000 0x1000>; 16*724ba675SRob Herring }; 17*724ba675SRob Herring 18*724ba675SRob Herring rng@70002100 { 19*724ba675SRob Herring compatible = "intel,ixp46x-rng"; 20*724ba675SRob Herring reg = <0x70002100 4>; 21*724ba675SRob Herring }; 22*724ba675SRob Herring 23*724ba675SRob Herring interrupt-controller@c8003000 { 24*724ba675SRob Herring compatible = "intel,ixp43x-interrupt"; 25*724ba675SRob Herring }; 26*724ba675SRob Herring 27*724ba675SRob Herring /* 28*724ba675SRob Herring * This is the USB Device Mode (UDC) controller, which is used 29*724ba675SRob Herring * to present the IXP4xx as a device on a USB bus. 30*724ba675SRob Herring */ 31*724ba675SRob Herring usb@c800b000 { 32*724ba675SRob Herring compatible = "intel,ixp4xx-udc"; 33*724ba675SRob Herring reg = <0xc800b000 0x1000>; 34*724ba675SRob Herring interrupts = <12 IRQ_TYPE_LEVEL_HIGH>; 35*724ba675SRob Herring status = "disabled"; 36*724ba675SRob Herring }; 37*724ba675SRob Herring 38*724ba675SRob Herring i2c@c8011000 { 39*724ba675SRob Herring compatible = "intel,ixp4xx-i2c"; 40*724ba675SRob Herring reg = <0xc8011000 0x18>; 41*724ba675SRob Herring interrupts = <33 IRQ_TYPE_LEVEL_HIGH>; 42*724ba675SRob Herring status = "disabled"; 43*724ba675SRob Herring }; 44*724ba675SRob Herring 45*724ba675SRob Herring /* This is known as EthB1 */ 46*724ba675SRob Herring ethernet@c800d000 { 47*724ba675SRob Herring compatible = "intel,ixp4xx-ethernet"; 48*724ba675SRob Herring reg = <0xc800d000 0x1000>; 49*724ba675SRob Herring status = "disabled"; 50*724ba675SRob Herring intel,npe = <1>; 51*724ba675SRob Herring /* Dummy values that depend on firmware */ 52*724ba675SRob Herring queue-rx = <&qmgr 0>; 53*724ba675SRob Herring queue-txready = <&qmgr 0>; 54*724ba675SRob Herring }; 55*724ba675SRob Herring 56*724ba675SRob Herring /* This is known as EthB2 */ 57*724ba675SRob Herring ethernet@c800e000 { 58*724ba675SRob Herring compatible = "intel,ixp4xx-ethernet"; 59*724ba675SRob Herring reg = <0xc800e000 0x1000>; 60*724ba675SRob Herring status = "disabled"; 61*724ba675SRob Herring intel,npe = <2>; 62*724ba675SRob Herring /* Dummy values that depend on firmware */ 63*724ba675SRob Herring queue-rx = <&qmgr 0>; 64*724ba675SRob Herring queue-txready = <&qmgr 0>; 65*724ba675SRob Herring }; 66*724ba675SRob Herring 67*724ba675SRob Herring /* This is known as EthB3 */ 68*724ba675SRob Herring ethernet@c800f000 { 69*724ba675SRob Herring compatible = "intel,ixp4xx-ethernet"; 70*724ba675SRob Herring reg = <0xc800f000 0x1000>; 71*724ba675SRob Herring status = "disabled"; 72*724ba675SRob Herring intel,npe = <3>; 73*724ba675SRob Herring /* Dummy values that depend on firmware */ 74*724ba675SRob Herring queue-rx = <&qmgr 0>; 75*724ba675SRob Herring queue-txready = <&qmgr 0>; 76*724ba675SRob Herring }; 77*724ba675SRob Herring 78*724ba675SRob Herring ptp-timer@c8010000 { 79*724ba675SRob Herring compatible = "intel,ixp46x-ptp-timer"; 80*724ba675SRob Herring reg = <0xc8010000 0x1000>; 81*724ba675SRob Herring interrupt-parent = <&gpio0>; 82*724ba675SRob Herring interrupts = <8 IRQ_TYPE_EDGE_FALLING>, <7 IRQ_TYPE_EDGE_FALLING>; 83*724ba675SRob Herring interrupt-names = "master", "slave"; 84*724ba675SRob Herring }; 85*724ba675SRob Herring }; 86*724ba675SRob Herring}; 87