xref: /linux/arch/arm/boot/dts/intel/ixp/intel-ixp42x-welltech-epbx100.dts (revision 6e7fd890f1d6ac83805409e9c346240de2705584)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2021 Corentin Labbe <clabbe@baylibre.com>
4 */
5
6/dts-v1/;
7
8#include "intel-ixp42x.dtsi"
9
10/ {
11	model = "Welltech EPBX100";
12	compatible = "welltech,epbx100", "intel,ixp42x";
13	#address-cells = <1>;
14	#size-cells = <1>;
15
16	memory@0 {
17		/* 64 MB SDRAM */
18		device_type = "memory";
19		reg = <0x00000000 0x4000000>;
20	};
21
22	chosen {
23		bootargs = "console=ttyS0,115200n8 root=/dev/ram0 initrd=0x00800000,9M";
24		stdout-path = "uart0:115200n8";
25	};
26
27	aliases {
28		serial0 = &uart0;
29	};
30
31	soc {
32		bus@c4000000 {
33			flash@0,0 {
34				compatible = "intel,ixp4xx-flash", "cfi-flash";
35				bank-width = <2>;
36				/*
37				 * 16 MB of Flash
38				 */
39				reg = <0 0x00000000 0x1000000>;
40
41				partitions {
42					compatible = "fixed-partitions";
43					#address-cells = <1>;
44					#size-cells = <1>;
45
46					partition@0 {
47						label = "RedBoot";
48						reg = <0x00000000 0x00080000>;
49						read-only;
50					};
51					partition@80000 {
52						label = "zImage";
53						reg = <0x00080000 0x00100000>;
54						read-only;
55					};
56					partition@180000 {
57						label = "ramdisk";
58						reg = <0x00180000 0x00300000>;
59						read-only;
60					};
61					partition@480000 {
62						label = "User";
63						reg = <0x00480000 0x00b60000>;
64						read-only;
65					};
66					partition@fe0000 {
67						label = "FIS directory";
68						reg = <0x00fe0000 0x001f000>;
69						read-only;
70					};
71					partition@fff000 {
72						label = "RedBoot config";
73						reg = <0x00fff000 0x0001000>;
74						read-only;
75					};
76				};
77			};
78		};
79
80		/* LAN port */
81		ethernet@c8009000 {
82			status = "okay";
83			queue-rx = <&qmgr 3>;
84			queue-txready = <&qmgr 20>;
85			phy-mode = "rgmii";
86			phy-handle = <&phy5>;
87
88			mdio {
89				#address-cells = <1>;
90				#size-cells = <0>;
91
92				phy5: ethernet-phy@5 {
93					reg = <5>;
94				};
95			};
96		};
97	};
98};
99