1// SPDX-License-Identifier: ISC 2/* 3 * Device Tree file for Gateway 7001 AP based on IXP422 4 * Derived from boardfiles written by Imre Kaloz 5 */ 6 7/dts-v1/; 8 9#include "intel-ixp42x.dtsi" 10#include <dt-bindings/input/input.h> 11 12/ { 13 model = "Gateway 7001 AP"; 14 compatible = "gateway,7001", "intel,ixp42x"; 15 #address-cells = <1>; 16 #size-cells = <1>; 17 18 memory@0 { 19 /* 32 MB SDRAM */ 20 device_type = "memory"; 21 reg = <0x00000000 0x2000000>; 22 }; 23 24 chosen { 25 bootargs = "console=ttyS0,115200n8"; 26 stdout-path = "uart1:115200n8"; 27 }; 28 29 aliases { 30 /* second UART is the primary console */ 31 serial0 = &uart1; 32 }; 33 34 soc { 35 bus@c4000000 { 36 flash@0,0 { 37 compatible = "intel,ixp4xx-flash", "cfi-flash"; 38 bank-width = <2>; 39 /* 40 * 8 MB of flash 41 */ 42 reg = <0 0x00000000 0x800000>; 43 44 /* Configure expansion bus to allow writes */ 45 intel,ixp4xx-eb-write-enable = <1>; 46 47 partitions { 48 compatible = "redboot-fis"; 49 /* Eraseblock at 0x7e0000 */ 50 fis-index-block = <0x3f>; 51 }; 52 }; 53 }; 54 55 pci@c0000000 { 56 status = "okay"; 57 58 /* 59 * Taken from Gateway 7001 PCI boardfile (gateway7001-pci.c) 60 * We have slots (IDSEL) 1 and 2 with one assigned IRQ 61 * each handling all IRQs. 62 */ 63 #interrupt-cells = <1>; 64 interrupt-map-mask = <0xf800 0 0 7>; 65 interrupt-map = 66 /* IDSEL 1 */ 67 <0x0800 0 0 1 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 1 is irq 11 */ 68 <0x0800 0 0 2 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 1 is irq 11 */ 69 <0x0800 0 0 3 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 1 is irq 11 */ 70 <0x0800 0 0 4 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT D on slot 1 is irq 11 */ 71 /* IDSEL 2 */ 72 <0x1000 0 0 1 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 2 is irq 10 */ 73 <0x1000 0 0 2 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 2 is irq 10 */ 74 <0x1000 0 0 3 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 2 is irq 10 */ 75 <0x1000 0 0 4 &gpio0 10 IRQ_TYPE_LEVEL_LOW>; /* INT D on slot 2 is irq 10 */ 76 }; 77 78 ethernet@c8009000 { 79 status = "okay"; 80 queue-rx = <&qmgr 3>; 81 queue-txready = <&qmgr 20>; 82 phy-mode = "rgmii"; 83 phy-handle = <&phy1>; 84 85 mdio { 86 #address-cells = <1>; 87 #size-cells = <0>; 88 89 phy1: ethernet-phy@1 { 90 reg = <1>; 91 }; 92 }; 93 }; 94 95 ethernet@c800a000 { 96 status = "okay"; 97 queue-rx = <&qmgr 4>; 98 queue-txready = <&qmgr 21>; 99 phy-mode = "rgmii"; 100 phy-handle = <&phy2>; 101 102 mdio { 103 #address-cells = <1>; 104 #size-cells = <0>; 105 106 phy2: ethernet-phy@2 { 107 reg = <2>; 108 }; 109 }; 110 }; 111 }; 112}; 113