xref: /linux/arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr.dtsi (revision ec2e0fb07d789976c601bec19ecced7a501c3705)
1*85ac6b80SLinus Walleij// SPDX-License-Identifier: ISC
2*85ac6b80SLinus Walleij/*
3*85ac6b80SLinus Walleij * Device Tree file for the IXP425-based Actiontec MI424WR
4*85ac6b80SLinus Walleij * Based on a board file from OpenWrt by Jose Vasconcellos.
5*85ac6b80SLinus Walleij */
6*85ac6b80SLinus Walleij
7*85ac6b80SLinus Walleij#include "intel-ixp42x.dtsi"
8*85ac6b80SLinus Walleij#include <dt-bindings/input/input.h>
9*85ac6b80SLinus Walleij#include <dt-bindings/leds/common.h>
10*85ac6b80SLinus Walleij
11*85ac6b80SLinus Walleij/ {
12*85ac6b80SLinus Walleij	#address-cells = <1>;
13*85ac6b80SLinus Walleij	#size-cells = <1>;
14*85ac6b80SLinus Walleij
15*85ac6b80SLinus Walleij	memory@0 {
16*85ac6b80SLinus Walleij		device_type = "memory";
17*85ac6b80SLinus Walleij		reg = <0x00000000 0x02000000>;
18*85ac6b80SLinus Walleij	};
19*85ac6b80SLinus Walleij
20*85ac6b80SLinus Walleij	chosen {
21*85ac6b80SLinus Walleij		bootargs = "console=ttyS0,115200n8";
22*85ac6b80SLinus Walleij		stdout-path = "uart1:115200n8";
23*85ac6b80SLinus Walleij	};
24*85ac6b80SLinus Walleij
25*85ac6b80SLinus Walleij	leds {
26*85ac6b80SLinus Walleij		compatible = "gpio-leds";
27*85ac6b80SLinus Walleij
28*85ac6b80SLinus Walleij		led-wan-coax {
29*85ac6b80SLinus Walleij			color = <LED_COLOR_ID_GREEN>;
30*85ac6b80SLinus Walleij			function = "wan-coax";
31*85ac6b80SLinus Walleij			gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
32*85ac6b80SLinus Walleij			default-state = "off";
33*85ac6b80SLinus Walleij		};
34*85ac6b80SLinus Walleij		led-power-alarm {
35*85ac6b80SLinus Walleij			color = <LED_COLOR_ID_RED>;
36*85ac6b80SLinus Walleij			function = LED_FUNCTION_ALARM;
37*85ac6b80SLinus Walleij			gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
38*85ac6b80SLinus Walleij			default-state = "off";
39*85ac6b80SLinus Walleij		};
40*85ac6b80SLinus Walleij		led-power {
41*85ac6b80SLinus Walleij			color = <LED_COLOR_ID_GREEN>;
42*85ac6b80SLinus Walleij			function = LED_FUNCTION_POWER;
43*85ac6b80SLinus Walleij			gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
44*85ac6b80SLinus Walleij			default-state = "on";
45*85ac6b80SLinus Walleij			linux,default-trigger = "heartbeat";
46*85ac6b80SLinus Walleij		};
47*85ac6b80SLinus Walleij		led-wireless {
48*85ac6b80SLinus Walleij			color = <LED_COLOR_ID_GREEN>;
49*85ac6b80SLinus Walleij			function = LED_FUNCTION_WLAN;
50*85ac6b80SLinus Walleij			gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
51*85ac6b80SLinus Walleij			default-state = "off";
52*85ac6b80SLinus Walleij		};
53*85ac6b80SLinus Walleij		led-internet-down {
54*85ac6b80SLinus Walleij			color = <LED_COLOR_ID_RED>;
55*85ac6b80SLinus Walleij			function = "internet-down";
56*85ac6b80SLinus Walleij			gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
57*85ac6b80SLinus Walleij			default-state = "off";
58*85ac6b80SLinus Walleij		};
59*85ac6b80SLinus Walleij		led-internet-up {
60*85ac6b80SLinus Walleij			color = <LED_COLOR_ID_GREEN>;
61*85ac6b80SLinus Walleij			function = "internet-up";
62*85ac6b80SLinus Walleij			gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
63*85ac6b80SLinus Walleij			default-state = "off";
64*85ac6b80SLinus Walleij		};
65*85ac6b80SLinus Walleij		led-lan-coax {
66*85ac6b80SLinus Walleij			color = <LED_COLOR_ID_GREEN>;
67*85ac6b80SLinus Walleij			function = "lan-coax";
68*85ac6b80SLinus Walleij			gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
69*85ac6b80SLinus Walleij			default-state = "off";
70*85ac6b80SLinus Walleij		};
71*85ac6b80SLinus Walleij		led-wan-ethernet-alarm {
72*85ac6b80SLinus Walleij			color = <LED_COLOR_ID_RED>;
73*85ac6b80SLinus Walleij			function = "wan-ethernet-alarm";
74*85ac6b80SLinus Walleij			gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
75*85ac6b80SLinus Walleij			default-state = "off";
76*85ac6b80SLinus Walleij		};
77*85ac6b80SLinus Walleij		/* The last three LEDs are not mounted but traces exist on the PCB */
78*85ac6b80SLinus Walleij		led-phone-1 {
79*85ac6b80SLinus Walleij			color = <LED_COLOR_ID_GREEN>;
80*85ac6b80SLinus Walleij			function = "phone-1";
81*85ac6b80SLinus Walleij			gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
82*85ac6b80SLinus Walleij			default-state = "off";
83*85ac6b80SLinus Walleij		};
84*85ac6b80SLinus Walleij		led-phone-2 {
85*85ac6b80SLinus Walleij			color = <LED_COLOR_ID_GREEN>;
86*85ac6b80SLinus Walleij			function = "phone-2";
87*85ac6b80SLinus Walleij			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
88*85ac6b80SLinus Walleij			default-state = "off";
89*85ac6b80SLinus Walleij		};
90*85ac6b80SLinus Walleij		led-voip {
91*85ac6b80SLinus Walleij			color = <LED_COLOR_ID_GREEN>;
92*85ac6b80SLinus Walleij			function = "voip";
93*85ac6b80SLinus Walleij			gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
94*85ac6b80SLinus Walleij			default-state = "off";
95*85ac6b80SLinus Walleij		};
96*85ac6b80SLinus Walleij	};
97*85ac6b80SLinus Walleij
98*85ac6b80SLinus Walleij	gpio_keys {
99*85ac6b80SLinus Walleij		compatible = "gpio-keys";
100*85ac6b80SLinus Walleij
101*85ac6b80SLinus Walleij		button-reset {
102*85ac6b80SLinus Walleij			wakeup-source;
103*85ac6b80SLinus Walleij			linux,code = <KEY_RESTART>;
104*85ac6b80SLinus Walleij			label = "reset";
105*85ac6b80SLinus Walleij			gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
106*85ac6b80SLinus Walleij		};
107*85ac6b80SLinus Walleij	};
108*85ac6b80SLinus Walleij
109*85ac6b80SLinus Walleij	spi {
110*85ac6b80SLinus Walleij		compatible = "spi-gpio";
111*85ac6b80SLinus Walleij		#address-cells = <1>;
112*85ac6b80SLinus Walleij		#size-cells = <0>;
113*85ac6b80SLinus Walleij
114*85ac6b80SLinus Walleij		sck-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
115*85ac6b80SLinus Walleij		mosi-gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
116*85ac6b80SLinus Walleij		miso-gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
117*85ac6b80SLinus Walleij		cs-gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
118*85ac6b80SLinus Walleij		num-chipselects = <1>;
119*85ac6b80SLinus Walleij
120*85ac6b80SLinus Walleij		ethernet-switch@0 {
121*85ac6b80SLinus Walleij			compatible = "micrel,ks8995";
122*85ac6b80SLinus Walleij			reg = <0>;
123*85ac6b80SLinus Walleij			spi-max-frequency = <50000000>;
124*85ac6b80SLinus Walleij
125*85ac6b80SLinus Walleij			ethernet-ports {
126*85ac6b80SLinus Walleij				#address-cells = <1>;
127*85ac6b80SLinus Walleij				#size-cells = <0>;
128*85ac6b80SLinus Walleij
129*85ac6b80SLinus Walleij				ethernet-port@0 {
130*85ac6b80SLinus Walleij					reg = <0>;
131*85ac6b80SLinus Walleij					label = "lan1";
132*85ac6b80SLinus Walleij					phy-mode = "mii";
133*85ac6b80SLinus Walleij					phy-handle = <&phy1>;
134*85ac6b80SLinus Walleij				};
135*85ac6b80SLinus Walleij				ethernet-port@1 {
136*85ac6b80SLinus Walleij					reg = <1>;
137*85ac6b80SLinus Walleij					label = "lan2";
138*85ac6b80SLinus Walleij					phy-mode = "mii";
139*85ac6b80SLinus Walleij					phy-handle = <&phy2>;
140*85ac6b80SLinus Walleij				};
141*85ac6b80SLinus Walleij				ethernet-port@2 {
142*85ac6b80SLinus Walleij					reg = <2>;
143*85ac6b80SLinus Walleij					label = "lan3";
144*85ac6b80SLinus Walleij					phy-mode = "mii";
145*85ac6b80SLinus Walleij					phy-handle = <&phy3>;
146*85ac6b80SLinus Walleij				};
147*85ac6b80SLinus Walleij				ethernet-port@3 {
148*85ac6b80SLinus Walleij					reg = <3>;
149*85ac6b80SLinus Walleij					label = "lan4";
150*85ac6b80SLinus Walleij					phy-mode = "mii";
151*85ac6b80SLinus Walleij					phy-handle = <&phy4>;
152*85ac6b80SLinus Walleij				};
153*85ac6b80SLinus Walleij				ethernet-port@4 {
154*85ac6b80SLinus Walleij					reg = <4>;
155*85ac6b80SLinus Walleij					ethernet = <&ethc>;
156*85ac6b80SLinus Walleij					phy-mode = "mii";
157*85ac6b80SLinus Walleij					fixed-link {
158*85ac6b80SLinus Walleij						speed = <100>;
159*85ac6b80SLinus Walleij						full-duplex;
160*85ac6b80SLinus Walleij					};
161*85ac6b80SLinus Walleij				};
162*85ac6b80SLinus Walleij
163*85ac6b80SLinus Walleij			};
164*85ac6b80SLinus Walleij		};
165*85ac6b80SLinus Walleij	};
166*85ac6b80SLinus Walleij
167*85ac6b80SLinus Walleij	soc {
168*85ac6b80SLinus Walleij		bus@c4000000 {
169*85ac6b80SLinus Walleij			flash@0,0 {
170*85ac6b80SLinus Walleij				compatible = "intel,ixp4xx-flash", "cfi-flash";
171*85ac6b80SLinus Walleij				bank-width = <2>;
172*85ac6b80SLinus Walleij				/*
173*85ac6b80SLinus Walleij				 * 8 MB of Flash in 64 0x20000 sized blocks
174*85ac6b80SLinus Walleij				 * mapped in at CS0.
175*85ac6b80SLinus Walleij				 */
176*85ac6b80SLinus Walleij				reg = <0 0x00000000 0x0800000>;
177*85ac6b80SLinus Walleij
178*85ac6b80SLinus Walleij				/* Configure expansion bus to allow writes */
179*85ac6b80SLinus Walleij				intel,ixp4xx-eb-write-enable = <1>;
180*85ac6b80SLinus Walleij
181*85ac6b80SLinus Walleij				partitions {
182*85ac6b80SLinus Walleij					compatible = "redboot-fis";
183*85ac6b80SLinus Walleij					fis-index-block = <0x3f>;
184*85ac6b80SLinus Walleij				};
185*85ac6b80SLinus Walleij			};
186*85ac6b80SLinus Walleij			gpio1: gpio@1,0 {
187*85ac6b80SLinus Walleij				/* MMIO GPIO at CS1 */
188*85ac6b80SLinus Walleij				compatible = "intel,ixp4xx-expansion-bus-mmio-gpio";
189*85ac6b80SLinus Walleij				gpio-controller;
190*85ac6b80SLinus Walleij				#gpio-cells = <2>;
191*85ac6b80SLinus Walleij				big-endian;
192*85ac6b80SLinus Walleij				reg = <1 0x00000000 0x2>;
193*85ac6b80SLinus Walleij				reg-names = "dat";
194*85ac6b80SLinus Walleij				/* Expansion bus settings */
195*85ac6b80SLinus Walleij				intel,ixp4xx-eb-write-enable = <1>;
196*85ac6b80SLinus Walleij
197*85ac6b80SLinus Walleij				pci-reset-hog {
198*85ac6b80SLinus Walleij					gpio-hog;
199*85ac6b80SLinus Walleij					gpios = <7 GPIO_ACTIVE_HIGH>;
200*85ac6b80SLinus Walleij					output-high;
201*85ac6b80SLinus Walleij					line-name = "PCI reset";
202*85ac6b80SLinus Walleij				};
203*85ac6b80SLinus Walleij				pstn-relay-hog-1 {
204*85ac6b80SLinus Walleij					gpio-hog;
205*85ac6b80SLinus Walleij					gpios = <11 GPIO_ACTIVE_HIGH>;
206*85ac6b80SLinus Walleij					output-low;
207*85ac6b80SLinus Walleij					line-name = "PSTN relay control 1";
208*85ac6b80SLinus Walleij				};
209*85ac6b80SLinus Walleij				pstn-relay-hog-2 {
210*85ac6b80SLinus Walleij					gpio-hog;
211*85ac6b80SLinus Walleij					gpios = <12 GPIO_ACTIVE_HIGH>;
212*85ac6b80SLinus Walleij					output-low;
213*85ac6b80SLinus Walleij					line-name = "PSTN relay control 2";
214*85ac6b80SLinus Walleij				};
215*85ac6b80SLinus Walleij			};
216*85ac6b80SLinus Walleij		};
217*85ac6b80SLinus Walleij
218*85ac6b80SLinus Walleij		pci@c0000000 {
219*85ac6b80SLinus Walleij			status = "okay";
220*85ac6b80SLinus Walleij
221*85ac6b80SLinus Walleij			#interrupt-cells = <1>;
222*85ac6b80SLinus Walleij			interrupt-map-mask = <0xf800 0 0 7>;
223*85ac6b80SLinus Walleij			interrupt-map =
224*85ac6b80SLinus Walleij			/* IDSEL 13 */
225*85ac6b80SLinus Walleij			<0x6800 0 0 1 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 13 is irq 8 */
226*85ac6b80SLinus Walleij			<0x6800 0 0 2 &gpio0 6 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 13 is irq 6 */
227*85ac6b80SLinus Walleij			/* IDSEL 14 */
228*85ac6b80SLinus Walleij			<0x7000 0 0 1 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 14 is irq 7 */
229*85ac6b80SLinus Walleij			<0x7000 0 0 2 &gpio0 6 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 14 is irq 8 */
230*85ac6b80SLinus Walleij			/* IDSEL 15 */
231*85ac6b80SLinus Walleij			<0x7800 0 0 1 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 15 is irq 6 */
232*85ac6b80SLinus Walleij			<0x7800 0 0 2 &gpio0 6 IRQ_TYPE_LEVEL_LOW>; /* INT B on slot 15 is irq 7 */
233*85ac6b80SLinus Walleij		};
234*85ac6b80SLinus Walleij
235*85ac6b80SLinus Walleij		ethb: ethernet@c8009000 {
236*85ac6b80SLinus Walleij			status = "okay";
237*85ac6b80SLinus Walleij			queue-rx = <&qmgr 3>;
238*85ac6b80SLinus Walleij			queue-txready = <&qmgr 20>;
239*85ac6b80SLinus Walleij			phy-mode = "mii";
240*85ac6b80SLinus Walleij
241*85ac6b80SLinus Walleij			mdio {
242*85ac6b80SLinus Walleij				#address-cells = <1>;
243*85ac6b80SLinus Walleij				#size-cells = <0>;
244*85ac6b80SLinus Walleij
245*85ac6b80SLinus Walleij				/* 1, 2, 3 and 4 are ports on the KS8995 switch */
246*85ac6b80SLinus Walleij				phy1: ethernet-phy@1 {
247*85ac6b80SLinus Walleij					/* LAN1 */
248*85ac6b80SLinus Walleij					reg = <1>;
249*85ac6b80SLinus Walleij				};
250*85ac6b80SLinus Walleij				phy2: ethernet-phy@2 {
251*85ac6b80SLinus Walleij					/* LAN2 */
252*85ac6b80SLinus Walleij					reg = <2>;
253*85ac6b80SLinus Walleij				};
254*85ac6b80SLinus Walleij				phy3: ethernet-phy@3 {
255*85ac6b80SLinus Walleij					/* LAN3 */
256*85ac6b80SLinus Walleij					reg = <3>;
257*85ac6b80SLinus Walleij				};
258*85ac6b80SLinus Walleij				phy4: ethernet-phy@4 {
259*85ac6b80SLinus Walleij					/* LAN4 */
260*85ac6b80SLinus Walleij					reg = <4>;
261*85ac6b80SLinus Walleij				};
262*85ac6b80SLinus Walleij			};
263*85ac6b80SLinus Walleij		};
264*85ac6b80SLinus Walleij
265*85ac6b80SLinus Walleij		ethc: ethernet@c800a000 {
266*85ac6b80SLinus Walleij			status = "okay";
267*85ac6b80SLinus Walleij			queue-rx = <&qmgr 4>;
268*85ac6b80SLinus Walleij			queue-txready = <&qmgr 21>;
269*85ac6b80SLinus Walleij			phy-mode = "mii";
270*85ac6b80SLinus Walleij		};
271*85ac6b80SLinus Walleij	};
272*85ac6b80SLinus Walleij};
273