1// SPDX-License-Identifier: GPL-2.0-or-later 2// Copyright 2023 IBM Corp. 3/dts-v1/; 4 5#include "aspeed-g6.dtsi" 6#include <dt-bindings/gpio/aspeed-gpio.h> 7#include <dt-bindings/i2c/i2c.h> 8#include <dt-bindings/leds/leds-pca955x.h> 9 10/ { 11 model = "System1"; 12 compatible = "ibm,system1-bmc", "aspeed,ast2600"; 13 14 aliases { 15 i2c16 = &i2c8mux1chn0; 16 i2c17 = &i2c8mux1chn1; 17 i2c18 = &i2c8mux1chn2; 18 i2c19 = &i2c8mux1chn3; 19 i2c20 = &i2c8mux1chn4; 20 i2c21 = &i2c8mux1chn5; 21 i2c22 = &i2c8mux1chn6; 22 i2c23 = &i2c8mux1chn7; 23 i2c24 = &i2c3mux0chn0; 24 i2c25 = &i2c3mux0chn1; 25 i2c26 = &i2c3mux0chn2; 26 i2c27 = &i2c3mux0chn3; 27 i2c28 = &i2c3mux0chn4; 28 i2c29 = &i2c3mux0chn5; 29 i2c30 = &i2c3mux0chn6; 30 i2c31 = &i2c3mux0chn7; 31 i2c32 = &i2c6mux0chn0; 32 i2c33 = &i2c6mux0chn1; 33 i2c34 = &i2c6mux0chn2; 34 i2c35 = &i2c6mux0chn3; 35 i2c36 = &i2c6mux0chn4; 36 i2c37 = &i2c6mux0chn5; 37 i2c38 = &i2c6mux0chn6; 38 i2c39 = &i2c6mux0chn7; 39 i2c40 = &i2c7mux0chn0; 40 i2c41 = &i2c7mux0chn1; 41 i2c42 = &i2c7mux0chn2; 42 i2c43 = &i2c7mux0chn3; 43 i2c44 = &i2c7mux0chn4; 44 i2c45 = &i2c7mux0chn5; 45 i2c46 = &i2c7mux0chn6; 46 i2c47 = &i2c7mux0chn7; 47 i2c48 = &i2c8mux0chn0; 48 i2c49 = &i2c8mux0chn1; 49 i2c50 = &i2c8mux0chn2; 50 i2c51 = &i2c8mux0chn3; 51 i2c52 = &i2c8mux0chn4; 52 i2c53 = &i2c8mux0chn5; 53 i2c54 = &i2c8mux0chn6; 54 i2c55 = &i2c8mux0chn7; 55 i2c56 = &i2c14mux0chn0; 56 i2c57 = &i2c14mux0chn1; 57 i2c58 = &i2c14mux0chn2; 58 i2c59 = &i2c14mux0chn3; 59 i2c60 = &i2c14mux0chn4; 60 i2c61 = &i2c14mux0chn5; 61 i2c62 = &i2c14mux0chn6; 62 i2c63 = &i2c14mux0chn7; 63 i2c64 = &i2c15mux0chn0; 64 i2c65 = &i2c15mux0chn1; 65 i2c66 = &i2c15mux0chn2; 66 i2c67 = &i2c15mux0chn3; 67 i2c68 = &i2c15mux0chn4; 68 i2c69 = &i2c15mux0chn5; 69 i2c70 = &i2c15mux0chn6; 70 i2c71 = &i2c15mux0chn7; 71 }; 72 73 chosen { 74 stdout-path = "uart5:115200n8"; 75 }; 76 77 memory@80000000 { 78 device_type = "memory"; 79 reg = <0x80000000 0x40000000>; 80 }; 81 82 reserved-memory { 83 #address-cells = <1>; 84 #size-cells = <1>; 85 ranges; 86 87 eventlog: tcg-event-log@b3d00000 { 88 no-map; 89 reg = <0xb3d00000 0x100000>; 90 }; 91 92 ramoops@b3e00000 { 93 compatible = "ramoops"; 94 reg = <0xb3e00000 0x200000>; /* 16 * (4 * 0x8000) */ 95 record-size = <0x8000>; 96 console-size = <0x8000>; 97 ftrace-size = <0x8000>; 98 pmsg-size = <0x8000>; 99 max-reason = <3>; /* KMSG_DUMP_EMERG */ 100 }; 101 102 /* LPC FW cycle bridge region requires natural alignment */ 103 flash_memory: region@b4000000 { 104 no-map; 105 reg = <0xb4000000 0x04000000>; /* 64M */ 106 }; 107 108 /* VGA region is dictated by hardware strapping */ 109 vga_memory: region@bf000000 { 110 no-map; 111 compatible = "shared-dma-pool"; 112 reg = <0xbf000000 0x01000000>; /* 16M */ 113 }; 114 }; 115 116 leds { 117 compatible = "gpio-leds"; 118 119 led-bmc-ready { 120 gpios = <&gpio0 ASPEED_GPIO(L, 7) GPIO_ACTIVE_HIGH>; 121 }; 122 123 led-bmc-hb { 124 gpios = <&gpio0 ASPEED_GPIO(P, 7) GPIO_ACTIVE_HIGH>; 125 }; 126 127 led-rear-enc-fault0 { 128 gpios = <&gpio0 ASPEED_GPIO(S, 6) GPIO_ACTIVE_HIGH>; 129 }; 130 131 led-rear-enc-id0 { 132 gpios = <&gpio0 ASPEED_GPIO(S, 7) GPIO_ACTIVE_HIGH>; 133 }; 134 135 led-fan0-fault { 136 gpios = <&pca3 5 GPIO_ACTIVE_LOW>; 137 }; 138 139 led-fan1-fault { 140 gpios = <&pca3 6 GPIO_ACTIVE_LOW>; 141 }; 142 143 led-fan2-fault { 144 gpios = <&pca3 7 GPIO_ACTIVE_LOW>; 145 }; 146 147 led-fan3-fault { 148 gpios = <&pca3 8 GPIO_ACTIVE_LOW>; 149 }; 150 151 led-fan4-fault { 152 gpios = <&pca3 9 GPIO_ACTIVE_LOW>; 153 }; 154 155 led-fan5-fault { 156 gpios = <&pca3 10 GPIO_ACTIVE_LOW>; 157 }; 158 159 led-fan6-fault { 160 gpios = <&pca3 11 GPIO_ACTIVE_LOW>; 161 }; 162 163 led-nvmed0-fault { 164 gpios = <&pca4 4 GPIO_ACTIVE_HIGH>; 165 }; 166 167 led-nvmed1-fault { 168 gpios = <&pca4 5 GPIO_ACTIVE_HIGH>; 169 }; 170 171 led-nvmed2-fault { 172 gpios = <&pca4 6 GPIO_ACTIVE_HIGH>; 173 }; 174 175 led-nvmed3-fault { 176 gpios = <&pca4 7 GPIO_ACTIVE_HIGH>; 177 }; 178 }; 179 180 gpio-keys-polled { 181 compatible = "gpio-keys-polled"; 182 poll-interval = <1000>; 183 184 event-nvme0-presence { 185 label = "nvme0-presence"; 186 gpios = <&pca4 0 GPIO_ACTIVE_LOW>; 187 linux,code = <0>; 188 }; 189 190 event-nvme1-presence { 191 label = "nvme1-presence"; 192 gpios = <&pca4 1 GPIO_ACTIVE_LOW>; 193 linux,code = <1>; 194 }; 195 196 event-nvme2-presence { 197 label = "nvme2-presence"; 198 gpios = <&pca4 2 GPIO_ACTIVE_LOW>; 199 linux,code = <2>; 200 }; 201 202 event-nvme3-presence { 203 label = "nvme3-presence"; 204 gpios = <&pca4 3 GPIO_ACTIVE_LOW>; 205 linux,code = <3>; 206 }; 207 }; 208 209 iio-hwmon { 210 compatible = "iio-hwmon"; 211 io-channels = <&p12v_vd 0>, <&p5v_aux_vd 0>, 212 <&p5v_bmc_aux_vd 0>, <&p3v3_aux_vd 0>, 213 <&p3v3_bmc_aux_vd 0>, <&p1v8_bmc_aux_vd 0>, 214 <&adc1 4>, <&adc0 2>, <&adc1 0>, 215 <&p2v5_aux_vd 0>, <&adc1 7>; 216 }; 217 218 p12v_vd: voltage-divider1 { 219 compatible = "voltage-divider"; 220 io-channels = <&adc1 3>; 221 #io-channel-cells = <1>; 222 223 /* 224 * Scale the system voltage by 1127/127 to fit the ADC range. 225 * Use small nominator to prevent integer overflow. 226 */ 227 output-ohms = <15>; 228 full-ohms = <133>; 229 }; 230 231 p5v_aux_vd: voltage-divider2 { 232 compatible = "voltage-divider"; 233 io-channels = <&adc1 5>; 234 #io-channel-cells = <1>; 235 236 /* 237 * Scale the system voltage by 1365/365 to fit the ADC range. 238 * Use small nominator to prevent integer overflow. 239 */ 240 output-ohms = <50>; 241 full-ohms = <187>; 242 }; 243 244 p5v_bmc_aux_vd: voltage-divider3 { 245 compatible = "voltage-divider"; 246 io-channels = <&adc0 3>; 247 #io-channel-cells = <1>; 248 249 /* 250 * Scale the system voltage by 1365/365 to fit the ADC range. 251 * Use small nominator to prevent integer overflow. 252 */ 253 output-ohms = <50>; 254 full-ohms = <187>; 255 }; 256 257 p3v3_aux_vd: voltage-divider4 { 258 compatible = "voltage-divider"; 259 io-channels = <&adc1 2>; 260 #io-channel-cells = <1>; 261 262 /* 263 * Scale the system voltage by 1698/698 to fit the ADC range. 264 * Use small nominator to prevent integer overflow. 265 */ 266 output-ohms = <14>; 267 full-ohms = <34>; 268 }; 269 270 p3v3_bmc_aux_vd: voltage-divider5 { 271 compatible = "voltage-divider"; 272 io-channels = <&adc0 7>; 273 #io-channel-cells = <1>; 274 275 /* 276 * Scale the system voltage by 1698/698 to fit the ADC range. 277 * Use small nominator to prevent integer overflow. 278 */ 279 output-ohms = <14>; 280 full-ohms = <34>; 281 }; 282 283 p1v8_bmc_aux_vd: voltage-divider6 { 284 compatible = "voltage-divider"; 285 io-channels = <&adc0 6>; 286 #io-channel-cells = <1>; 287 288 /* 289 * Scale the system voltage by 4000/3000 to fit the ADC range. 290 * Use small nominator to prevent integer overflow. 291 */ 292 output-ohms = <3>; 293 full-ohms = <4>; 294 }; 295 296 p2v5_aux_vd: voltage-divider7 { 297 compatible = "voltage-divider"; 298 io-channels = <&adc1 1>; 299 #io-channel-cells = <1>; 300 301 /* 302 * Scale the system voltage by 2100/1100 to fit the ADC range. 303 * Use small nominator to prevent integer overflow. 304 */ 305 output-ohms = <11>; 306 full-ohms = <21>; 307 }; 308 309 p1v8_bmc_aux: fixedregulator-p1v8-bmc-aux { 310 compatible = "regulator-fixed"; 311 regulator-name = "p1v8_bmc_aux"; 312 regulator-min-microvolt = <1800000>; 313 regulator-max-microvolt = <1800000>; 314 regulator-always-on; 315 }; 316}; 317 318&adc0 { 319 status = "okay"; 320 vref-supply = <&p1v8_bmc_aux>; 321 322 pinctrl-names = "default"; 323 pinctrl-0 = <&pinctrl_adc0_default 324 &pinctrl_adc1_default 325 &pinctrl_adc2_default 326 &pinctrl_adc3_default 327 &pinctrl_adc4_default 328 &pinctrl_adc5_default 329 &pinctrl_adc6_default 330 &pinctrl_adc7_default>; 331}; 332 333&adc1 { 334 status = "okay"; 335 vref-supply = <&p1v8_bmc_aux>; 336 aspeed,battery-sensing; 337 338 aspeed,int-vref-microvolt = <2500000>; 339 pinctrl-names = "default"; 340 pinctrl-0 = <&pinctrl_adc8_default 341 &pinctrl_adc9_default 342 &pinctrl_adc10_default 343 &pinctrl_adc11_default 344 &pinctrl_adc12_default 345 &pinctrl_adc13_default 346 &pinctrl_adc14_default 347 &pinctrl_adc15_default>; 348}; 349 350&ehci1 { 351 status = "okay"; 352}; 353 354&uhci { 355 status = "okay"; 356}; 357 358&pinctrl { 359 pinctrl_gpiol4_unbiased: gpiol4 { 360 pins = "C15"; 361 bias-disable; 362 }; 363 364 pinctrl_gpiol5_unbiased: gpiol5 { 365 pins = "F15"; 366 bias-disable; 367 }; 368 369 pinctrl_gpiol6_unbiased: gpiol6 { 370 pins = "B14"; 371 bias-disable; 372 }; 373 374 pinctrl_gpiol7_unbiased: gpiol7 { 375 pins = "C14"; 376 bias-disable; 377 }; 378}; 379 380&gpio0 { 381 pinctrl-names = "default"; 382 pinctrl-0 = <&pinctrl_gpiol4_unbiased 383 &pinctrl_gpiol5_unbiased 384 &pinctrl_gpiol6_unbiased 385 &pinctrl_gpiol7_unbiased>; 386 387 gpio-line-names = 388 /*A0-A7*/ "","","","","","","","", 389 /*B0-B7*/ "","","","","bmc-tpm-reset","","","", 390 /*C0-C7*/ "","","","","","","","", 391 /*D0-D7*/ "","","","","","","","", 392 /*E0-E7*/ "","","","","","","","", 393 /*F0-F7*/ "","","","","","","","", 394 /*G0-G7*/ "","","","","","","","", 395 /*H0-H7*/ "","","","","","","","", 396 /*I0-I7*/ "","","","","","","","", 397 /*J0-J7*/ "","","","","","","","", 398 /*K0-K7*/ "","","","","","","","", 399 /*L0-L7*/ "","","","","","","","led-bmc-ready", 400 /*M0-M7*/ "","","","","","","","", 401 /*N0-N7*/ "pch-reset","","","","","flash-write-override","","", 402 /*O0-O7*/ "","","","","","","","", 403 /*P0-P7*/ "","","","","","","","led-bmc-hb", 404 /*Q0-Q7*/ "","","","","","","pch-ready","", 405 /*R0-R7*/ "","","","","","","","", 406 /*S0-S7*/ "","","","","","","led-rear-enc-fault0","led-rear-enc-id0", 407 /*T0-T7*/ "","","","","","","","", 408 /*U0-U7*/ "","","","","","","","", 409 /*V0-V7*/ "","rtc-battery-voltage-read-enable","","power-chassis-control","","","","", 410 /*W0-W7*/ "","","","","","","","", 411 /*X0-X7*/ "fpga-pgood","power-chassis-good","pch-pgood","","","","","", 412 /*Y0-Y7*/ "","","","","","","","", 413 /*Z0-Z7*/ "","","","","","","",""; 414 415 pin-gpio-hog-0 { 416 gpio-hog; 417 gpios = <ASPEED_GPIO(L, 4) GPIO_ACTIVE_HIGH>; 418 input; 419 line-name = "RST_RTCRST_N"; 420 }; 421 422 pin-gpio-hog-1 { 423 gpio-hog; 424 gpios = <ASPEED_GPIO(L, 5) GPIO_ACTIVE_HIGH>; 425 input; 426 line-name = "RST_SRTCRST_N"; 427 }; 428 429 pin-gpio-hog-2 { 430 gpio-hog; 431 gpios = <ASPEED_GPIO(L, 6) GPIO_ACTIVE_HIGH>; 432 output-high; 433 line-name = "BMC_FAN_E3_SVC_PEX_INT_N"; 434 }; 435 436 pin-gpio-hog-3 { 437 gpio-hog; 438 gpios = <ASPEED_GPIO(O, 6) GPIO_ACTIVE_LOW>; 439 output-low; 440 line-name = "isolate_errs_cpu1"; 441 }; 442}; 443 444&emmc_controller { 445 status = "okay"; 446}; 447 448&pinctrl_emmc_default { 449 bias-disable; 450}; 451 452&emmc { 453 status = "okay"; 454 clk-phase-mmc-hs200 = <180>, <180>; 455}; 456 457&sgpiom0 { 458 status = "okay"; 459 ngpios = <128>; 460 bus-frequency = <500000>; 461}; 462 463&ibt { 464 status = "okay"; 465}; 466 467&uart2 { 468 status = "okay"; 469}; 470 471&vuart1 { 472 status = "okay"; 473}; 474 475&vuart2 { 476 status = "okay"; 477}; 478 479&lpc_ctrl { 480 status = "okay"; 481 memory-region = <&flash_memory>; 482}; 483 484&mac2 { 485 status = "okay"; 486 pinctrl-names = "default"; 487 pinctrl-0 = <&pinctrl_rmii3_default>; 488 clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>, 489 <&syscon ASPEED_CLK_MAC3RCLK>; 490 clock-names = "MACCLK", "RCLK"; 491 use-ncsi; 492}; 493 494&mac3 { 495 status = "okay"; 496 pinctrl-names = "default"; 497 pinctrl-0 = <&pinctrl_rmii4_default>; 498 clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>, 499 <&syscon ASPEED_CLK_MAC4RCLK>; 500 clock-names = "MACCLK", "RCLK"; 501 use-ncsi; 502}; 503 504&wdt1 { 505 aspeed,reset-type = "none"; 506 aspeed,external-signal; 507 aspeed,ext-push-pull; 508 aspeed,ext-active-high; 509 510 pinctrl-names = "default"; 511 pinctrl-0 = <&pinctrl_wdtrst1_default>; 512}; 513 514&wdt2 { 515 status = "okay"; 516}; 517 518&kcs2 { 519 status = "okay"; 520 aspeed,lpc-io-reg = <0xca8 0xcac>; 521}; 522 523&kcs3 { 524 status = "okay"; 525 aspeed,lpc-io-reg = <0xca2>; 526 aspeed,lpc-interrupts = <11 IRQ_TYPE_LEVEL_LOW>; 527}; 528 529&peci0 { 530 status = "okay"; 531}; 532 533&lpc_snoop { 534 status = "okay"; 535 snoop-ports = <0x80>, <0x81>; 536}; 537 538&i2c0 { 539 status = "okay"; 540 541 eeprom@50 { 542 compatible = "atmel,24c64"; 543 reg = <0x50>; 544 }; 545}; 546 547&i2c1 { 548 status = "okay"; 549 550 regulator@42 { 551 compatible = "infineon,ir38263"; 552 reg = <0x42>; 553 }; 554 555 led-controller@60 { 556 compatible = "nxp,pca9552"; 557 reg = <0x60>; 558 #address-cells = <1>; 559 #size-cells = <0>; 560 561 gpio-controller; 562 #gpio-cells = <2>; 563 564 led@0 { 565 label = "nic1-perst"; 566 reg = <0>; 567 retain-state-shutdown; 568 default-state = "keep"; 569 type = <PCA955X_TYPE_LED>; 570 }; 571 572 led@1 { 573 label = "bmc-perst"; 574 reg = <1>; 575 retain-state-shutdown; 576 default-state = "keep"; 577 type = <PCA955X_TYPE_LED>; 578 }; 579 580 led@2 { 581 label = "reset-M2-SSD1-2-perst"; 582 reg = <2>; 583 retain-state-shutdown; 584 default-state = "keep"; 585 type = <PCA955X_TYPE_LED>; 586 }; 587 588 led@3 { 589 label = "pcie-perst1"; 590 reg = <3>; 591 retain-state-shutdown; 592 default-state = "keep"; 593 type = <PCA955X_TYPE_LED>; 594 }; 595 596 led@4 { 597 label = "pcie-perst2"; 598 reg = <4>; 599 retain-state-shutdown; 600 default-state = "keep"; 601 type = <PCA955X_TYPE_LED>; 602 }; 603 604 led@5 { 605 label = "pcie-perst3"; 606 reg = <5>; 607 retain-state-shutdown; 608 default-state = "keep"; 609 type = <PCA955X_TYPE_LED>; 610 }; 611 612 led@6 { 613 label = "pcie-perst4"; 614 reg = <6>; 615 retain-state-shutdown; 616 default-state = "keep"; 617 type = <PCA955X_TYPE_LED>; 618 }; 619 620 led@7 { 621 label = "pcie-perst5"; 622 reg = <7>; 623 retain-state-shutdown; 624 default-state = "keep"; 625 type = <PCA955X_TYPE_LED>; 626 }; 627 628 led@8 { 629 label = "pcie-perst6"; 630 reg = <8>; 631 retain-state-shutdown; 632 default-state = "keep"; 633 type = <PCA955X_TYPE_LED>; 634 }; 635 636 led@9 { 637 label = "pcie-perst7"; 638 reg = <9>; 639 retain-state-shutdown; 640 default-state = "keep"; 641 type = <PCA955X_TYPE_LED>; 642 }; 643 644 led@10 { 645 label = "pcie-perst8"; 646 reg = <10>; 647 retain-state-shutdown; 648 default-state = "keep"; 649 type = <PCA955X_TYPE_LED>; 650 }; 651 652 led@11 { 653 label = "PV-cp0-sw1stk4-perst"; 654 reg = <11>; 655 retain-state-shutdown; 656 default-state = "keep"; 657 type = <PCA955X_TYPE_LED>; 658 }; 659 660 led@12 { 661 label = "PV-cp0-sw1stk5-perst"; 662 reg = <12>; 663 retain-state-shutdown; 664 default-state = "keep"; 665 type = <PCA955X_TYPE_LED>; 666 }; 667 668 led@13 { 669 label = "pe-cp-drv0-perst"; 670 reg = <13>; 671 retain-state-shutdown; 672 default-state = "keep"; 673 type = <PCA955X_TYPE_LED>; 674 }; 675 676 led@14 { 677 label = "pe-cp-drv1-perst"; 678 reg = <14>; 679 retain-state-shutdown; 680 default-state = "keep"; 681 type = <PCA955X_TYPE_LED>; 682 }; 683 684 led@15 { 685 label = "lom-perst"; 686 reg = <15>; 687 retain-state-shutdown; 688 default-state = "keep"; 689 type = <PCA955X_TYPE_LED>; 690 }; 691 }; 692 693 gpio@74 { 694 compatible = "nxp,pca9539"; 695 reg = <0x74>; 696 697 gpio-controller; 698 #gpio-cells = <2>; 699 700 gpio-line-names = 701 "PLUG_DETECT_PCIE_J101_N", 702 "PLUG_DETECT_PCIE_J102_N", 703 "PLUG_DETECT_PCIE_J103_N", 704 "PLUG_DETECT_PCIE_J104_N", 705 "PLUG_DETECT_PCIE_J105_N", 706 "PLUG_DETECT_PCIE_J106_N", 707 "PLUG_DETECT_PCIE_J107_N", 708 "PLUG_DETECT_PCIE_J108_N", 709 "PLUG_DETECT_M2_SSD1_N", 710 "PLUG_DETECT_NIC1_N", 711 "SEL_SMB_DIMM_CPU0", 712 "presence-ps2", 713 "presence-ps3", 714 "", "", 715 "PWRBRD_PLUG_DETECT2_N"; 716 }; 717}; 718 719&i2c2 { 720 status = "okay"; 721 722 power-supply@58 { 723 compatible = "intel,crps185"; 724 reg = <0x58>; 725 }; 726 727 power-supply@59 { 728 compatible = "intel,crps185"; 729 reg = <0x59>; 730 }; 731 732 power-supply@5a { 733 compatible = "intel,crps185"; 734 reg = <0x5a>; 735 }; 736 737 power-supply@5b { 738 compatible = "intel,crps185"; 739 reg = <0x5b>; 740 }; 741}; 742 743&i2c3 { 744 status = "okay"; 745 746 i2c-mux@70 { 747 compatible = "nxp,pca9548"; 748 reg = <0x70>; 749 #address-cells = <1>; 750 #size-cells = <0>; 751 i2c-mux-idle-disconnect; 752 753 i2c3mux0chn0: i2c@0 { 754 #address-cells = <1>; 755 #size-cells = <0>; 756 reg = <0>; 757 }; 758 759 i2c3mux0chn1: i2c@1 { 760 #address-cells = <1>; 761 #size-cells = <0>; 762 reg = <1>; 763 }; 764 765 i2c3mux0chn2: i2c@2 { 766 #address-cells = <1>; 767 #size-cells = <0>; 768 reg = <2>; 769 }; 770 771 i2c3mux0chn3: i2c@3 { 772 #address-cells = <1>; 773 #size-cells = <0>; 774 reg = <3>; 775 }; 776 777 i2c3mux0chn4: i2c@4 { 778 #address-cells = <1>; 779 #size-cells = <0>; 780 reg = <4>; 781 }; 782 783 i2c3mux0chn5: i2c@5 { 784 #address-cells = <1>; 785 #size-cells = <0>; 786 reg = <5>; 787 }; 788 789 i2c3mux0chn6: i2c@6 { 790 #address-cells = <1>; 791 #size-cells = <0>; 792 reg = <6>; 793 }; 794 795 i2c3mux0chn7: i2c@7 { 796 #address-cells = <1>; 797 #size-cells = <0>; 798 reg = <7>; 799 }; 800 }; 801}; 802 803&i2c4 { 804 status = "okay"; 805 multi-master; 806 bus-frequency = <1000000>; 807 808 ipmb@10 { 809 compatible = "ipmb-dev"; 810 reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; 811 812 i2c-protocol; 813 }; 814}; 815 816&i2c5 { 817 status = "okay"; 818 819 regulator@42 { 820 compatible = "infineon,ir38263"; 821 reg = <0x42>; 822 }; 823 824 regulator@43 { 825 compatible = "infineon,ir38060"; 826 reg = <0x43>; 827 }; 828}; 829 830&i2c6 { 831 status = "okay"; 832 833 fan-controller@52 { 834 compatible = "maxim,max31785a"; 835 reg = <0x52>; 836 }; 837 838 fan-controller@54 { 839 compatible = "maxim,max31785a"; 840 reg = <0x54>; 841 }; 842 843 eeprom@55 { 844 compatible = "atmel,24c64"; 845 reg = <0x55>; 846 }; 847 848 i2c-mux@70 { 849 compatible = "nxp,pca9548"; 850 reg = <0x70>; 851 #address-cells = <1>; 852 #size-cells = <0>; 853 i2c-mux-idle-disconnect; 854 855 i2c6mux0chn0: i2c@0 { 856 #address-cells = <1>; 857 #size-cells = <0>; 858 reg = <0>; 859 }; 860 861 i2c6mux0chn1: i2c@1 { 862 #address-cells = <1>; 863 #size-cells = <0>; 864 reg = <1>; 865 }; 866 867 i2c6mux0chn2: i2c@2 { 868 #address-cells = <1>; 869 #size-cells = <0>; 870 reg = <2>; 871 }; 872 873 i2c6mux0chn3: i2c@3 { 874 #address-cells = <1>; 875 #size-cells = <0>; 876 reg = <3>; 877 }; 878 879 i2c6mux0chn4: i2c@4 { 880 #address-cells = <1>; 881 #size-cells = <0>; 882 reg = <4>; 883 884 humidity-sensor@40 { 885 compatible = "ti,hdc1080"; 886 reg = <0x40>; 887 }; 888 889 temperature-sensor@48 { 890 compatible = "ti,tmp275"; 891 reg = <0x48>; 892 }; 893 894 eeprom@50 { 895 compatible = "atmel,24c32"; 896 reg = <0x50>; 897 }; 898 899 led-controller@60 { 900 compatible = "nxp,pca9551"; 901 reg = <0x60>; 902 #address-cells = <1>; 903 #size-cells = <0>; 904 905 gpio-controller; 906 #gpio-cells = <2>; 907 908 led@0 { 909 label = "enclosure-id-led"; 910 reg = <0>; 911 retain-state-shutdown; 912 default-state = "keep"; 913 type = <PCA955X_TYPE_LED>; 914 }; 915 916 led@1 { 917 label = "attention-led"; 918 reg = <1>; 919 retain-state-shutdown; 920 default-state = "keep"; 921 type = <PCA955X_TYPE_LED>; 922 }; 923 924 led@2 { 925 label = "enclosure-fault-rollup-led"; 926 reg = <2>; 927 retain-state-shutdown; 928 default-state = "keep"; 929 type = <PCA955X_TYPE_LED>; 930 }; 931 932 led@3 { 933 label = "power-on-led"; 934 reg = <3>; 935 retain-state-shutdown; 936 default-state = "keep"; 937 type = <PCA955X_TYPE_LED>; 938 }; 939 }; 940 941 temperature-sensor@76 { 942 compatible = "infineon,dps310"; 943 reg = <0x76>; 944 }; 945 }; 946 947 i2c6mux0chn5: i2c@5 { 948 #address-cells = <1>; 949 #size-cells = <0>; 950 reg = <5>; 951 }; 952 953 i2c6mux0chn6: i2c@6 { 954 #address-cells = <1>; 955 #size-cells = <0>; 956 reg = <6>; 957 }; 958 959 i2c6mux0chn7: i2c@7 { 960 #address-cells = <1>; 961 #size-cells = <0>; 962 reg = <7>; 963 }; 964 }; 965 966 pca3: gpio@74 { 967 compatible = "nxp,pca9539"; 968 reg = <0x74>; 969 970 gpio-controller; 971 #gpio-cells = <2>; 972 }; 973 974 pca4: gpio@77 { 975 compatible = "nxp,pca9539"; 976 reg = <0x77>; 977 978 gpio-controller; 979 #gpio-cells = <2>; 980 981 gpio-line-names = 982 "PE_NVMED0_EXP_PRSNT_N", 983 "PE_NVMED1_EXP_PRSNT_N", 984 "PE_NVMED2_EXP_PRSNT_N", 985 "PE_NVMED3_EXP_PRSNT_N", 986 "LED_FAULT_NVMED0", 987 "LED_FAULT_NVMED1", 988 "LED_FAULT_NVMED2", 989 "LED_FAULT_NVMED3", 990 "FAN0_PRESENCE_R_N", 991 "FAN1_PRESENCE_R_N", 992 "FAN2_PRESENCE_R_N", 993 "FAN3_PRESENCE_R_N", 994 "FAN4_PRESENCE_R_N", 995 "FAN5_PRESENCE_N", 996 "FAN6_PRESENCE_N", 997 ""; 998 }; 999}; 1000 1001&i2c7 { 1002 status = "okay"; 1003 1004 i2c-mux@70 { 1005 compatible = "nxp,pca9548"; 1006 reg = <0x70>; 1007 #address-cells = <1>; 1008 #size-cells = <0>; 1009 i2c-mux-idle-disconnect; 1010 1011 i2c7mux0chn0: i2c@0 { 1012 #address-cells = <1>; 1013 #size-cells = <0>; 1014 reg = <0>; 1015 }; 1016 1017 i2c7mux0chn1: i2c@1 { 1018 #address-cells = <1>; 1019 #size-cells = <0>; 1020 reg = <1>; 1021 }; 1022 1023 i2c7mux0chn2: i2c@2 { 1024 #address-cells = <1>; 1025 #size-cells = <0>; 1026 reg = <2>; 1027 }; 1028 1029 i2c7mux0chn3: i2c@3 { 1030 #address-cells = <1>; 1031 #size-cells = <0>; 1032 reg = <3>; 1033 1034 regulator@58 { 1035 compatible = "mps,mp2973"; 1036 reg = <0x58>; 1037 }; 1038 }; 1039 1040 i2c7mux0chn4: i2c@4 { 1041 #address-cells = <1>; 1042 #size-cells = <0>; 1043 reg = <4>; 1044 }; 1045 1046 i2c7mux0chn5: i2c@5 { 1047 #address-cells = <1>; 1048 #size-cells = <0>; 1049 reg = <5>; 1050 1051 regulator@40 { 1052 compatible = "infineon,tda38640"; 1053 reg = <0x40>; 1054 }; 1055 }; 1056 1057 i2c7mux0chn6: i2c@6 { 1058 #address-cells = <1>; 1059 #size-cells = <0>; 1060 reg = <6>; 1061 }; 1062 1063 i2c7mux0chn7: i2c@7 { 1064 #address-cells = <1>; 1065 #size-cells = <0>; 1066 reg = <7>; 1067 }; 1068 }; 1069}; 1070 1071&i2c8 { 1072 status = "okay"; 1073 bus-frequency = <400000>; 1074 1075 i2c-mux@71 { 1076 compatible = "nxp,pca9548"; 1077 reg = <0x71>; 1078 #address-cells = <1>; 1079 #size-cells = <0>; 1080 i2c-mux-idle-disconnect; 1081 1082 i2c8mux0chn0: i2c@0 { 1083 #address-cells = <1>; 1084 #size-cells = <0>; 1085 reg = <0>; 1086 1087 regulator@58 { 1088 compatible = "mps,mp2971"; 1089 reg = <0x58>; 1090 }; 1091 }; 1092 1093 i2c8mux0chn1: i2c@1 { 1094 #address-cells = <1>; 1095 #size-cells = <0>; 1096 reg = <1>; 1097 1098 regulator@40 { 1099 compatible = "infineon,tda38640"; 1100 reg = <0x40>; 1101 }; 1102 1103 regulator@41 { 1104 compatible = "infineon,tda38640"; 1105 reg = <0x41>; 1106 }; 1107 1108 regulator@58 { 1109 compatible = "mps,mp2971"; 1110 reg = <0x58>; 1111 }; 1112 1113 regulator@5b { 1114 compatible = "mps,mp2971"; 1115 reg = <0x5b>; 1116 }; 1117 }; 1118 1119 i2c8mux0chn2: i2c@2 { 1120 #address-cells = <1>; 1121 #size-cells = <0>; 1122 reg = <2>; 1123 }; 1124 1125 i2c8mux0chn3: i2c@3 { 1126 #address-cells = <1>; 1127 #size-cells = <0>; 1128 reg = <3>; 1129 }; 1130 1131 i2c8mux0chn4: i2c@4 { 1132 #address-cells = <1>; 1133 #size-cells = <0>; 1134 reg = <4>; 1135 1136 i2c-mux@70 { 1137 compatible = "nxp,pca9548"; 1138 reg = <0x70>; 1139 #address-cells = <1>; 1140 #size-cells = <0>; 1141 i2c-mux-idle-disconnect; 1142 1143 i2c8mux1chn0: i2c@0 { 1144 #address-cells = <1>; 1145 #size-cells = <0>; 1146 reg = <0>; 1147 }; 1148 1149 i2c8mux1chn1: i2c@1 { 1150 #address-cells = <1>; 1151 #size-cells = <0>; 1152 reg = <1>; 1153 }; 1154 1155 i2c8mux1chn2: i2c@2 { 1156 #address-cells = <1>; 1157 #size-cells = <0>; 1158 reg = <2>; 1159 }; 1160 1161 i2c8mux1chn3: i2c@3 { 1162 #address-cells = <1>; 1163 #size-cells = <0>; 1164 reg = <3>; 1165 }; 1166 1167 i2c8mux1chn4: i2c@4 { 1168 #address-cells = <1>; 1169 #size-cells = <0>; 1170 reg = <4>; 1171 }; 1172 1173 i2c8mux1chn5: i2c@5 { 1174 #address-cells = <1>; 1175 #size-cells = <0>; 1176 reg = <5>; 1177 }; 1178 1179 i2c8mux1chn6: i2c@6 { 1180 #address-cells = <1>; 1181 #size-cells = <0>; 1182 reg = <6>; 1183 }; 1184 1185 i2c8mux1chn7: i2c@7 { 1186 #address-cells = <1>; 1187 #size-cells = <0>; 1188 reg = <7>; 1189 }; 1190 }; 1191 }; 1192 1193 i2c8mux0chn5: i2c@5 { 1194 #address-cells = <1>; 1195 #size-cells = <0>; 1196 reg = <5>; 1197 }; 1198 1199 i2c8mux0chn6: i2c@6 { 1200 #address-cells = <1>; 1201 #size-cells = <0>; 1202 reg = <6>; 1203 1204 temperature-sensor@4c { 1205 compatible = "ti,tmp432"; 1206 reg = <0x4c>; 1207 }; 1208 }; 1209 1210 i2c8mux0chn7: i2c@7 { 1211 #address-cells = <1>; 1212 #size-cells = <0>; 1213 reg = <7>; 1214 1215 regulator@40 { 1216 compatible = "infineon,ir38060"; 1217 reg = <0x40>; 1218 }; 1219 }; 1220 }; 1221}; 1222 1223&i2c9 { 1224 status = "okay"; 1225 1226 regulator@40 { 1227 compatible = "infineon,ir38263"; 1228 reg = <0x40>; 1229 }; 1230 1231 regulator@41 { 1232 compatible = "infineon,ir38263"; 1233 reg = <0x41>; 1234 }; 1235 1236 eeprom@50 { 1237 compatible = "atmel,24c64"; 1238 reg = <0x50>; 1239 }; 1240}; 1241 1242&i2c11 { 1243 status = "okay"; 1244 1245 tpm@2e { 1246 compatible = "tcg,tpm-tis-i2c"; 1247 reg = <0x2e>; 1248 memory-region = <&eventlog>; 1249 }; 1250}; 1251 1252&i2c12 { 1253 status = "okay"; 1254}; 1255 1256&i2c13 { 1257 status = "okay"; 1258 1259 regulator@41 { 1260 compatible = "infineon,ir38263"; 1261 reg = <0x41>; 1262 }; 1263 1264 led-controller@61 { 1265 compatible = "nxp,pca9552"; 1266 reg = <0x61>; 1267 #address-cells = <1>; 1268 #size-cells = <0>; 1269 1270 gpio-controller; 1271 #gpio-cells = <2>; 1272 1273 led@0 { 1274 label = "efuse-12v-slots"; 1275 reg = <0>; 1276 retain-state-shutdown; 1277 default-state = "keep"; 1278 type = <PCA955X_TYPE_LED>; 1279 }; 1280 1281 led@1 { 1282 label = "efuse-3p3v-slot"; 1283 reg = <1>; 1284 retain-state-shutdown; 1285 default-state = "keep"; 1286 type = <PCA955X_TYPE_LED>; 1287 }; 1288 1289 led@3 { 1290 label = "nic2-pert"; 1291 reg = <3>; 1292 retain-state-shutdown; 1293 default-state = "keep"; 1294 type = <PCA955X_TYPE_LED>; 1295 }; 1296 1297 led@4 { 1298 label = "pcie-perst9"; 1299 reg = <4>; 1300 retain-state-shutdown; 1301 default-state = "keep"; 1302 type = <PCA955X_TYPE_LED>; 1303 }; 1304 1305 led@5 { 1306 label = "pcie-perst10"; 1307 reg = <5>; 1308 retain-state-shutdown; 1309 default-state = "keep"; 1310 type = <PCA955X_TYPE_LED>; 1311 }; 1312 1313 led@6 { 1314 label = "pcie-perst11"; 1315 reg = <6>; 1316 retain-state-shutdown; 1317 default-state = "keep"; 1318 type = <PCA955X_TYPE_LED>; 1319 }; 1320 1321 led@7 { 1322 label = "pcie-perst12"; 1323 reg = <7>; 1324 retain-state-shutdown; 1325 default-state = "keep"; 1326 type = <PCA955X_TYPE_LED>; 1327 }; 1328 1329 led@8 { 1330 label = "pcie-perst13"; 1331 reg = <8>; 1332 retain-state-shutdown; 1333 default-state = "keep"; 1334 type = <PCA955X_TYPE_LED>; 1335 }; 1336 1337 led@9 { 1338 label = "pcie-perst14"; 1339 reg = <9>; 1340 retain-state-shutdown; 1341 default-state = "keep"; 1342 type = <PCA955X_TYPE_LED>; 1343 }; 1344 1345 led@10 { 1346 label = "pcie-perst15"; 1347 reg = <10>; 1348 retain-state-shutdown; 1349 default-state = "keep"; 1350 type = <PCA955X_TYPE_LED>; 1351 }; 1352 1353 led@11 { 1354 label = "pcie-perst16"; 1355 reg = <11>; 1356 retain-state-shutdown; 1357 default-state = "keep"; 1358 type = <PCA955X_TYPE_LED>; 1359 }; 1360 1361 led@12 { 1362 label = "PV-cp1-sw1stk4-perst"; 1363 reg = <12>; 1364 retain-state-shutdown; 1365 default-state = "keep"; 1366 type = <PCA955X_TYPE_LED>; 1367 }; 1368 1369 led@13 { 1370 label = "PV-cp1-sw1stk5-perst"; 1371 reg = <13>; 1372 retain-state-shutdown; 1373 default-state = "keep"; 1374 type = <PCA955X_TYPE_LED>; 1375 }; 1376 1377 led@14 { 1378 label = "pe-cp-drv2-perst"; 1379 reg = <14>; 1380 retain-state-shutdown; 1381 default-state = "keep"; 1382 type = <PCA955X_TYPE_LED>; 1383 }; 1384 1385 led@15 { 1386 label = "pe-cp-drv3-perst"; 1387 reg = <15>; 1388 retain-state-shutdown; 1389 default-state = "keep"; 1390 type = <PCA955X_TYPE_LED>; 1391 }; 1392 }; 1393 1394 gpio@75 { 1395 compatible = "nxp,pca9539"; 1396 reg = <0x75>; 1397 1398 gpio-controller; 1399 #gpio-cells = <2>; 1400 1401 gpio-line-names = 1402 "PLUG_DETECT_PCIE_J109_N", 1403 "PLUG_DETECT_PCIE_J110_N", 1404 "PLUG_DETECT_PCIE_J111_N", 1405 "PLUG_DETECT_PCIE_J112_N", 1406 "PLUG_DETECT_PCIE_J113_N", 1407 "PLUG_DETECT_PCIE_J114_N", 1408 "PLUG_DETECT_PCIE_J115_N", 1409 "PLUG_DETECT_PCIE_J116_N", 1410 "PLUG_DETECT_M2_SSD2_N", 1411 "PLUG_DETECT_NIC2_N", 1412 "SEL_SMB_DIMM_CPU1", 1413 "presence-ps0", 1414 "presence-ps1", 1415 "", "", 1416 "PWRBRD_PLUG_DETECT1_N"; 1417 }; 1418 1419 gpio@76 { 1420 compatible = "nxp,pca9539"; 1421 reg = <0x76>; 1422 1423 gpio-controller; 1424 #gpio-cells = <2>; 1425 1426 gpio-line-names = 1427 "SW1_BOOTRCVRYB1_N", 1428 "SW1_BOOTRCVRYB0_N", 1429 "SW2_BOOTRCVRYB1_N", 1430 "SW2_BOOTRCVRYB0_N", 1431 "SW3_4_BOOTRCVRYB1_N", 1432 "SW3_4_BOOTRCVRYB0_N", 1433 "SW5_BOOTRCVRYB1_N", 1434 "SW5_BOOTRCVRYB0_N", 1435 "SW6_BOOTRCVRYB1_N", 1436 "SW6_BOOTRCVRYB0_N", 1437 "SW1_RESET_N", 1438 "SW3_RESET_N", 1439 "SW4_RESET_N", 1440 "SW2_RESET_N", 1441 "SW5_RESET_N", 1442 "SW6_RESET_N"; 1443 }; 1444}; 1445 1446&i2c14 { 1447 status = "okay"; 1448 1449 i2c-mux@70 { 1450 compatible = "nxp,pca9548"; 1451 reg = <0x70>; 1452 #address-cells = <1>; 1453 #size-cells = <0>; 1454 i2c-mux-idle-disconnect; 1455 1456 i2c14mux0chn0: i2c@0 { 1457 #address-cells = <1>; 1458 #size-cells = <0>; 1459 reg = <0>; 1460 }; 1461 1462 i2c14mux0chn1: i2c@1 { 1463 #address-cells = <1>; 1464 #size-cells = <0>; 1465 reg = <1>; 1466 }; 1467 1468 i2c14mux0chn2: i2c@2 { 1469 #address-cells = <1>; 1470 #size-cells = <0>; 1471 reg = <2>; 1472 }; 1473 1474 i2c14mux0chn3: i2c@3 { 1475 #address-cells = <1>; 1476 #size-cells = <0>; 1477 reg = <3>; 1478 1479 regulator@58 { 1480 compatible = "mps,mp2973"; 1481 reg = <0x58>; 1482 }; 1483 }; 1484 1485 i2c14mux0chn4: i2c@4 { 1486 #address-cells = <1>; 1487 #size-cells = <0>; 1488 reg = <4>; 1489 }; 1490 1491 i2c14mux0chn5: i2c@5 { 1492 #address-cells = <1>; 1493 #size-cells = <0>; 1494 reg = <5>; 1495 1496 regulator@40 { 1497 compatible = "infineon,tda38640"; 1498 reg = <0x40>; 1499 }; 1500 }; 1501 1502 i2c14mux0chn6: i2c@6 { 1503 #address-cells = <1>; 1504 #size-cells = <0>; 1505 reg = <6>; 1506 }; 1507 1508 i2c14mux0chn7: i2c@7 { 1509 #address-cells = <1>; 1510 #size-cells = <0>; 1511 reg = <7>; 1512 }; 1513 }; 1514}; 1515 1516&i2c15 { 1517 status = "okay"; 1518 bus-frequency = <400000>; 1519 1520 i2c-mux@71 { 1521 compatible = "nxp,pca9548"; 1522 reg = <0x71>; 1523 #address-cells = <1>; 1524 #size-cells = <0>; 1525 i2c-mux-idle-disconnect; 1526 1527 i2c15mux0chn0: i2c@0 { 1528 #address-cells = <1>; 1529 #size-cells = <0>; 1530 reg = <0>; 1531 1532 regulator@58 { 1533 compatible = "mps,mp2971"; 1534 reg = <0x58>; 1535 }; 1536 }; 1537 1538 i2c15mux0chn1: i2c@1 { 1539 #address-cells = <1>; 1540 #size-cells = <0>; 1541 reg = <1>; 1542 1543 regulator@40 { 1544 compatible = "infineon,tda38640"; 1545 reg = <0x40>; 1546 }; 1547 1548 regulator@41 { 1549 compatible = "infineon,tda38640"; 1550 reg = <0x41>; 1551 }; 1552 1553 regulator@58 { 1554 compatible = "mps,mp2971"; 1555 reg = <0x58>; 1556 }; 1557 1558 regulator@5b { 1559 compatible = "mps,mp2971"; 1560 reg = <0x5b>; 1561 }; 1562 }; 1563 1564 i2c15mux0chn2: i2c@2 { 1565 #address-cells = <1>; 1566 #size-cells = <0>; 1567 reg = <2>; 1568 }; 1569 1570 i2c15mux0chn3: i2c@3 { 1571 #address-cells = <1>; 1572 #size-cells = <0>; 1573 reg = <3>; 1574 }; 1575 1576 i2c15mux0chn4: i2c@4 { 1577 #address-cells = <1>; 1578 #size-cells = <0>; 1579 reg = <4>; 1580 1581 i2c-mux@70 { 1582 compatible = "nxp,pca9548"; 1583 reg = <0x70>; 1584 #address-cells = <1>; 1585 #size-cells = <0>; 1586 i2c-mux-idle-disconnect; 1587 1588 i2c15mux1chn0: i2c@0 { 1589 #address-cells = <1>; 1590 #size-cells = <0>; 1591 reg = <0>; 1592 }; 1593 1594 i2c15mux1chn1: i2c@1 { 1595 #address-cells = <1>; 1596 #size-cells = <0>; 1597 reg = <1>; 1598 }; 1599 1600 i2c15mux1chn2: i2c@2 { 1601 #address-cells = <1>; 1602 #size-cells = <0>; 1603 reg = <2>; 1604 }; 1605 1606 i2c15mux1chn3: i2c@3 { 1607 #address-cells = <1>; 1608 #size-cells = <0>; 1609 reg = <3>; 1610 }; 1611 1612 i2c15mux1chn4: i2c@4 { 1613 #address-cells = <1>; 1614 #size-cells = <0>; 1615 reg = <4>; 1616 }; 1617 1618 i2c15mux1chn5: i2c@5 { 1619 #address-cells = <1>; 1620 #size-cells = <0>; 1621 reg = <5>; 1622 }; 1623 1624 i2c15mux1chn6: i2c@6 { 1625 #address-cells = <1>; 1626 #size-cells = <0>; 1627 reg = <6>; 1628 }; 1629 1630 i2c15mux1chn7: i2c@7 { 1631 #address-cells = <1>; 1632 #size-cells = <0>; 1633 reg = <7>; 1634 }; 1635 }; 1636 }; 1637 1638 i2c15mux0chn5: i2c@5 { 1639 #address-cells = <1>; 1640 #size-cells = <0>; 1641 reg = <5>; 1642 }; 1643 1644 i2c15mux0chn6: i2c@6 { 1645 #address-cells = <1>; 1646 #size-cells = <0>; 1647 reg = <6>; 1648 1649 temperature-sensor@4c { 1650 compatible = "ti,tmp432"; 1651 reg = <0x4c>; 1652 }; 1653 }; 1654 1655 i2c15mux0chn7: i2c@7 { 1656 #address-cells = <1>; 1657 #size-cells = <0>; 1658 reg = <7>; 1659 1660 regulator@40 { 1661 compatible = "infineon,ir38060"; 1662 reg = <0x40>; 1663 }; 1664 1665 temperature-sensor@4c { 1666 compatible = "ti,tmp432"; 1667 reg = <0x4c>; 1668 }; 1669 }; 1670 }; 1671}; 1672