1// SPDX-License-Identifier: GPL-2.0+ 2// Copyright (c) 2021 Facebook Inc. 3/dts-v1/; 4 5#include "aspeed-g6.dtsi" 6#include <dt-bindings/gpio/aspeed-gpio.h> 7#include <dt-bindings/usb/pd.h> 8#include <dt-bindings/leds/leds-pca955x.h> 9#include <dt-bindings/interrupt-controller/irq.h> 10#include <dt-bindings/i2c/i2c.h> 11 12/ { 13 model = "Facebook Catalina BMC"; 14 compatible = "facebook,catalina-bmc", "aspeed,ast2600"; 15 16 aliases { 17 serial0 = &uart1; 18 serial2 = &uart3; 19 serial3 = &uart4; 20 serial4 = &uart5; 21 i2c16 = &i2c1mux0ch0; 22 i2c17 = &i2c1mux0ch1; 23 i2c18 = &i2c1mux0ch2; 24 i2c19 = &i2c1mux0ch3; 25 i2c20 = &i2c1mux0ch4; 26 i2c21 = &i2c1mux0ch5; 27 i2c22 = &i2c1mux0ch6; 28 i2c23 = &i2c1mux0ch7; 29 i2c24 = &i2c0mux0ch0; 30 i2c25 = &i2c0mux0ch1; 31 i2c26 = &i2c0mux0ch2; 32 i2c27 = &i2c0mux0ch3; 33 i2c28 = &i2c0mux1ch0; 34 i2c29 = &i2c0mux1ch1; 35 i2c30 = &i2c0mux1ch2; 36 i2c31 = &i2c0mux1ch3; 37 i2c32 = &i2c0mux2ch0; 38 i2c33 = &i2c0mux2ch1; 39 i2c34 = &i2c0mux2ch2; 40 i2c35 = &i2c0mux2ch3; 41 i2c36 = &i2c0mux3ch0; 42 i2c37 = &i2c0mux3ch1; 43 i2c38 = &i2c0mux3ch2; 44 i2c39 = &i2c0mux3ch3; 45 i2c40 = &i2c0mux4ch0; 46 i2c41 = &i2c0mux4ch1; 47 i2c42 = &i2c0mux4ch2; 48 i2c43 = &i2c0mux4ch3; 49 i2c44 = &i2c0mux5ch0; 50 i2c45 = &i2c0mux5ch1; 51 i2c46 = &i2c0mux5ch2; 52 i2c47 = &i2c0mux5ch3; 53 i2c48 = &i2c5mux0ch0; 54 i2c49 = &i2c5mux0ch1; 55 i2c50 = &i2c5mux0ch2; 56 i2c51 = &i2c5mux0ch3; 57 i2c52 = &i2c5mux0ch4; 58 i2c53 = &i2c5mux0ch5; 59 i2c54 = &i2c5mux0ch6; 60 i2c55 = &i2c5mux0ch7; 61 }; 62 63 chosen { 64 stdout-path = "serial4:57600n8"; 65 }; 66 67 memory@80000000 { 68 device_type = "memory"; 69 reg = <0x80000000 0x80000000>; 70 }; 71 72 iio-hwmon { 73 compatible = "iio-hwmon"; 74 io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>, 75 <&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>, 76 <&adc1 2>; 77 }; 78 79 spi1_gpio: spi { 80 compatible = "spi-gpio"; 81 #address-cells = <1>; 82 #size-cells = <0>; 83 84 sck-gpios = <&gpio0 ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>; 85 mosi-gpios = <&gpio0 ASPEED_GPIO(Z, 4) GPIO_ACTIVE_HIGH>; 86 miso-gpios = <&gpio0 ASPEED_GPIO(Z, 5) GPIO_ACTIVE_HIGH>; 87 cs-gpios = <&gpio0 ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>; 88 num-chipselects = <1>; 89 90 tpm@0 { 91 compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; 92 spi-max-frequency = <33000000>; 93 reg = <0>; 94 }; 95 }; 96 97 leds { 98 compatible = "gpio-leds"; 99 100 led-0 { 101 label = "bmc_heartbeat_amber"; 102 gpios = <&gpio0 ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW>; 103 linux,default-trigger = "heartbeat"; 104 }; 105 106 led-1 { 107 label = "fp_id_amber"; 108 default-state = "off"; 109 gpios = <&gpio0 ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>; 110 }; 111 112 led-2 { 113 label = "bmc_ready_noled"; 114 gpios = <&gpio0 ASPEED_GPIO(B, 3) (GPIO_ACTIVE_HIGH|GPIO_TRANSITORY)>; 115 }; 116 117 led-3 { 118 label = "bmc_ready_cpld_noled"; 119 gpios = <&gpio0 ASPEED_GPIO(P, 5) (GPIO_ACTIVE_HIGH|GPIO_TRANSITORY)>; 120 }; 121 }; 122 123 p1v8_bmc_aux: regulator-p1v8-bmc-aux { 124 compatible = "regulator-fixed"; 125 regulator-name = "p1v8_bmc_aux"; 126 regulator-min-microvolt = <1800000>; 127 regulator-max-microvolt = <1800000>; 128 regulator-always-on; 129 }; 130 131 p2v5_bmc_aux: regulator-p2v5-bmc-aux { 132 compatible = "regulator-fixed"; 133 regulator-name = "p2v5_bmc_aux"; 134 regulator-min-microvolt = <2500000>; 135 regulator-max-microvolt = <2500000>; 136 regulator-always-on; 137 }; 138}; 139 140&uart1 { 141 status = "okay"; 142}; 143 144&uart3 { 145 status = "okay"; 146}; 147 148&uart4 { 149 status = "okay"; 150}; 151 152&uart5 { 153 status = "okay"; 154}; 155 156&mac2 { 157 status = "okay"; 158 pinctrl-names = "default"; 159 pinctrl-0 = <&pinctrl_ncsi3_default>; 160 use-ncsi; 161}; 162 163&mac3 { 164 status = "okay"; 165 pinctrl-names = "default"; 166 pinctrl-0 = <&pinctrl_ncsi4_default>; 167 use-ncsi; 168}; 169 170&fmc { 171 status = "okay"; 172 flash@0 { 173 status = "okay"; 174 m25p,fast-read; 175 label = "bmc"; 176 spi-max-frequency = <50000000>; 177#include "openbmc-flash-layout-128.dtsi" 178 }; 179 flash@1 { 180 status = "okay"; 181 m25p,fast-read; 182 label = "alt-bmc"; 183 spi-max-frequency = <50000000>; 184 }; 185}; 186 187&i2c0 { 188 status = "okay"; 189 multi-master; 190 mctp@10 { 191 compatible = "mctp-i2c-controller"; 192 reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; 193 }; 194 195 i2c-mux@71 { 196 compatible = "nxp,pca9546"; 197 reg = <0x71>; 198 #address-cells = <1>; 199 #size-cells = <0>; 200 201 i2c0mux0ch0: i2c@0 { 202 #address-cells = <1>; 203 #size-cells = <0>; 204 reg = <0>; 205 mctp-controller; 206 207 // IOB0 NIC0 TEMP 208 temperature-sensor@1f { 209 compatible = "ti,tmp421"; 210 reg = <0x1f>; 211 }; 212 }; 213 i2c0mux0ch1: i2c@1 { 214 #address-cells = <1>; 215 #size-cells = <0>; 216 reg = <1>; 217 }; 218 i2c0mux0ch2: i2c@2 { 219 #address-cells = <1>; 220 #size-cells = <0>; 221 reg = <2>; 222 mctp-controller; 223 224 // IOB0 NIC1 TEMP 225 temperature-sensor@1f { 226 compatible = "ti,tmp421"; 227 reg = <0x1f>; 228 }; 229 }; 230 i2c0mux0ch3: i2c@3 { 231 #address-cells = <1>; 232 #size-cells = <0>; 233 reg = <3>; 234 }; 235 }; 236 237 i2c-mux@72 { 238 compatible = "nxp,pca9546"; 239 reg = <0x72>; 240 #address-cells = <1>; 241 #size-cells = <0>; 242 i2c-mux-idle-disconnect; 243 244 i2c0mux1ch0: i2c@0 { 245 #address-cells = <1>; 246 #size-cells = <0>; 247 reg = <0>; 248 }; 249 i2c0mux1ch1: i2c@1 { 250 #address-cells = <1>; 251 #size-cells = <0>; 252 reg = <1>; 253 254 // IO Mezz 0 IOEXP 255 io_expander7: gpio@20 { 256 compatible = "nxp,pca9535"; 257 reg = <0x20>; 258 gpio-controller; 259 #gpio-cells = <2>; 260 }; 261 262 // IO Mezz 0 FRU EEPROM 263 eeprom@50 { 264 compatible = "atmel,24c64"; 265 reg = <0x50>; 266 }; 267 }; 268 i2c0mux1ch2: i2c@2 { 269 #address-cells = <1>; 270 #size-cells = <0>; 271 reg = <2>; 272 }; 273 i2c0mux1ch3: i2c@3 { 274 #address-cells = <1>; 275 #size-cells = <0>; 276 reg = <3>; 277 }; 278 }; 279 280 i2c-mux@73 { 281 compatible = "nxp,pca9546"; 282 reg = <0x73>; 283 #address-cells = <1>; 284 #size-cells = <0>; 285 i2c-mux-idle-disconnect; 286 287 i2c0mux2ch0: i2c@0 { 288 #address-cells = <1>; 289 #size-cells = <0>; 290 reg = <0>; 291 }; 292 i2c0mux2ch1: i2c@1 { 293 #address-cells = <1>; 294 #size-cells = <0>; 295 reg = <1>; 296 }; 297 i2c0mux2ch2: i2c@2 { 298 #address-cells = <1>; 299 #size-cells = <0>; 300 reg = <2>; 301 }; 302 i2c0mux2ch3: i2c@3 { 303 #address-cells = <1>; 304 #size-cells = <0>; 305 reg = <3>; 306 }; 307 }; 308 309 i2c-mux@75 { 310 compatible = "nxp,pca9546"; 311 reg = <0x75>; 312 #address-cells = <1>; 313 #size-cells = <0>; 314 315 i2c0mux3ch0: i2c@0 { 316 #address-cells = <1>; 317 #size-cells = <0>; 318 reg = <0>; 319 mctp-controller; 320 321 // IOB1 NIC0 TEMP 322 temperature-sensor@1f { 323 compatible = "ti,tmp421"; 324 reg = <0x1f>; 325 }; 326 }; 327 i2c0mux3ch1: i2c@1 { 328 #address-cells = <1>; 329 #size-cells = <0>; 330 reg = <1>; 331 }; 332 i2c0mux3ch2: i2c@2 { 333 #address-cells = <1>; 334 #size-cells = <0>; 335 reg = <2>; 336 mctp-controller; 337 338 // IOB1 NIC1 TEMP 339 temperature-sensor@1f { 340 compatible = "ti,tmp421"; 341 reg = <0x1f>; 342 }; 343 }; 344 i2c0mux3ch3: i2c@3 { 345 #address-cells = <1>; 346 #size-cells = <0>; 347 reg = <3>; 348 }; 349 }; 350 351 i2c-mux@76 { 352 compatible = "nxp,pca9546"; 353 reg = <0x76>; 354 #address-cells = <1>; 355 #size-cells = <0>; 356 i2c-mux-idle-disconnect; 357 358 i2c0mux4ch0: i2c@0 { 359 #address-cells = <1>; 360 #size-cells = <0>; 361 reg = <0>; 362 }; 363 i2c0mux4ch1: i2c@1 { 364 #address-cells = <1>; 365 #size-cells = <0>; 366 reg = <1>; 367 368 // IO Mezz 1 IOEXP 369 io_expander8: gpio@21 { 370 compatible = "nxp,pca9535"; 371 reg = <0x21>; 372 gpio-controller; 373 #gpio-cells = <2>; 374 }; 375 376 // IO Mezz 1 FRU EEPROM 377 eeprom@50 { 378 compatible = "atmel,24c64"; 379 reg = <0x50>; 380 }; 381 }; 382 i2c0mux4ch2: i2c@2 { 383 #address-cells = <1>; 384 #size-cells = <0>; 385 reg = <2>; 386 }; 387 i2c0mux4ch3: i2c@3 { 388 #address-cells = <1>; 389 #size-cells = <0>; 390 reg = <3>; 391 }; 392 }; 393 394 i2c-mux@77 { 395 compatible = "nxp,pca9546"; 396 reg = <0x77>; 397 #address-cells = <1>; 398 #size-cells = <0>; 399 i2c-mux-idle-disconnect; 400 401 i2c0mux5ch0: i2c@0 { 402 #address-cells = <1>; 403 #size-cells = <0>; 404 reg = <0>; 405 }; 406 i2c0mux5ch1: i2c@1 { 407 #address-cells = <1>; 408 #size-cells = <0>; 409 reg = <1>; 410 }; 411 i2c0mux5ch2: i2c@2 { 412 #address-cells = <1>; 413 #size-cells = <0>; 414 reg = <2>; 415 }; 416 i2c0mux5ch3: i2c@3 { 417 #address-cells = <1>; 418 #size-cells = <0>; 419 reg = <3>; 420 }; 421 }; 422}; 423 424&i2c1 { 425 status = "okay"; 426 i2c-mux@70 { 427 compatible = "nxp,pca9548"; 428 #address-cells = <1>; 429 #size-cells = <0>; 430 reg = <0x70>; 431 i2c-mux-idle-disconnect; 432 433 i2c1mux0ch0: i2c@0 { 434 #address-cells = <1>; 435 #size-cells = <0>; 436 reg = <0x0>; 437 438 power-sensor@22 { 439 compatible = "mps,mp5990"; 440 reg = <0x22>; 441 }; 442 }; 443 i2c1mux0ch1: i2c@1 { 444 #address-cells = <1>; 445 #size-cells = <0>; 446 reg = <0x1>; 447 }; 448 i2c1mux0ch2: i2c@2 { 449 #address-cells = <1>; 450 #size-cells = <0>; 451 reg = <0x2>; 452 453 fanctl2: fan-controller@1 { 454 compatible = "nuvoton,nct7363"; 455 reg = <0x01>; 456 #pwm-cells = <2>; 457 458 fan-9 { 459 pwms = <&fanctl2 0 40000>; 460 tach-ch = /bits/ 8 <0x09>; 461 }; 462 fan-11 { 463 pwms = <&fanctl2 0 40000>; 464 tach-ch = /bits/ 8 <0x0b>; 465 }; 466 fan-10 { 467 pwms = <&fanctl2 4 40000>; 468 tach-ch = /bits/ 8 <0x0a>; 469 }; 470 fan-13 { 471 pwms = <&fanctl2 4 40000>; 472 tach-ch = /bits/ 8 <0x0d>; 473 }; 474 fan-15 { 475 pwms = <&fanctl2 6 40000>; 476 tach-ch = /bits/ 8 <0x0f>; 477 }; 478 fan-1 { 479 pwms = <&fanctl2 6 40000>; 480 tach-ch = /bits/ 8 <0x01>; 481 }; 482 fan-0 { 483 pwms = <&fanctl2 10 40000>; 484 tach-ch = /bits/ 8 <0x00>; 485 }; 486 fan-3 { 487 pwms = <&fanctl2 10 40000>; 488 tach-ch = /bits/ 8 <0x03>; 489 }; 490 }; 491 fanctl3: fan-controller@2 { 492 compatible = "nuvoton,nct7363"; 493 reg = <0x02>; 494 #pwm-cells = <2>; 495 496 fan-9 { 497 pwms = <&fanctl3 0 40000>; 498 tach-ch = /bits/ 8 <0x09>; 499 }; 500 fan-11 { 501 pwms = <&fanctl3 0 40000>; 502 tach-ch = /bits/ 8 <0x0b>; 503 }; 504 fan-10 { 505 pwms = <&fanctl3 4 40000>; 506 tach-ch = /bits/ 8 <0x0a>; 507 }; 508 fan-13 { 509 pwms = <&fanctl3 4 40000>; 510 tach-ch = /bits/ 8 <0x0d>; 511 }; 512 fan-15 { 513 pwms = <&fanctl3 6 40000>; 514 tach-ch = /bits/ 8 <0x0f>; 515 }; 516 fan-1 { 517 pwms = <&fanctl3 6 40000>; 518 tach-ch = /bits/ 8 <0x01>; 519 }; 520 fan-0 { 521 pwms = <&fanctl3 10 40000>; 522 tach-ch = /bits/ 8 <0x00>; 523 }; 524 fan-3 { 525 pwms = <&fanctl3 10 40000>; 526 tach-ch = /bits/ 8 <0x03>; 527 }; 528 }; 529 fanctl0: fan-controller@21{ 530 compatible = "maxim,max31790"; 531 reg = <0x21>; 532 }; 533 fanctl1: fan-controller@27{ 534 compatible = "maxim,max31790"; 535 reg = <0x27>; 536 }; 537 }; 538 i2c1mux0ch3: i2c@3 { 539 #address-cells = <1>; 540 #size-cells = <0>; 541 reg = <0x3>; 542 }; 543 i2c1mux0ch4: i2c@4 { 544 #address-cells = <1>; 545 #size-cells = <0>; 546 reg = <0x4>; 547 548 power-monitor@13 { 549 compatible = "infineon,xdp710"; 550 reg = <0x13>; 551 }; 552 power-monitor@1c { 553 compatible = "infineon,xdp710"; 554 reg = <0x1c>; 555 }; 556 power-monitor@42 { 557 compatible = "lltc,ltc4287"; 558 reg = <0x42>; 559 shunt-resistor-micro-ohms = <100>; 560 }; 561 power-monitor@43 { 562 compatible = "lltc,ltc4287"; 563 reg = <0x43>; 564 shunt-resistor-micro-ohms = <100>; 565 }; 566 }; 567 i2c1mux0ch5: i2c@5 { 568 #address-cells = <1>; 569 #size-cells = <0>; 570 reg = <0x5>; 571 572 // PDB FRU EEPROM 573 eeprom@54 { 574 compatible = "atmel,24c64"; 575 reg = <0x54>; 576 }; 577 578 // PDB TEMP SENSOR 579 temperature-sensor@4f { 580 compatible = "ti,tmp75"; 581 reg = <0x4f>; 582 }; 583 }; 584 i2c1mux0ch6: i2c@6 { 585 #address-cells = <1>; 586 #size-cells = <0>; 587 reg = <0x6>; 588 589 // PDB IOEXP 590 io_expander5: gpio@27 { 591 compatible = "nxp,pca9554"; 592 reg = <0x27>; 593 gpio-controller; 594 #gpio-cells = <2>; 595 }; 596 597 // OSFP IOEXP 598 io_expander6: gpio@25 { 599 compatible = "nxp,pca9555"; 600 reg = <0x25>; 601 gpio-controller; 602 #gpio-cells = <2>; 603 }; 604 605 // OSFP FRU EEPROM 606 eeprom@51 { 607 compatible = "atmel,24c64"; 608 reg = <0x51>; 609 }; 610 }; 611 i2c1mux0ch7: i2c@7 { 612 #address-cells = <1>; 613 #size-cells = <0>; 614 reg = <0x7>; 615 616 // FIO FRU EEPROM 617 eeprom@53 { 618 compatible = "atmel,24c64"; 619 reg = <0x53>; 620 }; 621 622 // FIO TEMP SENSOR 623 temperature-sensor@4b { 624 compatible = "ti,tmp75"; 625 reg = <0x4b>; 626 }; 627 628 // FIO REMOTE TEMP SENSOR 629 temperature-sensor@4f { 630 compatible = "ti,tmp75"; 631 reg = <0x4f>; 632 }; 633 }; 634 }; 635}; 636 637&i2c2 { 638 status = "okay"; 639 640 // Module 0 IOEXP 641 io_expander0: gpio@20 { 642 compatible = "nxp,pca9555"; 643 reg = <0x20>; 644 gpio-controller; 645 #gpio-cells = <2>; 646 }; 647 648 // Module 1 IOEXP 649 io_expander1: gpio@21 { 650 compatible = "nxp,pca9555"; 651 reg = <0x21>; 652 gpio-controller; 653 #gpio-cells = <2>; 654 }; 655 656 // HMC IOEXP 657 io_expander2: gpio@27 { 658 compatible = "nxp,pca9555"; 659 reg = <0x27>; 660 gpio-controller; 661 #gpio-cells = <2>; 662 }; 663 664 // Module 0 EEPROM 665 eeprom@50 { 666 compatible = "atmel,24c64"; 667 reg = <0x50>; 668 }; 669 670 // Module 1 EEPROM 671 eeprom@51 { 672 compatible = "atmel,24c64"; 673 reg = <0x51>; 674 }; 675}; 676 677&i2c3 { 678 status = "okay"; 679}; 680 681&i2c4 { 682 status = "okay"; 683}; 684 685&i2c5 { 686 status = "okay"; 687 688 i2c-mux@70 { 689 compatible = "nxp,pca9548"; 690 reg = <0x70>; 691 #address-cells = <1>; 692 #size-cells = <0>; 693 i2c-mux-idle-disconnect; 694 695 i2c5mux0ch0: i2c@0 { 696 #address-cells = <1>; 697 #size-cells = <0>; 698 reg = <0>; 699 }; 700 i2c5mux0ch1: i2c@1 { 701 #address-cells = <1>; 702 #size-cells = <0>; 703 reg = <1>; 704 }; 705 i2c5mux0ch2: i2c@2 { 706 #address-cells = <1>; 707 #size-cells = <0>; 708 reg = <2>; 709 }; 710 i2c5mux0ch3: i2c@3 { 711 #address-cells = <1>; 712 #size-cells = <0>; 713 reg = <3>; 714 }; 715 i2c5mux0ch4: i2c@4 { 716 #address-cells = <1>; 717 #size-cells = <0>; 718 reg = <4>; 719 }; 720 i2c5mux0ch5: i2c@5 { 721 #address-cells = <1>; 722 #size-cells = <0>; 723 reg = <5>; 724 }; 725 i2c5mux0ch6: i2c@6 { 726 #address-cells = <1>; 727 #size-cells = <0>; 728 reg = <6>; 729 // HDD FRU EEPROM 730 eeprom@52 { 731 compatible = "atmel,24c64"; 732 reg = <0x52>; 733 }; 734 }; 735 i2c5mux0ch7: i2c@7 { 736 #address-cells = <1>; 737 #size-cells = <0>; 738 reg = <7>; 739 }; 740 }; 741}; 742 743&i2c6 { 744 status = "okay"; 745 746 // BMC IOEXP on Module 0 747 io_expander3: gpio@21 { 748 compatible = "nxp,pca9555"; 749 reg = <0x21>; 750 gpio-controller; 751 #gpio-cells = <2>; 752 }; 753 754 rtc@6f { 755 compatible = "nuvoton,nct3018y"; 756 reg = <0x6f>; 757 }; 758}; 759 760&i2c7 { 761 status = "okay"; 762}; 763 764&i2c8 { 765 status = "okay"; 766}; 767 768&i2c9 { 769 status = "okay"; 770 771 // SCM CPLD IOEXP 772 io_expander4: gpio@4f { 773 compatible = "nxp,pca9555"; 774 reg = <0x4f>; 775 gpio-controller; 776 #gpio-cells = <2>; 777 }; 778 779 // SCM TEMP SENSOR 780 temperature-sensor@4b { 781 compatible = "ti,tmp75"; 782 reg = <0x4b>; 783 }; 784 785 // SCM FRU EEPROM 786 eeprom@50 { 787 compatible = "atmel,24c64"; 788 reg = <0x50>; 789 }; 790 791 // BSM FRU EEPROM 792 eeprom@56 { 793 compatible = "atmel,24c64"; 794 reg = <0x56>; 795 }; 796}; 797 798&i2c10 { 799 status = "okay"; 800 multi-master; 801 mctp-controller; 802 mctp@10 { 803 compatible = "mctp-i2c-controller"; 804 reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; 805 }; 806 807 // OCP NIC0 TEMP 808 temperature-sensor@1f { 809 compatible = "ti,tmp421"; 810 reg = <0x1f>; 811 }; 812 813 // OCP NIC0 FRU EEPROM 814 eeprom@50 { 815 compatible = "atmel,24c64"; 816 reg = <0x50>; 817 }; 818}; 819 820&i2c11 { 821 status = "okay"; 822 823 ssif-bmc@10 { 824 compatible = "ssif-bmc"; 825 reg = <0x10>; 826 }; 827}; 828 829&i2c12 { 830 status = "okay"; 831 multi-master; 832 833 // Module 1 FRU EEPROM 834 eeprom@50 { 835 compatible = "atmel,24c64"; 836 reg = <0x50>; 837 }; 838 839 // Secondary CBC FRU EEPROM 840 eeprom@54 { 841 compatible = "atmel,24c02"; 842 reg = <0x54>; 843 }; 844}; 845 846&i2c13 { 847 status = "okay"; 848 multi-master; 849 850 // Module 0 FRU EEPROM 851 eeprom@50 { 852 compatible = "atmel,24c64"; 853 reg = <0x50>; 854 }; 855 856 // Primary CBC FRU EEPROM 857 eeprom@54 { 858 compatible = "atmel,24c02"; 859 reg = <0x54>; 860 }; 861 862 // HMC FRU EEPROM 863 eeprom@57 { 864 compatible = "atmel,24c02"; 865 reg = <0x57>; 866 }; 867}; 868 869&i2c14 { 870 status = "okay"; 871 872 // PDB CPLD IOEXP 0x10 873 io_expander9: gpio@10 { 874 compatible = "nxp,pca9555"; 875 interrupt-parent = <&gpio0>; 876 interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>; 877 reg = <0x10>; 878 gpio-controller; 879 #gpio-cells = <2>; 880 }; 881 882 // PDB CPLD IOEXP 0x11 883 io_expander10: gpio@11 { 884 compatible = "nxp,pca9555"; 885 interrupt-parent = <&gpio0>; 886 interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>; 887 reg = <0x11>; 888 gpio-controller; 889 #gpio-cells = <2>; 890 }; 891 892 // PDB CPLD IOEXP 0x12 893 io_expander11: gpio@12 { 894 compatible = "nxp,pca9555"; 895 interrupt-parent = <&gpio0>; 896 interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>; 897 reg = <0x12>; 898 gpio-controller; 899 #gpio-cells = <2>; 900 }; 901 902 // PDB CPLD IOEXP 0x13 903 io_expander12: gpio@13 { 904 compatible = "nxp,pca9555"; 905 interrupt-parent = <&gpio0>; 906 interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>; 907 reg = <0x13>; 908 gpio-controller; 909 #gpio-cells = <2>; 910 }; 911 912 // PDB CPLD IOEXP 0x14 913 io_expander13: gpio@14 { 914 compatible = "nxp,pca9555"; 915 interrupt-parent = <&gpio0>; 916 interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>; 917 reg = <0x14>; 918 gpio-controller; 919 #gpio-cells = <2>; 920 }; 921 922 // PDB CPLD IOEXP 0x15 923 io_expander14: gpio@15 { 924 compatible = "nxp,pca9555"; 925 interrupt-parent = <&gpio0>; 926 interrupts = <ASPEED_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>; 927 reg = <0x15>; 928 gpio-controller; 929 #gpio-cells = <2>; 930 }; 931}; 932 933&i2c15 { 934 status = "okay"; 935 multi-master; 936 mctp-controller; 937 mctp@10 { 938 compatible = "mctp-i2c-controller"; 939 reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; 940 }; 941 942 // OCP NIC1 TEMP 943 temperature-sensor@1f { 944 compatible = "ti,tmp421"; 945 reg = <0x1f>; 946 }; 947 948 // OCP NIC1 FRU EEPROM 949 eeprom@52 { 950 compatible = "atmel,24c64"; 951 reg = <0x52>; 952 }; 953}; 954 955&adc0 { 956 vref-supply = <&p1v8_bmc_aux>; 957 status = "okay"; 958 959 pinctrl-names = "default"; 960 pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default 961 &pinctrl_adc2_default &pinctrl_adc3_default 962 &pinctrl_adc4_default &pinctrl_adc5_default 963 &pinctrl_adc6_default &pinctrl_adc7_default>; 964}; 965 966&adc1 { 967 vref-supply = <&p2v5_bmc_aux>; 968 status = "okay"; 969 970 pinctrl-names = "default"; 971 pinctrl-0 = <&pinctrl_adc10_default>; 972}; 973 974&ehci0 { 975 status = "okay"; 976}; 977 978&wdt1 { 979 status = "okay"; 980 pinctrl-names = "default"; 981 pinctrl-0 = <&pinctrl_wdtrst1_default>; 982 aspeed,reset-type = "soc"; 983 aspeed,external-signal; 984 aspeed,ext-push-pull; 985 aspeed,ext-active-high; 986 aspeed,ext-pulse-duration = <256>; 987}; 988 989&pinctrl { 990 pinctrl_ncsi3_default: ncsi3_default { 991 function = "RMII3"; 992 groups = "NCSI3"; 993 }; 994 995 pinctrl_ncsi4_default: ncsi4_default { 996 function = "RMII4"; 997 groups = "NCSI4"; 998 }; 999}; 1000 1001&gpio0 { 1002 gpio-line-names = 1003 /*A0-A7*/ "","","","","","","","", 1004 /*B0-B7*/ "BATTERY_DETECT","PRSNT1_HPM_SCM_N", 1005 "BMC_I2C1_FPGA_ALERT_L","BMC_READY", 1006 "IOEXP_INT_L","FM_ID_LED", 1007 "","", 1008 /*C0-C7*/ "","","","", 1009 "PMBUS_REQ_N","PSU_FW_UPDATE_REQ_N", 1010 "","BMC_I2C_SSIF_ALERT_L", 1011 /*D0-D7*/ "","","","","","","","", 1012 /*E0-E7*/ "","","","","","","","", 1013 /*F0-F7*/ "","","","","","","","", 1014 /*G0-G7*/ "","","","","","", 1015 "FM_DEBUG_PORT_PRSNT_N","FM_BMC_DBP_PRESENT_N", 1016 /*H0-H7*/ "PWR_BRAKE_L","RUN_POWER_EN", 1017 "SHDN_FORCE_L","SHDN_REQ_L", 1018 "","","","", 1019 /*I0-I7*/ "","","","", 1020 "","FLASH_WP_STATUS", 1021 "FM_PDB_HEALTH_N","RUN_POWER_PG", 1022 /*J0-J7*/ "","","","","","","","", 1023 /*K0-K7*/ "","","","","","","","", 1024 /*L0-L7*/ "","","","","","","","", 1025 /*M0-M7*/ "PCIE_EP_RST_EN","BMC_FRU_WP", 1026 "SCM_HPM_STBY_RST_N","SCM_HPM_STBY_EN", 1027 "STBY_POWER_PG_3V3","TH500_SHDN_OK_L","","", 1028 /*N0-N7*/ "LED_POSTCODE_0","LED_POSTCODE_1", 1029 "LED_POSTCODE_2","LED_POSTCODE_3", 1030 "LED_POSTCODE_4","LED_POSTCODE_5", 1031 "LED_POSTCODE_6","LED_POSTCODE_7", 1032 /*O0-O7*/ "HMC_I2C3_FPGA_ALERT_L","FPGA_READY_HMC", 1033 "CHASSIS_AC_LOSS_L","BSM_PRSNT_R_N", 1034 "PSU_SMB_ALERT_L","FM_TPM_PRSNT_0_N", 1035 "","USBDBG_IPMI_EN_L", 1036 /*P0-P7*/ "PWR_BTN_BMC_N","IPEX_CABLE_PRSNT_L", 1037 "ID_RST_BTN_BMC_N","RST_BMC_RSTBTN_OUT_N", 1038 "host0-ready","BMC_READY_CPLD","","BMC_HEARTBEAT_N", 1039 /*Q0-Q7*/ "IRQ_PCH_TPM_SPI_N","USB_OC0_REAR_R_N", 1040 "UART_MUX_SEL","I2C_MUX_RESET_L", 1041 "RSVD_NV_PLT_DETECT","SPI_TPM_INT_L", 1042 "CPU_JTAG_MUX_SELECT","THERM_BB_OVERT_L", 1043 /*R0-R7*/ "THERM_BB_WARN_L","SPI_BMC_FPGA_INT_L", 1044 "CPU_BOOT_DONE","PMBUS_GNT_L", 1045 "CHASSIS_PWR_BRK_L","PCIE_WAKE_L", 1046 "PDB_THERM_OVERT_L","HMC_I2C2_FPGA_ALERT_L", 1047 /*S0-S7*/ "","","SYS_BMC_PWRBTN_R_N","FM_TPM_PRSNT_1_N", 1048 "FM_BMC_DEBUG_SW_N","UID_LED_N", 1049 "SYS_FAULT_LED_N","RUN_POWER_FAULT_L", 1050 /*T0-T7*/ "","","","","","","","", 1051 /*U0-U7*/ "","","","","","","","", 1052 /*V0-V7*/ "L2_RST_REQ_OUT_L","L0L1_RST_REQ_OUT_L", 1053 "BMC_ID_BEEP_SEL","BMC_I2C0_FPGA_ALERT_L", 1054 "SMB_BMC_TMP_ALERT","PWR_LED_N", 1055 "SYS_RST_OUT_L","IRQ_TPM_SPI_N", 1056 /*W0-W7*/ "","","","","","","","", 1057 /*X0-X7*/ "","","","","","","","", 1058 /*Y0-Y7*/ "","RST_BMC_SELF_HW", 1059 "FM_FLASH_LATCH_N","BMC_EMMC_RST_N", 1060 "","","","", 1061 /*Z0-Z7*/ "","","","","","","",""; 1062}; 1063 1064&io_expander0 { 1065 gpio-line-names = 1066 "FPGA_THERM_OVERT_L","FPGA_READY_BMC", 1067 "HMC_BMC_DETECT","HMC_PGOOD", 1068 "","BMC_SELF_PWR_CYCLE", 1069 "FPGA_EROT_FATAL_ERROR_L","WP_HW_EXT_CTRL_L", 1070 "EROT_FPGA_RST_L","FPGA_EROT_RECOVERY_L", 1071 "BMC_EROT_FPGA_SPI_MUX_SEL","USB2_HUB_RESET_L", 1072 "NCSI_CS1_SEL","SGPIO_EN_L", 1073 "B2B_IOEXP_INT_L","I2C_BUS_MUX_RESET_L"; 1074}; 1075 1076&io_expander1 { 1077 gpio-line-names = 1078 "SEC_FPGA_THERM_OVERT_L","SEC_FPGA_READY_BMC", 1079 "","", 1080 "","", 1081 "SEC_FPGA_EROT_FATAL_ERROR_L","SEC_WP_HW_EXT_CTRL_L", 1082 "SEC_EROT_FPGA_RST_L","SEC_FPGA_EROT_RECOVERY_L", 1083 "SEC_BMC_EROT_FPGA_SPI_MUX_SEL","", 1084 "","", 1085 "","SEC_I2C_BUS_MUX_RESET_L"; 1086}; 1087 1088&io_expander2 { 1089 gpio-line-names = 1090 "HMC_PRSNT_L","HMC_READY", 1091 "HMC_EROT_FATAL_ERROR_L","I2C_MUX_SEL", 1092 "HMC_EROT_SPI_MUX_SEL","HMC_EROT_RECOVERY_L", 1093 "HMC_EROT_RST_L","GLOBAL_WP_HMC", 1094 "FPGA_RST_L","USB2_HUB_RST", 1095 "CPU_UART_MUX_SEL","", 1096 "","","",""; 1097}; 1098 1099&io_expander3 { 1100 gpio-line-names = 1101 "RTC_MUX_SEL","PCI_MUX_SEL","TPM_MUX_SEL","FAN_MUX-SEL", 1102 "SGMII_MUX_SEL","DP_MUX_SEL","UPHY3_USB_SEL","NCSI_MUX_SEL", 1103 "BMC_PHY_RST","RTC_CLR_L","BMC_12V_CTRL","PS_RUN_IO0_PG", 1104 "","","",""; 1105}; 1106 1107&io_expander4 { 1108 gpio-line-names = 1109 "stby_power_en_cpld","stby_power_gd_cpld","","", 1110 "","","","", 1111 "","","","", 1112 "","","",""; 1113}; 1114 1115&io_expander5 { 1116 gpio-line-names = 1117 "JTAG_MUX_SEL","IOX_BMC_RESET","","", 1118 "","","",""; 1119}; 1120 1121&io_expander6 { 1122 gpio-line-names = 1123 "OSFP_PHASE_ID0","OSFP_PHASE_ID1", 1124 "OSFP_PHASE_ID2","OSFP_PHASE_ID3", 1125 "","","","", 1126 "OSFP_BOARD_ID0","OSFP_BOARD_ID1", 1127 "OSFP_BOARD_ID2","PWRGD_P3V3_N1", 1128 "PWRGD_P3V3_N2","","",""; 1129}; 1130 1131&io_expander7 { 1132 gpio-line-names = 1133 "RST_CX7_0","RST_CX7_1", 1134 "CX0_SSD0_PRSNT_L","CX1_SSD1_PRSNT_L", 1135 "CX_BOOT_CMPLT_CX0","CX_BOOT_CMPLT_CX1", 1136 "CX_TWARN_CX0_L","CX_TWARN_CX1_L", 1137 "CX_OVT_SHDN_CX0","CX_OVT_SHDN_CX1", 1138 "FNP_L_CX0","FNP_L_CX1", 1139 "","MCU_GPIO","MCU_RST_N","MCU_RECOVERY_N"; 1140}; 1141 1142&io_expander8 { 1143 gpio-line-names = 1144 "SEC_RST_CX7_0","SEC_RST_CX7_1", 1145 "SEC_CX0_SSD0_PRSNT_L","SEC_CX1_SSD1_PRSNT_L", 1146 "SEC_CX_BOOT_CMPLT_CX0","SEC_CX_BOOT_CMPLT_CX1", 1147 "SEC_CX_TWARN_CX0_L","SEC_CX_TWARN_CX1_L", 1148 "SEC_CX_OVT_SHDN_CX0","SEC_CX_OVT_SHDN_CX1", 1149 "SEC_FNP_L_CX0","SEC_FNP_L_CX1", 1150 "","SEC_MCU_GPIO","SEC_MCU_RST_N","SEC_MCU_RECOVERY_N"; 1151}; 1152 1153&io_expander9 { 1154 gpio-line-names = 1155 "LEAK3_DETECT_R","LEAK1_DETECT_R", 1156 "LEAK2_DETECT_R","LEAK0_DETECT_R", 1157 "CHASSIS3_LEAK_Q_N_PLD","CHASSIS1_LEAK_Q_N_PLD", 1158 "CHASSIS2_LEAK_Q_N_PLD","CHASSIS0_LEAK_Q_N_PLD", 1159 "P12V_AUX_FAN_ALERT_PLD_N","P12V_AUX_FAN_OC_PLD_N", 1160 "P12V_AUX_FAN_FAULT_PLD_N","LEAK_DETECT_RMC_N_R", 1161 "RSVD_RMC_GPIO3_R","SMB_RJ45_FIO_TMP_ALERT", 1162 "",""; 1163}; 1164 1165&io_expander10 { 1166 gpio-line-names = 1167 "FM_P12V_NIC1_FLTB_R_N","FM_P3V3_NIC1_FAULT_R_N", 1168 "OCP_V3_2_PWRBRK_FROM_HOST_ISO_PLD_N", 1169 "P12V_AUX_NIC1_SENSE_ALERT_R_N", 1170 "FM_P12V_NIC0_FLTB_R_N","FM_P3V3_NIC0_FAULT_R_N", 1171 "OCP_SFF_PWRBRK_FROM_HOST_ISO_PLD_N", 1172 "P12V_AUX_NIC0_SENSE_ALERT_R_N", 1173 "P12V_AUX_PSU_SMB_ALERT_R_L","P12V_SCM_SENSE_ALERT_R_N", 1174 "NODEB_PSU_SMB_ALERT_R_L","NODEA_PSU_SMB_ALERT_R_L", 1175 "P52V_SENSE_ALERT_PLD_N","P48V_HS2_FAULT_N_PLD", 1176 "P48V_HS1_FAULT_N_PLD",""; 1177}; 1178 1179&io_expander11 { 1180 gpio-line-names = 1181 "FAN_7_PRESENT_N","FAN_6_PRESENT_N", 1182 "FAN_5_PRESENT_N","FAN_4_PRESENT_N", 1183 "FAN_3_PRESENT_N","FAN_2_PRESENT_N", 1184 "FAN_1_PRESENT_N","FAN_0_PRESENT_N", 1185 "PRSNT_CHASSIS3_LEAK_CABLE_R_N","PRSNT_CHASSIS1_LEAK_CABLE_R_N", 1186 "PRSNT_CHASSIS2_LEAK_CABLE_R_N","PRSNT_CHASSIS0_LEAK_CABLE_R_N", 1187 "PRSNT_RJ45_FIO_N_R","PRSNT_HDDBD_POWER_CABLE_N", 1188 "PRSNT_OSFP_POWER_CABLE_N",""; 1189}; 1190 1191&io_expander12 { 1192 gpio-line-names = 1193 "RST_OCP_V3_1_R_N","NIC0_PERST_N", 1194 "OCP_SFF_PERST_FROM_HOST_ISO_PLD_N","OCP_SFF_MAIN_PWR_EN", 1195 "FM_OCP_SFF_PWR_GOOD_PLD","OCP_SFF_AUX_PWR_PLD_EN_R", 1196 "HP_LVC3_OCP_V3_1_PWRGD_PLD","HP_OCP_V3_1_HSC_PWRGD_PLD_R", 1197 "RST_OCP_V3_2_R_N","NIC1_PERST_N", 1198 "OCP_V3_2_PERST_FROM_HOST_ISO_PLD_N","OCP_V3_2_MAIN_PWR_EN", 1199 "FM_OCP_V3_2_PWR_GOOD_PLD","OCP_V3_2_AUX_PWR_PLD_EN_R", 1200 "HP_LVC3_OCP_V3_2_PWRGD_PLD","HP_OCP_V3_2_HSC_PWRGD_PLD_R"; 1201}; 1202 1203&io_expander13 { 1204 gpio-line-names = 1205 "NODEA_NODEB_PWOK_PLD_ISO_R","PWR_EN_NICS", 1206 "PWRGD_P12V_AUX_FAN_PLD","P12V_AUX_FAN_EN_PLD", 1207 "PWRGD_P3V3_AUX_PLD","PWRGD_P12V_AUX_PLD_ISO_R", 1208 "FM_MAIN_PWREN_FROM_RMC_R","FM_MAIN_PWREN_RMC_EN_ISO_R", 1209 "PWRGD_RMC_R","PWRGD_P12V_AUX_FAN_PLD", 1210 "P12V_AUX_FAN_EN_PLD","FM_SYS_THROTTLE_N", 1211 "HP_LVC3_OCP_V3_2_PRSNT2_PLD_N","HP_LVC3_OCP_V3_1_PRSNT2_PLD_N", 1212 "",""; 1213}; 1214 1215&io_expander14 { 1216 gpio-line-names = 1217 "","","","","","","","", 1218 "FM_BOARD_BMC_SKU_ID3","FM_BOARD_BMC_SKU_ID2", 1219 "FM_BOARD_BMC_SKU_ID1","FM_BOARD_BMC_SKU_ID0", 1220 "FAB_BMC_REV_ID2","FAB_BMC_REV_ID1", 1221 "FAB_BMC_REV_ID0",""; 1222}; 1223