xref: /linux/arch/arm/boot/dts/actions/owl-s500-roseapplepi.dts (revision 6c1561fb900524c5bceb924071b3e9b8a67ff3da)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Roseapple Pi
4 *
5 * Copyright (C) 2020-2021 Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
6 */
7
8/dts-v1/;
9
10#include "owl-s500.dtsi"
11
12/ {
13	compatible = "roseapplepi,roseapplepi", "actions,s500";
14	model = "Roseapple Pi";
15
16	aliases {
17		mmc0 = &mmc0;
18		serial2 = &uart2;
19	};
20
21	chosen {
22		stdout-path = "serial2:115200n8";
23	};
24
25	memory@0 {
26		device_type = "memory";
27		reg = <0x0 0x80000000>; /* 2GB */
28	};
29
30	syspwr: regulator-5v0 {
31		compatible = "regulator-fixed";
32		regulator-name = "SYSPWR";
33		regulator-min-microvolt = <5000000>;
34		regulator-max-microvolt = <5000000>;
35		regulator-always-on;
36	};
37};
38
39&cpu0 {
40	cpu0-supply = <&vdd_cpu>;
41};
42
43&i2c0 {
44	status = "okay";
45	pinctrl-names = "default";
46	pinctrl-0 = <&i2c0_pins>;
47
48	atc260x: pmic@65 {
49		compatible = "actions,atc2603c";
50		reg = <0x65>;
51		interrupt-parent = <&sirq>;
52		interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
53
54		reset-time-sec = <6>;
55
56		regulators {
57			compatible = "actions,atc2603c-regulator";
58
59			dcdc1-supply = <&syspwr>;
60			dcdc2-supply = <&syspwr>;
61			dcdc3-supply = <&syspwr>;
62			ldo1-supply = <&syspwr>;
63			ldo2-supply = <&syspwr>;
64			ldo3-supply = <&syspwr>;
65			ldo5-supply = <&syspwr>;
66			ldo6-supply = <&syspwr>;
67			ldo7-supply = <&syspwr>;
68			ldo8-supply = <&syspwr>;
69			ldo11-supply = <&syspwr>;
70			ldo12-supply = <&syspwr>;
71			switchldo1-supply = <&vcc>;
72
73			vdd_cpu: dcdc1 {
74				regulator-name = "VDD_CPU";
75				regulator-min-microvolt = <700000>;
76				regulator-max-microvolt = <1400000>;
77				regulator-always-on;
78			};
79
80			vddq: dcdc2 {
81				regulator-name = "VDDQ";
82				regulator-min-microvolt = <1300000>;
83				regulator-max-microvolt = <2150000>;
84				regulator-always-on;
85				regulator-boot-on;
86			};
87
88			vcc: dcdc3 {
89				regulator-name = "VCC";
90				regulator-min-microvolt = <2600000>;
91				regulator-max-microvolt = <3300000>;
92				regulator-always-on;
93			};
94
95			vcc_3v3: ldo1 {
96				regulator-name = "VCC_3V3";
97				regulator-min-microvolt = <2600000>;
98				regulator-max-microvolt = <3300000>;
99				regulator-always-on;
100			};
101
102			avcc: ldo2 {
103				regulator-name = "AVCC";
104				regulator-min-microvolt = <2600000>;
105				regulator-max-microvolt = <3300000>;
106				regulator-always-on;
107			};
108
109			vdd_1v8: ldo3 {
110				regulator-name = "VDD_1V8";
111				regulator-min-microvolt = <1500000>;
112				regulator-max-microvolt = <2000000>;
113				regulator-always-on;
114			};
115
116			vcc_3v1: ldo5 {
117				regulator-name = "VCC_3V1";
118				regulator-min-microvolt = <2600000>;
119				regulator-max-microvolt = <3300000>;
120			};
121
122			avdd: ldo6 {
123				regulator-name = "AVDD";
124				regulator-min-microvolt = <700000>;
125				regulator-max-microvolt = <1400000>;
126				regulator-always-on;
127			};
128
129			sens_1v8: ldo7 {
130				regulator-name = "SENS_1V8";
131				regulator-min-microvolt = <1800000>;
132				regulator-max-microvolt = <1800000>;
133			};
134
135			ldo8: ldo8 {
136				regulator-name = "LDO8";
137				regulator-min-microvolt = <2300000>;
138				regulator-max-microvolt = <3300000>;
139			};
140
141			svcc: ldo11 {
142				regulator-name = "SVCC";
143				regulator-min-microvolt = <2600000>;
144				regulator-max-microvolt = <3300000>;
145				regulator-always-on;
146			};
147
148			rtc_vdd: ldo12 {
149				regulator-name = "RTC_VDD";
150				regulator-min-microvolt = <1800000>;
151				regulator-max-microvolt = <1800000>;
152				regulator-always-on;
153			};
154
155			sd_vcc: switchldo1 {
156				regulator-name = "SD_VCC";
157				regulator-min-microvolt = <3000000>;
158				regulator-max-microvolt = <3300000>;
159				regulator-always-on;
160				regulator-boot-on;
161			};
162		};
163	};
164};
165
166&i2c1 {
167	status = "disabled";
168	pinctrl-names = "default";
169	pinctrl-0 = <&i2c1_pins>;
170};
171
172&i2c2 {
173	status = "disabled";
174	pinctrl-names = "default";
175	pinctrl-0 = <&i2c2_pins>;
176};
177
178&pinctrl {
179	i2c0_pins: i2c0-pins {
180		pinmux {
181			groups = "i2c0_mfp";
182			function = "i2c0";
183		};
184
185		pinconf {
186			pins = "i2c0_sclk", "i2c0_sdata";
187			bias-pull-up;
188		};
189	};
190
191	i2c1_pins: i2c1-pins {
192		pinconf {
193			pins = "i2c1_sclk", "i2c1_sdata";
194			bias-pull-up;
195		};
196	};
197
198	i2c2_pins: i2c2-pins {
199		pinconf {
200			pins = "i2c2_sclk", "i2c2_sdata";
201			bias-pull-up;
202		};
203	};
204
205	mmc0_pins: mmc0-pins {
206		pinmux {
207			groups = "sd0_d0_mfp", "sd0_d1_mfp", "sd0_d2_d3_mfp",
208				 "sd0_cmd_mfp", "sd0_clk_mfp";
209			function = "sd0";
210		};
211
212		drv-pinconf {
213			groups = "sd0_d0_d3_drv", "sd0_cmd_drv", "sd0_clk_drv";
214			drive-strength = <8>;
215		};
216
217		bias0-pinconf {
218			pins = "sd0_d0", "sd0_d1", "sd0_d2",
219			       "sd0_d3", "sd0_cmd";
220			bias-pull-up;
221		};
222
223		bias1-pinconf {
224			pins = "sd0_clk";
225			bias-pull-down;
226		};
227	};
228
229	ethernet_pins: ethernet-pins {
230		eth_rmii-pinmux {
231			groups = "rmii_txd0_mfp", "rmii_txd1_mfp",
232				 "rmii_rxd0_mfp", "rmii_rxd1_mfp",
233				 "rmii_txen_mfp", "rmii_rxen_mfp",
234				 "rmii_crs_dv_mfp", "rmii_ref_clk_mfp";
235			function = "eth_rmii";
236		};
237
238		phy_clk-pinmux {
239			groups = "clko_25m_mfp";
240			function = "clko_25m";
241		};
242
243		ref_clk-pinconf {
244			groups = "rmii_ref_clk_drv";
245			drive-strength = <2>;
246		};
247
248	};
249};
250
251/* uSD */
252&mmc0 {
253	status = "okay";
254	pinctrl-names = "default";
255	pinctrl-0 = <&mmc0_pins>;
256	no-sdio;
257	no-mmc;
258	no-1-8-v;
259	cd-gpios = <&pinctrl 117 GPIO_ACTIVE_LOW>;
260	bus-width = <4>;
261	vmmc-supply = <&sd_vcc>;
262	vqmmc-supply = <&sd_vcc>;
263};
264
265&ethernet {
266	pinctrl-names = "default";
267	pinctrl-0 = <&ethernet_pins>;
268	phy-mode = "rmii";
269	phy-handle = <&eth_phy>;
270	status = "okay";
271
272	mdio {
273		#address-cells = <1>;
274		#size-cells = <0>;
275
276		reset-gpios = <&pinctrl 88 GPIO_ACTIVE_LOW>; /* GPIOC24 */
277		reset-delay-us = <10000>;
278		reset-post-delay-us = <150000>;
279
280		eth_phy: ethernet-phy@3 {
281			reg = <0x3>;
282			max-speed = <100>;
283			interrupt-parent = <&sirq>;
284			interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
285		};
286	};
287};
288
289&twd_timer {
290	status = "okay";
291};
292
293&timer {
294	clocks = <&hosc>;
295};
296
297&uart2 {
298	status = "okay";
299};
300