xref: /linux/arch/arm/boot/compressed/ll_char_wr.S (revision a4eb44a6435d6d8f9e642407a4a06f65eb90ca04)
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 *  linux/arch/arm/lib/ll_char_wr.S
4 *
5 *  Copyright (C) 1995, 1996 Russell King.
6 *
7 *  Speedups & 1bpp code (C) 1996 Philip Blundell & Russell King.
8 *
9 *  10-04-96	RMK	Various cleanups & reduced register usage.
10 *  08-04-98	RMK	Shifts re-ordered
11 */
12
13@ Regs: [] = corruptible
14@       {} = used
15@       () = do not use
16
17#include <linux/linkage.h>
18#include <asm/assembler.h>
19	.text
20
21LC0:	.word	LC0
22	.word	bytes_per_char_h
23	.word	video_size_row
24	.word	acorndata_8x8
25	.word	con_charconvtable
26
27/*
28 * r0 = ptr
29 * r1 = char
30 * r2 = white
31 */
32ENTRY(ll_write_char)
33	stmfd	sp!, {r4 - r7, lr}
34@
35@ Smashable regs: {r0 - r3}, [r4 - r7], (r8 - fp), [ip], (sp), [lr], (pc)
36@
37	/*
38	 * calculate offset into character table
39	 */
40	mov	r1, r1, lsl #3
41	/*
42	 * calculate offset required for each row.
43	 */
44	adr	ip, LC0
45	ldmia	ip, {r3, r4, r5, r6, lr}
46	sub	ip, ip, r3
47	add	r6, r6, ip
48	add	lr, lr, ip
49	ldr	r4, [r4, ip]
50	ldr	r5, [r5, ip]
51	/*
52	 * Go to resolution-dependent routine...
53	 */
54	cmp	r4, #4
55	blt	Lrow1bpp
56	add	r0, r0, r5, lsl #3		@ Move to bottom of character
57	orr	r1, r1, #7
58	ldrb	r7, [r6, r1]
59	teq	r4, #8
60	beq	Lrow8bpplp
61@
62@ Smashable regs: {r0 - r3}, [r4], {r5 - r7}, (r8 - fp), [ip], (sp), {lr}, (pc)
63@
64Lrow4bpplp:
65	ldr	r7, [lr, r7, lsl #2]
66	mul	r7, r2, r7
67	sub	r1, r1, #1			@ avoid using r7 directly after
68	str	r7, [r0, -r5]!
69	ldrb	r7, [r6, r1]
70	ldr	r7, [lr, r7, lsl #2]
71	mul	r7, r2, r7
72	tst	r1, #7				@ avoid using r7 directly after
73	str	r7, [r0, -r5]!
74	subne	r1, r1, #1
75	ldrbne	r7, [r6, r1]
76	bne	Lrow4bpplp
77	ldmfd	sp!, {r4 - r7, pc}
78
79@
80@ Smashable regs: {r0 - r3}, [r4], {r5 - r7}, (r8 - fp), [ip], (sp), {lr}, (pc)
81@
82Lrow8bpplp:
83	mov	ip, r7, lsr #4
84	ldr	ip, [lr, ip, lsl #2]
85	mul	r4, r2, ip
86	and	ip, r7, #15			@ avoid r4
87	ldr	ip, [lr, ip, lsl #2]		@ avoid r4
88	mul	ip, r2, ip			@ avoid r4
89	sub	r1, r1, #1			@ avoid ip
90	sub	r0, r0, r5			@ avoid ip
91	stmia	r0, {r4, ip}
92	ldrb	r7, [r6, r1]
93	mov	ip, r7, lsr #4
94	ldr	ip, [lr, ip, lsl #2]
95	mul	r4, r2, ip
96	and	ip, r7, #15			@ avoid r4
97	ldr	ip, [lr, ip, lsl #2]		@ avoid r4
98	mul	ip, r2, ip			@ avoid r4
99	tst	r1, #7				@ avoid ip
100	sub	r0, r0, r5			@ avoid ip
101	stmia	r0, {r4, ip}
102	subne	r1, r1, #1
103	ldrbne	r7, [r6, r1]
104	bne	Lrow8bpplp
105	ldmfd	sp!, {r4 - r7, pc}
106
107@
108@ Smashable regs: {r0 - r3}, [r4], {r5, r6}, [r7], (r8 - fp), [ip], (sp), [lr], (pc)
109@
110Lrow1bpp:
111	add	r6, r6, r1
112	ldmia	r6, {r4, r7}
113	strb	r4, [r0], r5
114	mov	r4, r4, lsr #8
115	strb	r4, [r0], r5
116	mov	r4, r4, lsr #8
117	strb	r4, [r0], r5
118	mov	r4, r4, lsr #8
119	strb	r4, [r0], r5
120	strb	r7, [r0], r5
121	mov	r7, r7, lsr #8
122	strb	r7, [r0], r5
123	mov	r7, r7, lsr #8
124	strb	r7, [r0], r5
125	mov	r7, r7, lsr #8
126	strb	r7, [r0], r5
127	ldmfd	sp!, {r4 - r7, pc}
128
129	.bss
130ENTRY(con_charconvtable)
131	.space	1024
132