1/* 2 * linux/arch/arm/boot/compressed/head-sa1100.S 3 * 4 * Copyright (C) 1999 Nicolas Pitre <nico@fluxnic.net> 5 * 6 * SA1100 specific tweaks. This is merged into head.S by the linker. 7 * 8 */ 9 10#include <linux/linkage.h> 11#include <asm/mach-types.h> 12 13 .section ".start", "ax" 14 15__SA1100_start: 16 17 @ Preserve r8/r7 i.e. kernel entry values 18#ifdef CONFIG_SA1100_COLLIE 19 mov r7, #MACH_TYPE_COLLIE 20#endif 21#ifdef CONFIG_SA1100_SIMPAD 22 @ UNTIL we've something like an open bootldr 23 mov r7, #MACH_TYPE_SIMPAD @should be 87 24#endif 25 mrc p15, 0, r0, c1, c0, 0 @ read control reg 26 ands r0, r0, #0x0d 27 beq 99f 28 29 @ Data cache might be active. 30 @ Be sure to flush kernel binary out of the cache, 31 @ whatever state it is, before it is turned off. 32 @ This is done by fetching through currently executed 33 @ memory to be sure we hit the same cache. 34 bic r2, pc, #0x1f 35 add r3, r2, #0x4000 @ 16 kb is quite enough... 361: ldr r0, [r2], #32 37 teq r2, r3 38 bne 1b 39 mcr p15, 0, r0, c7, c10, 4 @ drain WB 40 mcr p15, 0, r0, c7, c7, 0 @ flush I & D caches 41 42 @ disabling MMU and caches 43 mrc p15, 0, r0, c1, c0, 0 @ read control reg 44 bic r0, r0, #0x0d @ clear WB, DC, MMU 45 bic r0, r0, #0x1000 @ clear Icache 46 mcr p15, 0, r0, c1, c0, 0 4799: 48