1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * linux/arch/arm/boot/compressed/head-sa1100.S 4 * 5 * Copyright (C) 1999 Nicolas Pitre <nico@fluxnic.net> 6 * 7 * SA1100 specific tweaks. This is merged into head.S by the linker. 8 * 9 */ 10 11#include <linux/linkage.h> 12#include <asm/mach-types.h> 13 14 .section ".start", "ax" 15 .arch armv4 16 17__SA1100_start: 18 19 @ Preserve r8/r7 i.e. kernel entry values 20#ifdef CONFIG_SA1100_COLLIE 21 mov r7, #MACH_TYPE_COLLIE 22#endif 23#ifdef CONFIG_SA1100_SIMPAD 24 @ UNTIL we've something like an open bootldr 25 mov r7, #MACH_TYPE_SIMPAD @should be 87 26#endif 27 mrc p15, 0, r0, c1, c0, 0 @ read control reg 28 ands r0, r0, #0x0d 29 beq 99f 30 31 @ Data cache might be active. 32 @ Be sure to flush kernel binary out of the cache, 33 @ whatever state it is, before it is turned off. 34 @ This is done by fetching through currently executed 35 @ memory to be sure we hit the same cache. 36 bic r2, pc, #0x1f 37 add r3, r2, #0x4000 @ 16 kb is quite enough... 381: ldr r0, [r2], #32 39 teq r2, r3 40 bne 1b 41 mcr p15, 0, r0, c7, c10, 4 @ drain WB 42 mcr p15, 0, r0, c7, c7, 0 @ flush I & D caches 43 44 @ disabling MMU and caches 45 mrc p15, 0, r0, c1, c0, 0 @ read control reg 46 bic r0, r0, #0x0d @ clear WB, DC, MMU 47 bic r0, r0, #0x1000 @ clear Icache 48 mcr p15, 0, r0, c1, c0, 0 4999: 50