11da177e4SLinus Torvalds/* 21da177e4SLinus Torvalds * linux/arch/arm/boot/compressed/head-sa1100.S 31da177e4SLinus Torvalds * 42f82af08SNicolas Pitre * Copyright (C) 1999 Nicolas Pitre <nico@fluxnic.net> 51da177e4SLinus Torvalds * 61da177e4SLinus Torvalds * SA1100 specific tweaks. This is merged into head.S by the linker. 71da177e4SLinus Torvalds * 81da177e4SLinus Torvalds */ 91da177e4SLinus Torvalds 101da177e4SLinus Torvalds#include <linux/linkage.h> 111da177e4SLinus Torvalds#include <asm/mach-types.h> 121da177e4SLinus Torvalds 131da177e4SLinus Torvalds .section ".start", "ax" 14*da94a829SArnd Bergmann .arch armv4 151da177e4SLinus Torvalds 161da177e4SLinus Torvalds__SA1100_start: 171da177e4SLinus Torvalds 181da177e4SLinus Torvalds @ Preserve r8/r7 i.e. kernel entry values 191da177e4SLinus Torvalds#ifdef CONFIG_SA1100_COLLIE 201da177e4SLinus Torvalds mov r7, #MACH_TYPE_COLLIE 211da177e4SLinus Torvalds#endif 221da177e4SLinus Torvalds#ifdef CONFIG_SA1100_SIMPAD 231da177e4SLinus Torvalds @ UNTIL we've something like an open bootldr 241da177e4SLinus Torvalds mov r7, #MACH_TYPE_SIMPAD @should be 87 251da177e4SLinus Torvalds#endif 261da177e4SLinus Torvalds mrc p15, 0, r0, c1, c0, 0 @ read control reg 271da177e4SLinus Torvalds ands r0, r0, #0x0d 281da177e4SLinus Torvalds beq 99f 291da177e4SLinus Torvalds 301da177e4SLinus Torvalds @ Data cache might be active. 311da177e4SLinus Torvalds @ Be sure to flush kernel binary out of the cache, 321da177e4SLinus Torvalds @ whatever state it is, before it is turned off. 331da177e4SLinus Torvalds @ This is done by fetching through currently executed 341da177e4SLinus Torvalds @ memory to be sure we hit the same cache. 351da177e4SLinus Torvalds bic r2, pc, #0x1f 361da177e4SLinus Torvalds add r3, r2, #0x4000 @ 16 kb is quite enough... 371da177e4SLinus Torvalds1: ldr r0, [r2], #32 381da177e4SLinus Torvalds teq r2, r3 391da177e4SLinus Torvalds bne 1b 401da177e4SLinus Torvalds mcr p15, 0, r0, c7, c10, 4 @ drain WB 411da177e4SLinus Torvalds mcr p15, 0, r0, c7, c7, 0 @ flush I & D caches 421da177e4SLinus Torvalds 431da177e4SLinus Torvalds @ disabling MMU and caches 441da177e4SLinus Torvalds mrc p15, 0, r0, c1, c0, 0 @ read control reg 451da177e4SLinus Torvalds bic r0, r0, #0x0d @ clear WB, DC, MMU 461da177e4SLinus Torvalds bic r0, r0, #0x1000 @ clear Icache 471da177e4SLinus Torvalds mcr p15, 0, r0, c1, c0, 0 481da177e4SLinus Torvalds99: 49