1 /* 2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 * 8 * RajeshwarR: Dec 11, 2007 9 * -- Added support for Inter Processor Interrupts 10 * 11 * Vineetg: Nov 1st, 2007 12 * -- Initial Write (Borrowed heavily from ARM) 13 */ 14 15 #include <linux/spinlock.h> 16 #include <linux/sched.h> 17 #include <linux/interrupt.h> 18 #include <linux/profile.h> 19 #include <linux/mm.h> 20 #include <linux/cpu.h> 21 #include <linux/irq.h> 22 #include <linux/atomic.h> 23 #include <linux/cpumask.h> 24 #include <linux/reboot.h> 25 #include <asm/processor.h> 26 #include <asm/setup.h> 27 #include <asm/mach_desc.h> 28 29 #ifndef CONFIG_ARC_HAS_LLSC 30 arch_spinlock_t smp_atomic_ops_lock = __ARCH_SPIN_LOCK_UNLOCKED; 31 arch_spinlock_t smp_bitops_lock = __ARCH_SPIN_LOCK_UNLOCKED; 32 #endif 33 34 struct plat_smp_ops plat_smp_ops; 35 36 /* XXX: per cpu ? Only needed once in early seconday boot */ 37 struct task_struct *secondary_idle_tsk; 38 39 /* Called from start_kernel */ 40 void __init smp_prepare_boot_cpu(void) 41 { 42 } 43 44 /* 45 * Initialise the CPU possible map early - this describes the CPUs 46 * which may be present or become present in the system. 47 */ 48 void __init smp_init_cpus(void) 49 { 50 unsigned int i; 51 52 for (i = 0; i < NR_CPUS; i++) 53 set_cpu_possible(i, true); 54 } 55 56 /* called from init ( ) => process 1 */ 57 void __init smp_prepare_cpus(unsigned int max_cpus) 58 { 59 int i; 60 61 /* 62 * Initialise the present map, which describes the set of CPUs 63 * actually populated at the present time. 64 */ 65 for (i = 0; i < max_cpus; i++) 66 set_cpu_present(i, true); 67 } 68 69 void __init smp_cpus_done(unsigned int max_cpus) 70 { 71 72 } 73 74 /* 75 * After power-up, a non Master CPU needs to wait for Master to kick start it 76 * 77 * The default implementation halts 78 * 79 * This relies on platform specific support allowing Master to directly set 80 * this CPU's PC (to be @first_lines_of_secondary() and kick start it. 81 * 82 * In lack of such h/w assist, platforms can override this function 83 * - make this function busy-spin on a token, eventually set by Master 84 * (from arc_platform_smp_wakeup_cpu()) 85 * - Once token is available, jump to @first_lines_of_secondary 86 * (using inline asm). 87 * 88 * Alert: can NOT use stack here as it has not been determined/setup for CPU. 89 * If it turns out to be elaborate, it's better to code it in assembly 90 * 91 */ 92 void __weak arc_platform_smp_wait_to_boot(int cpu) 93 { 94 /* 95 * As a hack for debugging - since debugger will single-step over the 96 * FLAG insn - wrap the halt itself it in a self loop 97 */ 98 __asm__ __volatile__( 99 "1: \n" 100 " flag 1 \n" 101 " b 1b \n"); 102 } 103 104 const char *arc_platform_smp_cpuinfo(void) 105 { 106 return plat_smp_ops.info ? : ""; 107 } 108 109 /* 110 * The very first "C" code executed by secondary 111 * Called from asm stub in head.S 112 * "current"/R25 already setup by low level boot code 113 */ 114 void start_kernel_secondary(void) 115 { 116 struct mm_struct *mm = &init_mm; 117 unsigned int cpu = smp_processor_id(); 118 119 /* MMU, Caches, Vector Table, Interrupts etc */ 120 setup_processor(); 121 122 atomic_inc(&mm->mm_users); 123 atomic_inc(&mm->mm_count); 124 current->active_mm = mm; 125 cpumask_set_cpu(cpu, mm_cpumask(mm)); 126 127 notify_cpu_starting(cpu); 128 set_cpu_online(cpu, true); 129 130 pr_info("## CPU%u LIVE ##: Executing Code...\n", cpu); 131 132 if (machine_desc->init_smp) 133 machine_desc->init_smp(cpu); 134 135 arc_local_timer_setup(); 136 137 local_irq_enable(); 138 preempt_disable(); 139 cpu_startup_entry(CPUHP_ONLINE); 140 } 141 142 /* 143 * Called from kernel_init( ) -> smp_init( ) - for each CPU 144 * 145 * At this point, Secondary Processor is "HALT"ed: 146 * -It booted, but was halted in head.S 147 * -It was configured to halt-on-reset 148 * So need to wake it up. 149 * 150 * Essential requirements being where to run from (PC) and stack (SP) 151 */ 152 int __cpu_up(unsigned int cpu, struct task_struct *idle) 153 { 154 unsigned long wait_till; 155 156 secondary_idle_tsk = idle; 157 158 pr_info("Idle Task [%d] %p", cpu, idle); 159 pr_info("Trying to bring up CPU%u ...\n", cpu); 160 161 if (plat_smp_ops.cpu_kick) 162 plat_smp_ops.cpu_kick(cpu, 163 (unsigned long)first_lines_of_secondary); 164 165 /* wait for 1 sec after kicking the secondary */ 166 wait_till = jiffies + HZ; 167 while (time_before(jiffies, wait_till)) { 168 if (cpu_online(cpu)) 169 break; 170 } 171 172 if (!cpu_online(cpu)) { 173 pr_info("Timeout: CPU%u FAILED to comeup !!!\n", cpu); 174 return -1; 175 } 176 177 secondary_idle_tsk = NULL; 178 179 return 0; 180 } 181 182 /* 183 * not supported here 184 */ 185 int __init setup_profiling_timer(unsigned int multiplier) 186 { 187 return -EINVAL; 188 } 189 190 /*****************************************************************************/ 191 /* Inter Processor Interrupt Handling */ 192 /*****************************************************************************/ 193 194 enum ipi_msg_type { 195 IPI_EMPTY = 0, 196 IPI_RESCHEDULE = 1, 197 IPI_CALL_FUNC, 198 IPI_CPU_STOP, 199 }; 200 201 /* 202 * In arches with IRQ for each msg type (above), receiver can use IRQ-id to 203 * figure out what msg was sent. For those which don't (ARC has dedicated IPI 204 * IRQ), the msg-type needs to be conveyed via per-cpu data 205 */ 206 207 static DEFINE_PER_CPU(unsigned long, ipi_data); 208 209 static void ipi_send_msg_one(int cpu, enum ipi_msg_type msg) 210 { 211 unsigned long __percpu *ipi_data_ptr = per_cpu_ptr(&ipi_data, cpu); 212 unsigned long old, new; 213 unsigned long flags; 214 215 pr_debug("%d Sending msg [%d] to %d\n", smp_processor_id(), msg, cpu); 216 217 local_irq_save(flags); 218 219 /* 220 * Atomically write new msg bit (in case others are writing too), 221 * and read back old value 222 */ 223 do { 224 new = old = ACCESS_ONCE(*ipi_data_ptr); 225 new |= 1U << msg; 226 } while (cmpxchg(ipi_data_ptr, old, new) != old); 227 228 /* 229 * Call the platform specific IPI kick function, but avoid if possible: 230 * Only do so if there's no pending msg from other concurrent sender(s). 231 * Otherwise, recevier will see this msg as well when it takes the 232 * IPI corresponding to that msg. This is true, even if it is already in 233 * IPI handler, because !@old means it has not yet dequeued the msg(s) 234 * so @new msg can be a free-loader 235 */ 236 if (plat_smp_ops.ipi_send && !old) 237 plat_smp_ops.ipi_send(cpu); 238 239 local_irq_restore(flags); 240 } 241 242 static void ipi_send_msg(const struct cpumask *callmap, enum ipi_msg_type msg) 243 { 244 unsigned int cpu; 245 246 for_each_cpu(cpu, callmap) 247 ipi_send_msg_one(cpu, msg); 248 } 249 250 void smp_send_reschedule(int cpu) 251 { 252 ipi_send_msg_one(cpu, IPI_RESCHEDULE); 253 } 254 255 void smp_send_stop(void) 256 { 257 struct cpumask targets; 258 cpumask_copy(&targets, cpu_online_mask); 259 cpumask_clear_cpu(smp_processor_id(), &targets); 260 ipi_send_msg(&targets, IPI_CPU_STOP); 261 } 262 263 void arch_send_call_function_single_ipi(int cpu) 264 { 265 ipi_send_msg_one(cpu, IPI_CALL_FUNC); 266 } 267 268 void arch_send_call_function_ipi_mask(const struct cpumask *mask) 269 { 270 ipi_send_msg(mask, IPI_CALL_FUNC); 271 } 272 273 /* 274 * ipi_cpu_stop - handle IPI from smp_send_stop() 275 */ 276 static void ipi_cpu_stop(void) 277 { 278 machine_halt(); 279 } 280 281 static inline void __do_IPI(unsigned long msg) 282 { 283 switch (msg) { 284 case IPI_RESCHEDULE: 285 scheduler_ipi(); 286 break; 287 288 case IPI_CALL_FUNC: 289 generic_smp_call_function_interrupt(); 290 break; 291 292 case IPI_CPU_STOP: 293 ipi_cpu_stop(); 294 break; 295 296 default: 297 pr_warn("IPI with unexpected msg %ld\n", msg); 298 } 299 } 300 301 /* 302 * arch-common ISR to handle for inter-processor interrupts 303 * Has hooks for platform specific IPI 304 */ 305 irqreturn_t do_IPI(int irq, void *dev_id) 306 { 307 unsigned long pending; 308 309 pr_debug("IPI [%ld] received on cpu %d\n", 310 *this_cpu_ptr(&ipi_data), smp_processor_id()); 311 312 if (plat_smp_ops.ipi_clear) 313 plat_smp_ops.ipi_clear(irq); 314 315 /* 316 * "dequeue" the msg corresponding to this IPI (and possibly other 317 * piggybacked msg from elided IPIs: see ipi_send_msg_one() above) 318 */ 319 pending = xchg(this_cpu_ptr(&ipi_data), 0); 320 321 do { 322 unsigned long msg = __ffs(pending); 323 __do_IPI(msg); 324 pending &= ~(1U << msg); 325 } while (pending); 326 327 return IRQ_HANDLED; 328 } 329 330 /* 331 * API called by platform code to hookup arch-common ISR to their IPI IRQ 332 */ 333 static DEFINE_PER_CPU(int, ipi_dev); 334 335 int smp_ipi_irq_setup(int cpu, int irq) 336 { 337 int *dev = per_cpu_ptr(&ipi_dev, cpu); 338 339 arc_request_percpu_irq(irq, cpu, do_IPI, "IPI Interrupt", dev); 340 341 return 0; 342 } 343