1 /* 2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8 9 #include <linux/seq_file.h> 10 #include <linux/fs.h> 11 #include <linux/delay.h> 12 #include <linux/root_dev.h> 13 #include <linux/console.h> 14 #include <linux/module.h> 15 #include <linux/cpu.h> 16 #include <linux/clk-provider.h> 17 #include <linux/of_fdt.h> 18 #include <linux/of_platform.h> 19 #include <linux/cache.h> 20 #include <asm/sections.h> 21 #include <asm/arcregs.h> 22 #include <asm/tlb.h> 23 #include <asm/setup.h> 24 #include <asm/page.h> 25 #include <asm/irq.h> 26 #include <asm/unwind.h> 27 #include <asm/clk.h> 28 #include <asm/mach_desc.h> 29 #include <asm/smp.h> 30 31 #define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x)) 32 33 /* Part of U-boot ABI: see head.S */ 34 int __initdata uboot_tag; 35 char __initdata *uboot_arg; 36 37 const struct machine_desc *machine_desc; 38 39 struct task_struct *_current_task[NR_CPUS]; /* For stack switching */ 40 41 struct cpuinfo_arc cpuinfo_arc700[NR_CPUS]; 42 43 static void read_arc_build_cfg_regs(void) 44 { 45 struct bcr_perip uncached_space; 46 struct bcr_generic bcr; 47 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()]; 48 FIX_PTR(cpu); 49 50 READ_BCR(AUX_IDENTITY, cpu->core); 51 READ_BCR(ARC_REG_ISA_CFG_BCR, cpu->isa); 52 53 READ_BCR(ARC_REG_TIMERS_BCR, cpu->timers); 54 cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE); 55 56 READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space); 57 cpu->uncached_base = uncached_space.start << 24; 58 59 READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy); 60 61 cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR) > 1 ? 1 : 0; /* 2,3 */ 62 cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR) > 1 ? 1 : 0; /* 2,3 */ 63 cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0; /* 1,3 */ 64 cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0; 65 cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */ 66 67 /* Note that we read the CCM BCRs independent of kernel config 68 * This is to catch the cases where user doesn't know that 69 * CCMs are present in hardware build 70 */ 71 { 72 struct bcr_iccm iccm; 73 struct bcr_dccm dccm; 74 struct bcr_dccm_base dccm_base; 75 unsigned int bcr_32bit_val; 76 77 bcr_32bit_val = read_aux_reg(ARC_REG_ICCM_BCR); 78 if (bcr_32bit_val) { 79 iccm = *((struct bcr_iccm *)&bcr_32bit_val); 80 cpu->iccm.base_addr = iccm.base << 16; 81 cpu->iccm.sz = 0x2000 << (iccm.sz - 1); 82 } 83 84 bcr_32bit_val = read_aux_reg(ARC_REG_DCCM_BCR); 85 if (bcr_32bit_val) { 86 dccm = *((struct bcr_dccm *)&bcr_32bit_val); 87 cpu->dccm.sz = 0x800 << (dccm.sz); 88 89 READ_BCR(ARC_REG_DCCMBASE_BCR, dccm_base); 90 cpu->dccm.base_addr = dccm_base.addr << 8; 91 } 92 } 93 94 READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem); 95 96 read_decode_mmu_bcr(); 97 read_decode_cache_bcr(); 98 99 { 100 struct bcr_fp_arcompact sp, dp; 101 struct bcr_bpu_arcompact bpu; 102 103 READ_BCR(ARC_REG_FP_BCR, sp); 104 READ_BCR(ARC_REG_DPFP_BCR, dp); 105 cpu->extn.fpu_sp = sp.ver ? 1 : 0; 106 cpu->extn.fpu_dp = dp.ver ? 1 : 0; 107 108 READ_BCR(ARC_REG_BPU_BCR, bpu); 109 cpu->bpu.ver = bpu.ver; 110 cpu->bpu.full = bpu.fam ? 1 : 0; 111 if (bpu.ent) { 112 cpu->bpu.num_cache = 256 << (bpu.ent - 1); 113 cpu->bpu.num_pred = 256 << (bpu.ent - 1); 114 } 115 } 116 117 READ_BCR(ARC_REG_AP_BCR, bcr); 118 cpu->extn.ap = bcr.ver ? 1 : 0; 119 120 READ_BCR(ARC_REG_SMART_BCR, bcr); 121 cpu->extn.smart = bcr.ver ? 1 : 0; 122 123 READ_BCR(ARC_REG_RTT_BCR, bcr); 124 cpu->extn.rtt = bcr.ver ? 1 : 0; 125 126 cpu->extn.debug = cpu->extn.ap | cpu->extn.smart | cpu->extn.rtt; 127 } 128 129 static const struct cpuinfo_data arc_cpu_tbl[] = { 130 { {0x20, "ARC 600" }, 0x2F}, 131 { {0x30, "ARC 700" }, 0x33}, 132 { {0x34, "ARC 700 R4.10"}, 0x34}, 133 { {0x35, "ARC 700 R4.11"}, 0x35}, 134 { {0x00, NULL } } 135 }; 136 137 #define IS_AVAIL1(v, str) ((v) ? str : "") 138 #define IS_USED(cfg) (IS_ENABLED(cfg) ? "" : "(not used) ") 139 #define IS_AVAIL2(v, str, cfg) IS_AVAIL1(v, str), IS_AVAIL1(v, IS_USED(cfg)) 140 141 static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len) 142 { 143 struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id]; 144 struct bcr_identity *core = &cpu->core; 145 const struct cpuinfo_data *tbl; 146 char *isa_nm; 147 int i, be, atomic; 148 int n = 0; 149 150 FIX_PTR(cpu); 151 152 { 153 isa_nm = "ARCompact"; 154 be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN); 155 156 atomic = cpu->isa.atomic1; 157 if (!cpu->isa.ver) /* ISA BCR absent, use Kconfig info */ 158 atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC); 159 } 160 161 n += scnprintf(buf + n, len - n, 162 "\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n", 163 core->family, core->cpu_id, core->chip_id); 164 165 for (tbl = &arc_cpu_tbl[0]; tbl->info.id != 0; tbl++) { 166 if ((core->family >= tbl->info.id) && 167 (core->family <= tbl->up_range)) { 168 n += scnprintf(buf + n, len - n, 169 "processor [%d]\t: %s (%s ISA) %s\n", 170 cpu_id, tbl->info.str, isa_nm, 171 IS_AVAIL1(be, "[Big-Endian]")); 172 break; 173 } 174 } 175 176 if (tbl->info.id == 0) 177 n += scnprintf(buf + n, len - n, "UNKNOWN ARC Processor\n"); 178 179 n += scnprintf(buf + n, len - n, "CPU speed\t: %u.%02u Mhz\n", 180 (unsigned int)(arc_get_core_freq() / 1000000), 181 (unsigned int)(arc_get_core_freq() / 10000) % 100); 182 183 n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s\nISA Extn\t: ", 184 IS_AVAIL1(cpu->timers.t0, "Timer0 "), 185 IS_AVAIL1(cpu->timers.t1, "Timer1 ")); 186 187 n += i = scnprintf(buf + n, len - n, "%s%s", 188 IS_AVAIL2(atomic, "atomic ", CONFIG_ARC_HAS_LLSC)); 189 190 if (i) 191 n += scnprintf(buf + n, len - n, "\n\t\t: "); 192 193 n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n", 194 IS_AVAIL1(cpu->extn_mpy.ver, "mpy "), 195 IS_AVAIL1(cpu->extn.norm, "norm "), 196 IS_AVAIL1(cpu->extn.barrel, "barrel-shift "), 197 IS_AVAIL1(cpu->extn.swap, "swap "), 198 IS_AVAIL1(cpu->extn.minmax, "minmax "), 199 IS_AVAIL1(cpu->extn.crc, "crc "), 200 IS_AVAIL2(1, "swape", CONFIG_ARC_HAS_SWAPE)); 201 202 if (cpu->bpu.ver) 203 n += scnprintf(buf + n, len - n, 204 "BPU\t\t: %s%s match, cache:%d, Predict Table:%d\n", 205 IS_AVAIL1(cpu->bpu.full, "full"), 206 IS_AVAIL1(!cpu->bpu.full, "partial"), 207 cpu->bpu.num_cache, cpu->bpu.num_pred); 208 209 return buf; 210 } 211 212 static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len) 213 { 214 int n = 0; 215 struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id]; 216 217 FIX_PTR(cpu); 218 219 n += scnprintf(buf + n, len - n, 220 "Vector Table\t: %#x\nUncached Base\t: %#x\n", 221 cpu->vec_base, cpu->uncached_base); 222 223 if (cpu->extn.fpu_sp || cpu->extn.fpu_dp) 224 n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n", 225 IS_AVAIL1(cpu->extn.fpu_sp, "SP "), 226 IS_AVAIL1(cpu->extn.fpu_dp, "DP ")); 227 228 if (cpu->extn.debug) 229 n += scnprintf(buf + n, len - n, "DEBUG\t\t: %s%s%s\n", 230 IS_AVAIL1(cpu->extn.ap, "ActionPoint "), 231 IS_AVAIL1(cpu->extn.smart, "smaRT "), 232 IS_AVAIL1(cpu->extn.rtt, "RTT ")); 233 234 if (cpu->dccm.sz || cpu->iccm.sz) 235 n += scnprintf(buf + n, len - n, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n", 236 cpu->dccm.base_addr, TO_KB(cpu->dccm.sz), 237 cpu->iccm.base_addr, TO_KB(cpu->iccm.sz)); 238 239 n += scnprintf(buf + n, len - n, 240 "OS ABI [v3]\t: no-legacy-syscalls\n"); 241 242 return buf; 243 } 244 245 static void arc_chk_core_config(void) 246 { 247 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()]; 248 int fpu_enabled; 249 250 if (!cpu->timers.t0) 251 panic("Timer0 is not present!\n"); 252 253 if (!cpu->timers.t1) 254 panic("Timer1 is not present!\n"); 255 256 #ifdef CONFIG_ARC_HAS_DCCM 257 /* 258 * DCCM can be arbit placed in hardware. 259 * Make sure it's placement/sz matches what Linux is built with 260 */ 261 if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr) 262 panic("Linux built with incorrect DCCM Base address\n"); 263 264 if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz) 265 panic("Linux built with incorrect DCCM Size\n"); 266 #endif 267 268 #ifdef CONFIG_ARC_HAS_ICCM 269 if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz) 270 panic("Linux built with incorrect ICCM Size\n"); 271 #endif 272 273 /* 274 * FP hardware/software config sanity 275 * -If hardware contains DPFP, kernel needs to save/restore FPU state 276 * -If not, it will crash trying to save/restore the non-existant regs 277 * 278 * (only DPDP checked since SP has no arch visible regs) 279 */ 280 fpu_enabled = IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE); 281 282 if (cpu->extn.fpu_dp && !fpu_enabled) 283 pr_warn("CONFIG_ARC_FPU_SAVE_RESTORE needed for working apps\n"); 284 else if (!cpu->extn.fpu_dp && fpu_enabled) 285 panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n"); 286 } 287 288 /* 289 * Initialize and setup the processor core 290 * This is called by all the CPUs thus should not do special case stuff 291 * such as only for boot CPU etc 292 */ 293 294 void setup_processor(void) 295 { 296 char str[512]; 297 int cpu_id = smp_processor_id(); 298 299 read_arc_build_cfg_regs(); 300 arc_init_IRQ(); 301 302 printk(arc_cpu_mumbojumbo(cpu_id, str, sizeof(str))); 303 304 arc_mmu_init(); 305 arc_cache_init(); 306 307 printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str))); 308 printk(arc_platform_smp_cpuinfo()); 309 310 arc_chk_core_config(); 311 } 312 313 static inline int is_kernel(unsigned long addr) 314 { 315 if (addr >= (unsigned long)_stext && addr <= (unsigned long)_end) 316 return 1; 317 return 0; 318 } 319 320 void __init setup_arch(char **cmdline_p) 321 { 322 /* make sure that uboot passed pointer to cmdline/dtb is valid */ 323 if (uboot_tag && is_kernel((unsigned long)uboot_arg)) 324 panic("Invalid uboot arg\n"); 325 326 /* See if u-boot passed an external Device Tree blob */ 327 machine_desc = setup_machine_fdt(uboot_arg); /* uboot_tag == 2 */ 328 if (!machine_desc) { 329 /* No, so try the embedded one */ 330 machine_desc = setup_machine_fdt(__dtb_start); 331 if (!machine_desc) 332 panic("Embedded DT invalid\n"); 333 334 /* 335 * If we are here, it is established that @uboot_arg didn't 336 * point to DT blob. Instead if u-boot says it is cmdline, 337 * Appent to embedded DT cmdline. 338 * setup_machine_fdt() would have populated @boot_command_line 339 */ 340 if (uboot_tag == 1) { 341 /* Ensure a whitespace between the 2 cmdlines */ 342 strlcat(boot_command_line, " ", COMMAND_LINE_SIZE); 343 strlcat(boot_command_line, uboot_arg, 344 COMMAND_LINE_SIZE); 345 } 346 } 347 348 /* Save unparsed command line copy for /proc/cmdline */ 349 *cmdline_p = boot_command_line; 350 351 /* To force early parsing of things like mem=xxx */ 352 parse_early_param(); 353 354 /* Platform/board specific: e.g. early console registration */ 355 if (machine_desc->init_early) 356 machine_desc->init_early(); 357 358 setup_processor(); 359 smp_init_cpus(); 360 setup_arch_memory(); 361 362 /* copy flat DT out of .init and then unflatten it */ 363 unflatten_and_copy_device_tree(); 364 365 /* Can be issue if someone passes cmd line arg "ro" 366 * But that is unlikely so keeping it as it is 367 */ 368 root_mountflags &= ~MS_RDONLY; 369 370 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE) 371 conswitchp = &dummy_con; 372 #endif 373 374 arc_unwind_init(); 375 arc_unwind_setup(); 376 } 377 378 static int __init customize_machine(void) 379 { 380 of_clk_init(NULL); 381 /* 382 * Traverses flattened DeviceTree - registering platform devices 383 * (if any) complete with their resources 384 */ 385 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 386 387 if (machine_desc->init_machine) 388 machine_desc->init_machine(); 389 390 return 0; 391 } 392 arch_initcall(customize_machine); 393 394 static int __init init_late_machine(void) 395 { 396 if (machine_desc->init_late) 397 machine_desc->init_late(); 398 399 return 0; 400 } 401 late_initcall(init_late_machine); 402 /* 403 * Get CPU information for use by the procfs. 404 */ 405 406 #define cpu_to_ptr(c) ((void *)(0xFFFF0000 | (unsigned int)(c))) 407 #define ptr_to_cpu(p) (~0xFFFF0000UL & (unsigned int)(p)) 408 409 static int show_cpuinfo(struct seq_file *m, void *v) 410 { 411 char *str; 412 int cpu_id = ptr_to_cpu(v); 413 414 if (!cpu_online(cpu_id)) { 415 seq_printf(m, "processor [%d]\t: Offline\n", cpu_id); 416 goto done; 417 } 418 419 str = (char *)__get_free_page(GFP_TEMPORARY); 420 if (!str) 421 goto done; 422 423 seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE)); 424 425 seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n", 426 loops_per_jiffy / (500000 / HZ), 427 (loops_per_jiffy / (5000 / HZ)) % 100); 428 429 seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE)); 430 seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE)); 431 seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE)); 432 seq_printf(m, arc_platform_smp_cpuinfo()); 433 434 free_page((unsigned long)str); 435 done: 436 seq_printf(m, "\n"); 437 438 return 0; 439 } 440 441 static void *c_start(struct seq_file *m, loff_t *pos) 442 { 443 /* 444 * Callback returns cpu-id to iterator for show routine, NULL to stop. 445 * However since NULL is also a valid cpu-id (0), we use a round-about 446 * way to pass it w/o having to kmalloc/free a 2 byte string. 447 * Encode cpu-id as 0xFFcccc, which is decoded by show routine. 448 */ 449 return *pos < num_possible_cpus() ? cpu_to_ptr(*pos) : NULL; 450 } 451 452 static void *c_next(struct seq_file *m, void *v, loff_t *pos) 453 { 454 ++*pos; 455 return c_start(m, pos); 456 } 457 458 static void c_stop(struct seq_file *m, void *v) 459 { 460 } 461 462 const struct seq_operations cpuinfo_op = { 463 .start = c_start, 464 .next = c_next, 465 .stop = c_stop, 466 .show = show_cpuinfo 467 }; 468 469 static DEFINE_PER_CPU(struct cpu, cpu_topology); 470 471 static int __init topology_init(void) 472 { 473 int cpu; 474 475 for_each_present_cpu(cpu) 476 register_cpu(&per_cpu(cpu_topology, cpu), cpu); 477 478 return 0; 479 } 480 481 subsys_initcall(topology_init); 482