xref: /linux/arch/arc/kernel/setup.c (revision 5852264f9d6139751796853fdfca9d5230cbfb97) 
1 /*
2  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
8 
9 #include <linux/seq_file.h>
10 #include <linux/fs.h>
11 #include <linux/delay.h>
12 #include <linux/root_dev.h>
13 #include <linux/console.h>
14 #include <linux/module.h>
15 #include <linux/cpu.h>
16 #include <linux/of_fdt.h>
17 #include <asm/sections.h>
18 #include <asm/arcregs.h>
19 #include <asm/tlb.h>
20 #include <asm/cache.h>
21 #include <asm/setup.h>
22 #include <asm/page.h>
23 #include <asm/irq.h>
24 #include <asm/arcregs.h>
25 #include <asm/prom.h>
26 #include <asm/unwind.h>
27 #include <asm/clk.h>
28 #include <asm/mach_desc.h>
29 
30 #define FIX_PTR(x)  __asm__ __volatile__(";" : "+r"(x))
31 
32 int running_on_hw = 1;	/* vs. on ISS */
33 
34 char __initdata command_line[COMMAND_LINE_SIZE];
35 struct machine_desc *machine_desc __initdata;
36 
37 struct task_struct *_current_task[NR_CPUS];	/* For stack switching */
38 
39 struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
40 
41 
42 void __init read_arc_build_cfg_regs(void)
43 {
44 	struct bcr_perip uncached_space;
45 	struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
46 	FIX_PTR(cpu);
47 
48 	READ_BCR(AUX_IDENTITY, cpu->core);
49 
50 	cpu->timers = read_aux_reg(ARC_REG_TIMERS_BCR);
51 
52 	cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
53 	if (cpu->vec_base == 0)
54 		cpu->vec_base = (unsigned int)_int_vec_base_lds;
55 
56 	READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space);
57 	cpu->uncached_base = uncached_space.start << 24;
58 
59 	cpu->extn.mul = read_aux_reg(ARC_REG_MUL_BCR);
60 	cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR);
61 	cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR);
62 	cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR);
63 	cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR);
64 	READ_BCR(ARC_REG_MAC_BCR, cpu->extn_mac_mul);
65 
66 	cpu->extn.ext_arith = read_aux_reg(ARC_REG_EXTARITH_BCR);
67 	cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR);
68 
69 	/* Note that we read the CCM BCRs independent of kernel config
70 	 * This is to catch the cases where user doesn't know that
71 	 * CCMs are present in hardware build
72 	 */
73 	{
74 		struct bcr_iccm iccm;
75 		struct bcr_dccm dccm;
76 		struct bcr_dccm_base dccm_base;
77 		unsigned int bcr_32bit_val;
78 
79 		bcr_32bit_val = read_aux_reg(ARC_REG_ICCM_BCR);
80 		if (bcr_32bit_val) {
81 			iccm = *((struct bcr_iccm *)&bcr_32bit_val);
82 			cpu->iccm.base_addr = iccm.base << 16;
83 			cpu->iccm.sz = 0x2000 << (iccm.sz - 1);
84 		}
85 
86 		bcr_32bit_val = read_aux_reg(ARC_REG_DCCM_BCR);
87 		if (bcr_32bit_val) {
88 			dccm = *((struct bcr_dccm *)&bcr_32bit_val);
89 			cpu->dccm.sz = 0x800 << (dccm.sz);
90 
91 			READ_BCR(ARC_REG_DCCMBASE_BCR, dccm_base);
92 			cpu->dccm.base_addr = dccm_base.addr << 8;
93 		}
94 	}
95 
96 	READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
97 
98 	read_decode_mmu_bcr();
99 	read_decode_cache_bcr();
100 
101 	READ_BCR(ARC_REG_FP_BCR, cpu->fp);
102 	READ_BCR(ARC_REG_DPFP_BCR, cpu->dpfp);
103 }
104 
105 static const struct cpuinfo_data arc_cpu_tbl[] = {
106 	{ {0x10, "ARCTangent A5"}, 0x1F},
107 	{ {0x20, "ARC 600"      }, 0x2F},
108 	{ {0x30, "ARC 700"      }, 0x33},
109 	{ {0x34, "ARC 700 R4.10"}, 0x34},
110 	{ {0x00, NULL		} }
111 };
112 
113 char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
114 {
115 	int n = 0;
116 	struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
117 	struct bcr_identity *core = &cpu->core;
118 	const struct cpuinfo_data *tbl;
119 	int be = 0;
120 #ifdef CONFIG_CPU_BIG_ENDIAN
121 	be = 1;
122 #endif
123 	FIX_PTR(cpu);
124 
125 	n += scnprintf(buf + n, len - n,
126 		       "\nARC IDENTITY\t: Family [%#02x]"
127 		       " Cpu-id [%#02x] Chip-id [%#4x]\n",
128 		       core->family, core->cpu_id,
129 		       core->chip_id);
130 
131 	for (tbl = &arc_cpu_tbl[0]; tbl->info.id != 0; tbl++) {
132 		if ((core->family >= tbl->info.id) &&
133 		    (core->family <= tbl->up_range)) {
134 			n += scnprintf(buf + n, len - n,
135 				       "processor\t: %s %s\n",
136 				       tbl->info.str,
137 				       be ? "[Big Endian]" : "");
138 			break;
139 		}
140 	}
141 
142 	if (tbl->info.id == 0)
143 		n += scnprintf(buf + n, len - n, "UNKNOWN ARC Processor\n");
144 
145 	n += scnprintf(buf + n, len - n, "CPU speed\t: %u.%02u Mhz\n",
146 		       (unsigned int)(arc_get_core_freq() / 1000000),
147 		       (unsigned int)(arc_get_core_freq() / 10000) % 100);
148 
149 	n += scnprintf(buf + n, len - n, "Timers\t\t: %s %s\n",
150 		       (cpu->timers & 0x200) ? "TIMER1" : "",
151 		       (cpu->timers & 0x100) ? "TIMER0" : "");
152 
153 	n += scnprintf(buf + n, len - n, "Vect Tbl Base\t: %#x\n",
154 		       cpu->vec_base);
155 
156 	n += scnprintf(buf + n, len - n, "UNCACHED Base\t: %#x\n",
157 		       cpu->uncached_base);
158 
159 	return buf;
160 }
161 
162 static const struct id_to_str mul_type_nm[] = {
163 	{ 0x0, "N/A"},
164 	{ 0x1, "32x32 (spl Result Reg)" },
165 	{ 0x2, "32x32 (ANY Result Reg)" }
166 };
167 
168 static const struct id_to_str mac_mul_nm[] = {
169 	{0x0, "N/A"},
170 	{0x1, "N/A"},
171 	{0x2, "Dual 16 x 16"},
172 	{0x3, "N/A"},
173 	{0x4, "32x16"},
174 	{0x5, "N/A"},
175 	{0x6, "Dual 16x16 and 32x16"}
176 };
177 
178 char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
179 {
180 	int n = 0;
181 	struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
182 
183 	FIX_PTR(cpu);
184 #define IS_AVAIL1(var, str)	((var) ? str : "")
185 #define IS_AVAIL2(var, str)	((var == 0x2) ? str : "")
186 #define IS_USED(var)		((var) ? "(in-use)" : "(not used)")
187 
188 	n += scnprintf(buf + n, len - n,
189 		       "Extn [700-Base]\t: %s %s %s %s %s %s\n",
190 		       IS_AVAIL2(cpu->extn.norm, "norm,"),
191 		       IS_AVAIL2(cpu->extn.barrel, "barrel-shift,"),
192 		       IS_AVAIL1(cpu->extn.swap, "swap,"),
193 		       IS_AVAIL2(cpu->extn.minmax, "minmax,"),
194 		       IS_AVAIL1(cpu->extn.crc, "crc,"),
195 		       IS_AVAIL2(cpu->extn.ext_arith, "ext-arith"));
196 
197 	n += scnprintf(buf + n, len - n, "Extn [700-MPY]\t: %s",
198 		       mul_type_nm[cpu->extn.mul].str);
199 
200 	n += scnprintf(buf + n, len - n, "   MAC MPY: %s\n",
201 		       mac_mul_nm[cpu->extn_mac_mul.type].str);
202 
203 	if (cpu->core.family == 0x34) {
204 		n += scnprintf(buf + n, len - n,
205 		"Extn [700-4.10]\t: LLOCK/SCOND %s, SWAPE %s, RTSC %s\n",
206 			       IS_USED(__CONFIG_ARC_HAS_LLSC_VAL),
207 			       IS_USED(__CONFIG_ARC_HAS_SWAPE_VAL),
208 			       IS_USED(__CONFIG_ARC_HAS_RTSC_VAL));
209 	}
210 
211 	n += scnprintf(buf + n, len - n, "Extn [CCM]\t: %s",
212 		       !(cpu->dccm.sz || cpu->iccm.sz) ? "N/A" : "");
213 
214 	if (cpu->dccm.sz)
215 		n += scnprintf(buf + n, len - n, "DCCM: @ %x, %d KB ",
216 			       cpu->dccm.base_addr, TO_KB(cpu->dccm.sz));
217 
218 	if (cpu->iccm.sz)
219 		n += scnprintf(buf + n, len - n, "ICCM: @ %x, %d KB",
220 			       cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
221 
222 	n += scnprintf(buf + n, len - n, "\nExtn [FPU]\t: %s",
223 		       !(cpu->fp.ver || cpu->dpfp.ver) ? "N/A" : "");
224 
225 	if (cpu->fp.ver)
226 		n += scnprintf(buf + n, len - n, "SP [v%d] %s",
227 			       cpu->fp.ver, cpu->fp.fast ? "(fast)" : "");
228 
229 	if (cpu->dpfp.ver)
230 		n += scnprintf(buf + n, len - n, "DP [v%d] %s",
231 			       cpu->dpfp.ver, cpu->dpfp.fast ? "(fast)" : "");
232 
233 	n += scnprintf(buf + n, len - n, "\n");
234 
235 	n += scnprintf(buf + n, len - n,
236 		       "OS ABI [v3]\t: no-legacy-syscalls\n");
237 
238 	return buf;
239 }
240 
241 void __init arc_chk_ccms(void)
242 {
243 #if defined(CONFIG_ARC_HAS_DCCM) || defined(CONFIG_ARC_HAS_ICCM)
244 	struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
245 
246 #ifdef CONFIG_ARC_HAS_DCCM
247 	/*
248 	 * DCCM can be arbit placed in hardware.
249 	 * Make sure it's placement/sz matches what Linux is built with
250 	 */
251 	if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
252 		panic("Linux built with incorrect DCCM Base address\n");
253 
254 	if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz)
255 		panic("Linux built with incorrect DCCM Size\n");
256 #endif
257 
258 #ifdef CONFIG_ARC_HAS_ICCM
259 	if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz)
260 		panic("Linux built with incorrect ICCM Size\n");
261 #endif
262 #endif
263 }
264 
265 /*
266  * Ensure that FP hardware and kernel config match
267  * -If hardware contains DPFP, kernel needs to save/restore FPU state
268  *  across context switches
269  * -If hardware lacks DPFP, but kernel configured to save FPU state then
270  *  kernel trying to access non-existant DPFP regs will crash
271  *
272  * We only check for Dbl precision Floating Point, because only DPFP
273  * hardware has dedicated regs which need to be saved/restored on ctx-sw
274  * (Single Precision uses core regs), thus kernel is kind of oblivious to it
275  */
276 void __init arc_chk_fpu(void)
277 {
278 	struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
279 
280 	if (cpu->dpfp.ver) {
281 #ifndef CONFIG_ARC_FPU_SAVE_RESTORE
282 		pr_warn("DPFP support broken in this kernel...\n");
283 #endif
284 	} else {
285 #ifdef CONFIG_ARC_FPU_SAVE_RESTORE
286 		panic("H/w lacks DPFP support, apps won't work\n");
287 #endif
288 	}
289 }
290 
291 /*
292  * Initialize and setup the processor core
293  * This is called by all the CPUs thus should not do special case stuff
294  *    such as only for boot CPU etc
295  */
296 
297 void __init setup_processor(void)
298 {
299 	char str[512];
300 	int cpu_id = smp_processor_id();
301 
302 	read_arc_build_cfg_regs();
303 	arc_init_IRQ();
304 
305 	printk(arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
306 
307 	arc_mmu_init();
308 	arc_cache_init();
309 	arc_chk_ccms();
310 
311 	printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
312 
313 #ifdef CONFIG_SMP
314 	printk(arc_platform_smp_cpuinfo());
315 #endif
316 
317 	arc_chk_fpu();
318 }
319 
320 void __init setup_arch(char **cmdline_p)
321 {
322 #ifdef CONFIG_CMDLINE_UBOOT
323 	/* Make sure that a whitespace is inserted before */
324 	strlcat(command_line, " ", sizeof(command_line));
325 #endif
326 	/*
327 	 * Append .config cmdline to base command line, which might already
328 	 * contain u-boot "bootargs" (handled by head.S, if so configured)
329 	 */
330 	strlcat(command_line, CONFIG_CMDLINE, sizeof(command_line));
331 
332 	/* Save unparsed command line copy for /proc/cmdline */
333 	strlcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
334 	*cmdline_p = command_line;
335 
336 	machine_desc = setup_machine_fdt(__dtb_start);
337 	if (!machine_desc)
338 		panic("Embedded DT invalid\n");
339 
340 	/* To force early parsing of things like mem=xxx */
341 	parse_early_param();
342 
343 	/* Platform/board specific: e.g. early console registration */
344 	if (machine_desc->init_early)
345 		machine_desc->init_early();
346 
347 	setup_processor();
348 
349 #ifdef CONFIG_SMP
350 	smp_init_cpus();
351 #endif
352 
353 	setup_arch_memory();
354 
355 	/* copy flat DT out of .init and then unflatten it */
356 	copy_devtree();
357 	unflatten_device_tree();
358 
359 	/* Can be issue if someone passes cmd line arg "ro"
360 	 * But that is unlikely so keeping it as it is
361 	 */
362 	root_mountflags &= ~MS_RDONLY;
363 
364 	console_verbose();
365 
366 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
367 	conswitchp = &dummy_con;
368 #endif
369 
370 	arc_unwind_init();
371 	arc_unwind_setup();
372 }
373 
374 static int __init customize_machine(void)
375 {
376 	/* Add platform devices */
377 	if (machine_desc->init_machine)
378 		machine_desc->init_machine();
379 
380 	return 0;
381 }
382 arch_initcall(customize_machine);
383 
384 static int __init init_late_machine(void)
385 {
386 	if (machine_desc->init_late)
387 		machine_desc->init_late();
388 
389 	return 0;
390 }
391 late_initcall(init_late_machine);
392 /*
393  *  Get CPU information for use by the procfs.
394  */
395 
396 #define cpu_to_ptr(c)	((void *)(0xFFFF0000 | (unsigned int)(c)))
397 #define ptr_to_cpu(p)	(~0xFFFF0000UL & (unsigned int)(p))
398 
399 static int show_cpuinfo(struct seq_file *m, void *v)
400 {
401 	char *str;
402 	int cpu_id = ptr_to_cpu(v);
403 
404 	str = (char *)__get_free_page(GFP_TEMPORARY);
405 	if (!str)
406 		goto done;
407 
408 	seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
409 
410 	seq_printf(m, "Bogo MIPS : \t%lu.%02lu\n",
411 		   loops_per_jiffy / (500000 / HZ),
412 		   (loops_per_jiffy / (5000 / HZ)) % 100);
413 
414 	seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
415 
416 	seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
417 
418 	seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
419 
420 #ifdef CONFIG_SMP
421 	seq_printf(m, arc_platform_smp_cpuinfo());
422 #endif
423 
424 	free_page((unsigned long)str);
425 done:
426 	seq_printf(m, "\n\n");
427 
428 	return 0;
429 }
430 
431 static void *c_start(struct seq_file *m, loff_t *pos)
432 {
433 	/*
434 	 * Callback returns cpu-id to iterator for show routine, NULL to stop.
435 	 * However since NULL is also a valid cpu-id (0), we use a round-about
436 	 * way to pass it w/o having to kmalloc/free a 2 byte string.
437 	 * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
438 	 */
439 	return *pos < num_possible_cpus() ? cpu_to_ptr(*pos) : NULL;
440 }
441 
442 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
443 {
444 	++*pos;
445 	return c_start(m, pos);
446 }
447 
448 static void c_stop(struct seq_file *m, void *v)
449 {
450 }
451 
452 const struct seq_operations cpuinfo_op = {
453 	.start	= c_start,
454 	.next	= c_next,
455 	.stop	= c_stop,
456 	.show	= show_cpuinfo
457 };
458 
459 static DEFINE_PER_CPU(struct cpu, cpu_topology);
460 
461 static int __init topology_init(void)
462 {
463 	int cpu;
464 
465 	for_each_present_cpu(cpu)
466 	    register_cpu(&per_cpu(cpu_topology, cpu), cpu);
467 
468 	return 0;
469 }
470 
471 subsys_initcall(topology_init);
472