1/* 2 * ARC CPU startup Code 3 * 4 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 * Vineetg: Dec 2007 11 * -Check if we are running on Simulator or on real hardware 12 * to skip certain things during boot on simulator 13 */ 14 15#include <asm/asm-offsets.h> 16#include <asm/entry.h> 17#include <linux/linkage.h> 18#include <asm/arcregs.h> 19 20 .cpu A7 21 22 .section .init.text, "ax",@progbits 23 .type stext, @function 24 .globl stext 25stext: 26 ;------------------------------------------------------------------- 27 ; Don't clobber r0-r4 yet. It might have bootloader provided info 28 ;------------------------------------------------------------------- 29 30 sr @_int_vec_base_lds, [AUX_INTR_VEC_BASE] 31 32#ifdef CONFIG_SMP 33 ; Only Boot (Master) proceeds. Others wait in platform dependent way 34 ; IDENTITY Reg [ 3 2 1 0 ] 35 ; (cpu-id) ^^^ => Zero for UP ARC700 36 ; => #Core-ID if SMP (Master 0) 37 GET_CPU_ID r5 38 cmp r5, 0 39 jnz arc_platform_smp_wait_to_boot 40#endif 41 ; Clear BSS before updating any globals 42 ; XXX: use ZOL here 43 mov r5, __bss_start 44 mov r6, __bss_stop 451: 46 st.ab 0, [r5,4] 47 brlt r5, r6, 1b 48 49#ifdef CONFIG_CMDLINE_UBOOT 50 ; support for bootloader provided cmdline 51 ; If cmdline passed by u-boot, then 52 ; r0 = 1 (because ATAGS parsing, now retired, used to use 0) 53 ; r1 = magic number (board identity) 54 ; r2 = addr of cmdline string (somewhere in memory/flash) 55 56 brne r0, 1, .Lother_bootup_chores ; u-boot didn't pass cmdline 57 breq r2, 0, .Lother_bootup_chores ; or cmdline is NULL 58 59 mov r5, @command_line 601: 61 ldb.ab r6, [r2, 1] 62 breq r6, 0, .Lother_bootup_chores 63 b.d 1b 64 stb.ab r6, [r5, 1] 65#endif 66 67.Lother_bootup_chores: 68 69 ; Identify if running on ISS vs Silicon 70 ; IDENTITY Reg [ 3 2 1 0 ] 71 ; (chip-id) ^^^^^ ==> 0xffff for ISS 72 lr r0, [identity] 73 lsr r3, r0, 16 74 cmp r3, 0xffff 75 mov.z r4, 0 76 mov.nz r4, 1 77 st r4, [@running_on_hw] 78 79 ; setup "current" tsk and optionally cache it in dedicated r25 80 mov r9, @init_task 81 SET_CURR_TASK_ON_CPU r9, r0 ; r9 = tsk, r0 = scratch 82 83 ; setup stack (fp, sp) 84 mov fp, 0 85 86 ; tsk->thread_info is really a PAGE, whose bottom hoists stack 87 GET_TSK_STACK_BASE r9, sp ; r9 = tsk, sp = stack base(output) 88 89 j start_kernel ; "C" entry point 90 91#ifdef CONFIG_SMP 92;---------------------------------------------------------------- 93; First lines of code run by secondary before jumping to 'C' 94;---------------------------------------------------------------- 95 .section .init.text, "ax",@progbits 96 .type first_lines_of_secondary, @function 97 .globl first_lines_of_secondary 98 99first_lines_of_secondary: 100 101 ; setup per-cpu idle task as "current" on this CPU 102 ld r0, [@secondary_idle_tsk] 103 SET_CURR_TASK_ON_CPU r0, r1 104 105 ; setup stack (fp, sp) 106 mov fp, 0 107 108 ; set it's stack base to tsk->thread_info bottom 109 GET_TSK_STACK_BASE r0, sp 110 111 j start_kernel_secondary 112 113#endif 114