xref: /linux/arch/arc/include/asm/irqflags.h (revision e0bf6c5ca2d3281f231c5f0c9bf145e9513644de)
1 /*
2  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
8 
9 #ifndef __ASM_ARC_IRQFLAGS_H
10 #define __ASM_ARC_IRQFLAGS_H
11 
12 /* vineetg: March 2010 : local_irq_save( ) optimisation
13  *  -Remove explicit mov of current status32 into reg, that is not needed
14  *  -Use BIC  insn instead of INVERTED + AND
15  *  -Conditionally disable interrupts (if they are not enabled, don't disable)
16 */
17 
18 #include <asm/arcregs.h>
19 
20 /* status32 Reg bits related to Interrupt Handling */
21 #define STATUS_E1_BIT		1	/* Int 1 enable */
22 #define STATUS_E2_BIT		2	/* Int 2 enable */
23 #define STATUS_A1_BIT		3	/* Int 1 active */
24 #define STATUS_A2_BIT		4	/* Int 2 active */
25 
26 #define STATUS_E1_MASK		(1<<STATUS_E1_BIT)
27 #define STATUS_E2_MASK		(1<<STATUS_E2_BIT)
28 #define STATUS_A1_MASK		(1<<STATUS_A1_BIT)
29 #define STATUS_A2_MASK		(1<<STATUS_A2_BIT)
30 
31 /* Other Interrupt Handling related Aux regs */
32 #define AUX_IRQ_LEV		0x200	/* IRQ Priority: L1 or L2 */
33 #define AUX_IRQ_HINT		0x201	/* For generating Soft Interrupts */
34 #define AUX_IRQ_LV12		0x43	/* interrupt level register */
35 
36 #define AUX_IENABLE		0x40c
37 #define AUX_ITRIGGER		0x40d
38 #define AUX_IPULSE		0x415
39 
40 #ifndef __ASSEMBLY__
41 
42 /******************************************************************
43  * IRQ Control Macros
44  *
45  * All of them have "memory" clobber (compiler barrier) which is needed to
46  * ensure that LD/ST requiring irq safetly (R-M-W when LLSC is not available)
47  * are redone after IRQs are re-enabled (and gcc doesn't reuse stale register)
48  *
49  * Noted at the time of Abilis Timer List corruption
50  * 	Orig Bug + Rejected solution	: https://lkml.org/lkml/2013/3/29/67
51  * 	Reasoning			: https://lkml.org/lkml/2013/4/8/15
52  *
53  ******************************************************************/
54 
55 /*
56  * Save IRQ state and disable IRQs
57  */
58 static inline long arch_local_irq_save(void)
59 {
60 	unsigned long temp, flags;
61 
62 	__asm__ __volatile__(
63 	"	lr  %1, [status32]	\n"
64 	"	bic %0, %1, %2		\n"
65 	"	and.f 0, %1, %2	\n"
66 	"	flag.nz %0		\n"
67 	: "=r"(temp), "=r"(flags)
68 	: "n"((STATUS_E1_MASK | STATUS_E2_MASK))
69 	: "memory", "cc");
70 
71 	return flags;
72 }
73 
74 /*
75  * restore saved IRQ state
76  */
77 static inline void arch_local_irq_restore(unsigned long flags)
78 {
79 
80 	__asm__ __volatile__(
81 	"	flag %0			\n"
82 	:
83 	: "r"(flags)
84 	: "memory");
85 }
86 
87 /*
88  * Unconditionally Enable IRQs
89  */
90 extern void arch_local_irq_enable(void);
91 
92 /*
93  * Unconditionally Disable IRQs
94  */
95 static inline void arch_local_irq_disable(void)
96 {
97 	unsigned long temp;
98 
99 	__asm__ __volatile__(
100 	"	lr  %0, [status32]	\n"
101 	"	and %0, %0, %1		\n"
102 	"	flag %0			\n"
103 	: "=&r"(temp)
104 	: "n"(~(STATUS_E1_MASK | STATUS_E2_MASK))
105 	: "memory");
106 }
107 
108 /*
109  * save IRQ state
110  */
111 static inline long arch_local_save_flags(void)
112 {
113 	unsigned long temp;
114 
115 	__asm__ __volatile__(
116 	"	lr  %0, [status32]	\n"
117 	: "=&r"(temp)
118 	:
119 	: "memory");
120 
121 	return temp;
122 }
123 
124 /*
125  * Query IRQ state
126  */
127 static inline int arch_irqs_disabled_flags(unsigned long flags)
128 {
129 	return !(flags & (STATUS_E1_MASK
130 #ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS
131 			| STATUS_E2_MASK
132 #endif
133 		));
134 }
135 
136 static inline int arch_irqs_disabled(void)
137 {
138 	return arch_irqs_disabled_flags(arch_local_save_flags());
139 }
140 
141 #else
142 
143 #ifdef CONFIG_TRACE_IRQFLAGS
144 
145 .macro TRACE_ASM_IRQ_DISABLE
146 	bl	trace_hardirqs_off
147 .endm
148 
149 .macro TRACE_ASM_IRQ_ENABLE
150 	bl	trace_hardirqs_on
151 .endm
152 
153 #else
154 
155 .macro TRACE_ASM_IRQ_DISABLE
156 .endm
157 
158 .macro TRACE_ASM_IRQ_ENABLE
159 .endm
160 
161 #endif
162 
163 .macro IRQ_DISABLE  scratch
164 	lr	\scratch, [status32]
165 	bic	\scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK)
166 	flag	\scratch
167 	TRACE_ASM_IRQ_DISABLE
168 .endm
169 
170 .macro IRQ_ENABLE  scratch
171 	lr	\scratch, [status32]
172 	or	\scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK)
173 	flag	\scratch
174 	TRACE_ASM_IRQ_ENABLE
175 .endm
176 
177 #endif	/* __ASSEMBLY__ */
178 
179 #endif
180