1 /* 2 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com) 3 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License version 2 as 7 * published by the Free Software Foundation. 8 */ 9 10 #ifndef __ASM_IRQFLAGS_ARCOMPACT_H 11 #define __ASM_IRQFLAGS_ARCOMPACT_H 12 13 /* vineetg: March 2010 : local_irq_save( ) optimisation 14 * -Remove explicit mov of current status32 into reg, that is not needed 15 * -Use BIC insn instead of INVERTED + AND 16 * -Conditionally disable interrupts (if they are not enabled, don't disable) 17 */ 18 19 #include <asm/arcregs.h> 20 21 /* status32 Reg bits related to Interrupt Handling */ 22 #define STATUS_E1_BIT 1 /* Int 1 enable */ 23 #define STATUS_E2_BIT 2 /* Int 2 enable */ 24 #define STATUS_A1_BIT 3 /* Int 1 active */ 25 #define STATUS_A2_BIT 4 /* Int 2 active */ 26 27 #define STATUS_E1_MASK (1<<STATUS_E1_BIT) 28 #define STATUS_E2_MASK (1<<STATUS_E2_BIT) 29 #define STATUS_A1_MASK (1<<STATUS_A1_BIT) 30 #define STATUS_A2_MASK (1<<STATUS_A2_BIT) 31 #define STATUS_IE_MASK (STATUS_E1_MASK | STATUS_E2_MASK) 32 33 /* Other Interrupt Handling related Aux regs */ 34 #define AUX_IRQ_LEV 0x200 /* IRQ Priority: L1 or L2 */ 35 #define AUX_IRQ_HINT 0x201 /* For generating Soft Interrupts */ 36 #define AUX_IRQ_LV12 0x43 /* interrupt level register */ 37 38 #define AUX_IENABLE 0x40c 39 #define AUX_ITRIGGER 0x40d 40 #define AUX_IPULSE 0x415 41 42 #ifndef __ASSEMBLY__ 43 44 /****************************************************************** 45 * IRQ Control Macros 46 * 47 * All of them have "memory" clobber (compiler barrier) which is needed to 48 * ensure that LD/ST requiring irq safetly (R-M-W when LLSC is not available) 49 * are redone after IRQs are re-enabled (and gcc doesn't reuse stale register) 50 * 51 * Noted at the time of Abilis Timer List corruption 52 * Orig Bug + Rejected solution : https://lkml.org/lkml/2013/3/29/67 53 * Reasoning : https://lkml.org/lkml/2013/4/8/15 54 * 55 ******************************************************************/ 56 57 /* 58 * Save IRQ state and disable IRQs 59 */ 60 static inline long arch_local_irq_save(void) 61 { 62 unsigned long temp, flags; 63 64 __asm__ __volatile__( 65 " lr %1, [status32] \n" 66 " bic %0, %1, %2 \n" 67 " and.f 0, %1, %2 \n" 68 " flag.nz %0 \n" 69 : "=r"(temp), "=r"(flags) 70 : "n"((STATUS_E1_MASK | STATUS_E2_MASK)) 71 : "memory", "cc"); 72 73 return flags; 74 } 75 76 /* 77 * restore saved IRQ state 78 */ 79 static inline void arch_local_irq_restore(unsigned long flags) 80 { 81 82 __asm__ __volatile__( 83 " flag %0 \n" 84 : 85 : "r"(flags) 86 : "memory"); 87 } 88 89 /* 90 * Unconditionally Enable IRQs 91 */ 92 extern void arch_local_irq_enable(void); 93 94 /* 95 * Unconditionally Disable IRQs 96 */ 97 static inline void arch_local_irq_disable(void) 98 { 99 unsigned long temp; 100 101 __asm__ __volatile__( 102 " lr %0, [status32] \n" 103 " and %0, %0, %1 \n" 104 " flag %0 \n" 105 : "=&r"(temp) 106 : "n"(~(STATUS_E1_MASK | STATUS_E2_MASK)) 107 : "memory"); 108 } 109 110 /* 111 * save IRQ state 112 */ 113 static inline long arch_local_save_flags(void) 114 { 115 unsigned long temp; 116 117 __asm__ __volatile__( 118 " lr %0, [status32] \n" 119 : "=&r"(temp) 120 : 121 : "memory"); 122 123 return temp; 124 } 125 126 /* 127 * Query IRQ state 128 */ 129 static inline int arch_irqs_disabled_flags(unsigned long flags) 130 { 131 return !(flags & (STATUS_E1_MASK 132 #ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS 133 | STATUS_E2_MASK 134 #endif 135 )); 136 } 137 138 static inline int arch_irqs_disabled(void) 139 { 140 return arch_irqs_disabled_flags(arch_local_save_flags()); 141 } 142 143 #else 144 145 #ifdef CONFIG_TRACE_IRQFLAGS 146 147 .macro TRACE_ASM_IRQ_DISABLE 148 bl trace_hardirqs_off 149 .endm 150 151 .macro TRACE_ASM_IRQ_ENABLE 152 bl trace_hardirqs_on 153 .endm 154 155 #else 156 157 .macro TRACE_ASM_IRQ_DISABLE 158 .endm 159 160 .macro TRACE_ASM_IRQ_ENABLE 161 .endm 162 163 #endif 164 165 .macro IRQ_DISABLE scratch 166 lr \scratch, [status32] 167 bic \scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK) 168 flag \scratch 169 TRACE_ASM_IRQ_DISABLE 170 .endm 171 172 .macro IRQ_ENABLE scratch 173 lr \scratch, [status32] 174 or \scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK) 175 flag \scratch 176 TRACE_ASM_IRQ_ENABLE 177 .endm 178 179 #endif /* __ASSEMBLY__ */ 180 181 #endif 182