xref: /linux/arch/arc/include/asm/cacheflush.h (revision c4101e55974cc7d835fbd2d8e01553a3f61e9e75)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
4  *
5  *  vineetg: May 2011: for Non-aliasing VIPT D-cache following can be NOPs
6  *   -flush_cache_dup_mm (fork)
7  *   -likewise for flush_cache_mm (exit/execve)
8  *   -likewise for flush_cache_{range,page} (munmap, exit, COW-break)
9  *
10  *  vineetg: April 2008
11  *   -Added a critical CacheLine flush to copy_to_user_page( ) which
12  *     was causing gdbserver to not setup breakpoints consistently
13  */
14 
15 #ifndef _ASM_CACHEFLUSH_H
16 #define _ASM_CACHEFLUSH_H
17 
18 #include <linux/mm.h>
19 #include <asm/shmparam.h>
20 
21 void flush_cache_all(void);
22 
23 void flush_icache_range(unsigned long kstart, unsigned long kend);
24 void __sync_icache_dcache(phys_addr_t paddr, unsigned long vaddr, int len);
25 void __inv_icache_pages(phys_addr_t paddr, unsigned long vaddr, unsigned nr);
26 void __flush_dcache_pages(phys_addr_t paddr, unsigned long vaddr, unsigned nr);
27 
28 #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
29 
30 void flush_dcache_page(struct page *page);
31 void flush_dcache_folio(struct folio *folio);
32 #define flush_dcache_folio flush_dcache_folio
33 
34 void dma_cache_wback_inv(phys_addr_t start, unsigned long sz);
35 void dma_cache_inv(phys_addr_t start, unsigned long sz);
36 void dma_cache_wback(phys_addr_t start, unsigned long sz);
37 
38 #define flush_dcache_mmap_lock(mapping)		do { } while (0)
39 #define flush_dcache_mmap_unlock(mapping)	do { } while (0)
40 
41 /* TBD: optimize this */
42 #define flush_cache_vmap(start, end)		flush_cache_all()
43 #define flush_cache_vunmap(start, end)		flush_cache_all()
44 
45 #define flush_cache_dup_mm(mm)			/* called on fork (VIVT only) */
46 
47 #define flush_cache_mm(mm)			/* called on munmap/exit */
48 #define flush_cache_range(mm, u_vstart, u_vend)
49 #define flush_cache_page(vma, u_vaddr, pfn)	/* PF handling/COW-break */
50 
51 /*
52  * A new pagecache page has PG_arch_1 clear - thus dcache dirty by default
53  * This works around some PIO based drivers which don't call flush_dcache_page
54  * to record that they dirtied the dcache
55  */
56 #define PG_dc_clean	PG_arch_1
57 
58 #define copy_to_user_page(vma, page, vaddr, dst, src, len)		\
59 do {									\
60 	memcpy(dst, src, len);						\
61 	if (vma->vm_flags & VM_EXEC)					\
62 		__sync_icache_dcache((unsigned long)(dst), vaddr, len);	\
63 } while (0)
64 
65 #define copy_from_user_page(vma, page, vaddr, dst, src, len)		\
66 	memcpy(dst, src, len);						\
67 
68 #endif
69