12e8cd938SVineet Gupta/* 22e8cd938SVineet Gupta * Copyright (C) 2016 Synopsys, Inc. (www.synopsys.com) 32e8cd938SVineet Gupta * 42e8cd938SVineet Gupta * This program is free software; you can redistribute it and/or modify 52e8cd938SVineet Gupta * it under the terms of the GNU General Public License version 2 as 62e8cd938SVineet Gupta * published by the Free Software Foundation. 72e8cd938SVineet Gupta */ 82e8cd938SVineet Gupta 92e8cd938SVineet Gupta/ { 102e8cd938SVineet Gupta compatible = "snps,arc"; 112e8cd938SVineet Gupta #address-cells = <1>; 122e8cd938SVineet Gupta #size-cells = <1>; 132e8cd938SVineet Gupta chosen { }; 142e8cd938SVineet Gupta aliases { }; 152e8cd938SVineet Gupta 162e8cd938SVineet Gupta cpus { 172e8cd938SVineet Gupta #address-cells = <1>; 182e8cd938SVineet Gupta #size-cells = <0>; 192e8cd938SVineet Gupta 202e8cd938SVineet Gupta cpu@0 { 212e8cd938SVineet Gupta device_type = "cpu"; 222e8cd938SVineet Gupta compatible = "snps,archs38xN"; 232e8cd938SVineet Gupta reg = <0>; 24*854c11e2SVlad Zakharov clocks = <&core_clk>; 252e8cd938SVineet Gupta }; 262e8cd938SVineet Gupta }; 272e8cd938SVineet Gupta 287ec9f34aSVineet Gupta /* TIMER0 with interrupt for clockevent */ 297ec9f34aSVineet Gupta timer0 { 307ec9f34aSVineet Gupta compatible = "snps,arc-timer"; 317ec9f34aSVineet Gupta interrupts = <16>; 327ec9f34aSVineet Gupta interrupt-parent = <&core_intc>; 337ec9f34aSVineet Gupta clocks = <&core_clk>; 347ec9f34aSVineet Gupta }; 357ec9f34aSVineet Gupta 367ec9f34aSVineet Gupta /* 64-bit Global Free Running Counter */ 377ec9f34aSVineet Gupta gfrc { 387ec9f34aSVineet Gupta compatible = "snps,archs-timer-gfrc"; 397ec9f34aSVineet Gupta clocks = <&core_clk>; 407ec9f34aSVineet Gupta }; 417ec9f34aSVineet Gupta 422e8cd938SVineet Gupta memory { 432e8cd938SVineet Gupta device_type = "memory"; 442e8cd938SVineet Gupta reg = <0x80000000 0x10000000>; /* 256M */ 452e8cd938SVineet Gupta }; 462e8cd938SVineet Gupta}; 47