1cfdbc2e1SVineet Gupta# 2cfdbc2e1SVineet Gupta# Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) 3cfdbc2e1SVineet Gupta# 4cfdbc2e1SVineet Gupta# This program is free software; you can redistribute it and/or modify 5cfdbc2e1SVineet Gupta# it under the terms of the GNU General Public License version 2 as 6cfdbc2e1SVineet Gupta# published by the Free Software Foundation. 7cfdbc2e1SVineet Gupta# 8cfdbc2e1SVineet Gupta 9cfdbc2e1SVineet Guptaconfig ARC 10cfdbc2e1SVineet Gupta def_bool y 11cfdbc2e1SVineet Gupta select ARCH_NO_VIRT_TO_BUS 124adeefe1SVineet Gupta select CLONE_BACKWARDS 13cfdbc2e1SVineet Gupta # ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev 14cfdbc2e1SVineet Gupta select DEVTMPFS if !INITRAMFS_SOURCE="" 15cfdbc2e1SVineet Gupta select GENERIC_ATOMIC64 16cfdbc2e1SVineet Gupta select GENERIC_CLOCKEVENTS 17cfdbc2e1SVineet Gupta select GENERIC_FIND_FIRST_BIT 18cfdbc2e1SVineet Gupta # for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP 19cfdbc2e1SVineet Gupta select GENERIC_IRQ_SHOW 20bf90e1eaSVineet Gupta select GENERIC_KERNEL_EXECVE 21bf90e1eaSVineet Gupta select GENERIC_KERNEL_THREAD 22cfdbc2e1SVineet Gupta select GENERIC_PENDING_IRQ if SMP 23c3581039SVineet Gupta select GENERIC_SIGALTSTACK 24cfdbc2e1SVineet Gupta select GENERIC_SMP_IDLE_THREAD 25547f1125SVineet Gupta select HAVE_ARCH_TRACEHOOK 26cfdbc2e1SVineet Gupta select HAVE_GENERIC_HARDIRQS 27*4d86dfbbSVineet Gupta select HAVE_KPROBES 28*4d86dfbbSVineet Gupta select HAVE_KRETPROBES 29c121c506SVineet Gupta select HAVE_MEMBLOCK 30854a0d95SVineet Gupta select HAVE_MOD_ARCH_SPECIFIC if ARC_DW2_UNWIND 31769bc1fdSVineet Gupta select HAVE_OPROFILE 32999159a5SVineet Gupta select IRQ_DOMAIN 33cfdbc2e1SVineet Gupta select MODULES_USE_ELF_RELA 34c121c506SVineet Gupta select NO_BOOTMEM 35999159a5SVineet Gupta select OF 36999159a5SVineet Gupta select OF_EARLY_FLATTREE 37cfdbc2e1SVineet Gupta 38cfdbc2e1SVineet Guptaconfig SCHED_OMIT_FRAME_POINTER 39cfdbc2e1SVineet Gupta def_bool y 40cfdbc2e1SVineet Gupta 41cfdbc2e1SVineet Guptaconfig GENERIC_CSUM 42cfdbc2e1SVineet Gupta def_bool y 43cfdbc2e1SVineet Gupta 44cfdbc2e1SVineet Guptaconfig RWSEM_GENERIC_SPINLOCK 45cfdbc2e1SVineet Gupta def_bool y 46cfdbc2e1SVineet Gupta 47cfdbc2e1SVineet Guptaconfig ARCH_FLATMEM_ENABLE 48cfdbc2e1SVineet Gupta def_bool y 49cfdbc2e1SVineet Gupta 50cfdbc2e1SVineet Guptaconfig MMU 51cfdbc2e1SVineet Gupta def_bool y 52cfdbc2e1SVineet Gupta 53cfdbc2e1SVineet Guptaconfig NO_IOPORT 54cfdbc2e1SVineet Gupta def_bool y 55cfdbc2e1SVineet Gupta 56cfdbc2e1SVineet Guptaconfig GENERIC_CALIBRATE_DELAY 57cfdbc2e1SVineet Gupta def_bool y 58cfdbc2e1SVineet Gupta 59cfdbc2e1SVineet Guptaconfig GENERIC_HWEIGHT 60cfdbc2e1SVineet Gupta def_bool y 61cfdbc2e1SVineet Gupta 62cfdbc2e1SVineet Guptaconfig BINFMT_ELF 63cfdbc2e1SVineet Gupta def_bool y 64cfdbc2e1SVineet Gupta 6544c8bb91SVineet Guptaconfig STACKTRACE_SUPPORT 6644c8bb91SVineet Gupta def_bool y 6744c8bb91SVineet Gupta select STACKTRACE 6844c8bb91SVineet Gupta 69cfdbc2e1SVineet Guptaconfig HAVE_LATENCYTOP_SUPPORT 70cfdbc2e1SVineet Gupta def_bool y 71cfdbc2e1SVineet Gupta 72cfdbc2e1SVineet Guptaconfig NO_DMA 73cfdbc2e1SVineet Gupta def_bool n 74cfdbc2e1SVineet Gupta 75cfdbc2e1SVineet Guptasource "init/Kconfig" 76cfdbc2e1SVineet Guptasource "kernel/Kconfig.freezer" 77cfdbc2e1SVineet Gupta 78cfdbc2e1SVineet Guptamenu "ARC Architecture Configuration" 79cfdbc2e1SVineet Gupta 80cfdbc2e1SVineet Guptachoice 81cfdbc2e1SVineet Gupta prompt "ARC Platform" 82cfdbc2e1SVineet Gupta default ARC_PLAT_FPGA_LEGACY 83cfdbc2e1SVineet Gupta 84cfdbc2e1SVineet Guptaconfig ARC_PLAT_FPGA_LEGACY 85cfdbc2e1SVineet Gupta bool "\"Legacy\" ARC FPGA dev platform" 86cfdbc2e1SVineet Gupta help 87cfdbc2e1SVineet Gupta Support for ARC development platforms, provided by Synopsys. 88cfdbc2e1SVineet Gupta These are based on FPGA or ISS. e.g. 89cfdbc2e1SVineet Gupta - ARCAngel4 90cfdbc2e1SVineet Gupta - ML509 91cfdbc2e1SVineet Gupta - MetaWare ISS 92cfdbc2e1SVineet Gupta 93cfdbc2e1SVineet Gupta#New platform adds here 94cfdbc2e1SVineet Guptaendchoice 95cfdbc2e1SVineet Gupta 96cfdbc2e1SVineet Guptamenu "ARC CPU Configuration" 97cfdbc2e1SVineet Gupta 98cfdbc2e1SVineet Guptachoice 99cfdbc2e1SVineet Gupta prompt "ARC Core" 100cfdbc2e1SVineet Gupta default ARC_CPU_770 101cfdbc2e1SVineet Gupta 102cfdbc2e1SVineet Guptaconfig ARC_CPU_750D 103cfdbc2e1SVineet Gupta bool "ARC750D" 104cfdbc2e1SVineet Gupta help 105cfdbc2e1SVineet Gupta Support for ARC750 core 106cfdbc2e1SVineet Gupta 107cfdbc2e1SVineet Guptaconfig ARC_CPU_770 108cfdbc2e1SVineet Gupta bool "ARC770" 109cfdbc2e1SVineet Gupta select ARC_CPU_REL_4_10 110cfdbc2e1SVineet Gupta help 111cfdbc2e1SVineet Gupta Support for ARC770 core introduced with Rel 4.10 (Summer 2011) 112cfdbc2e1SVineet Gupta This core has a bunch of cool new features: 113cfdbc2e1SVineet Gupta -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4) 114cfdbc2e1SVineet Gupta Shared Address Spaces (for sharing TLB entires in MMU) 115cfdbc2e1SVineet Gupta -Caches: New Prog Model, Region Flush 116cfdbc2e1SVineet Gupta -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr 117cfdbc2e1SVineet Gupta 118cfdbc2e1SVineet Guptaendchoice 119cfdbc2e1SVineet Gupta 120cfdbc2e1SVineet Guptaconfig CPU_BIG_ENDIAN 121cfdbc2e1SVineet Gupta bool "Enable Big Endian Mode" 122cfdbc2e1SVineet Gupta default n 123cfdbc2e1SVineet Gupta help 124cfdbc2e1SVineet Gupta Build kernel for Big Endian Mode of ARC CPU 125cfdbc2e1SVineet Gupta 12641195d23SVineet Guptaconfig SMP 12741195d23SVineet Gupta bool "Symmetric Multi-Processing (Incomplete)" 12841195d23SVineet Gupta default n 12941195d23SVineet Gupta select USE_GENERIC_SMP_HELPERS 13041195d23SVineet Gupta help 13141195d23SVineet Gupta This enables support for systems with more than one CPU. If you have 13241195d23SVineet Gupta a system with only one CPU, like most personal computers, say N. If 13341195d23SVineet Gupta you have a system with more than one CPU, say Y. 13441195d23SVineet Gupta 13541195d23SVineet Guptaif SMP 13641195d23SVineet Gupta 13741195d23SVineet Guptaconfig ARC_HAS_COH_CACHES 13841195d23SVineet Gupta def_bool n 13941195d23SVineet Gupta 14041195d23SVineet Guptaconfig ARC_HAS_COH_LLSC 14141195d23SVineet Gupta def_bool n 14241195d23SVineet Gupta 14341195d23SVineet Guptaconfig ARC_HAS_COH_RTSC 14441195d23SVineet Gupta def_bool n 14541195d23SVineet Gupta 14641195d23SVineet Guptaconfig ARC_HAS_REENTRANT_IRQ_LV2 14741195d23SVineet Gupta def_bool n 14841195d23SVineet Gupta 14941195d23SVineet Guptaendif 15041195d23SVineet Gupta 15141195d23SVineet Guptaconfig NR_CPUS 15241195d23SVineet Gupta int "Maximum number of CPUs (2-32)" 15341195d23SVineet Gupta range 2 32 15441195d23SVineet Gupta depends on SMP 15541195d23SVineet Gupta default "2" 15641195d23SVineet Gupta 157cfdbc2e1SVineet Guptamenuconfig ARC_CACHE 158cfdbc2e1SVineet Gupta bool "Enable Cache Support" 159cfdbc2e1SVineet Gupta default y 16041195d23SVineet Gupta # if SMP, cache enabled ONLY if ARC implementation has cache coherency 16141195d23SVineet Gupta depends on !SMP || ARC_HAS_COH_CACHES 162cfdbc2e1SVineet Gupta 163cfdbc2e1SVineet Guptaif ARC_CACHE 164cfdbc2e1SVineet Gupta 165cfdbc2e1SVineet Guptaconfig ARC_CACHE_LINE_SHIFT 166cfdbc2e1SVineet Gupta int "Cache Line Length (as power of 2)" 167cfdbc2e1SVineet Gupta range 5 7 168cfdbc2e1SVineet Gupta default "6" 169cfdbc2e1SVineet Gupta help 170cfdbc2e1SVineet Gupta Starting with ARC700 4.9, Cache line length is configurable, 171cfdbc2e1SVineet Gupta This option specifies "N", with Line-len = 2 power N 172cfdbc2e1SVineet Gupta So line lengths of 32, 64, 128 are specified by 5,6,7, respectively 173cfdbc2e1SVineet Gupta Linux only supports same line lengths for I and D caches. 174cfdbc2e1SVineet Gupta 175cfdbc2e1SVineet Guptaconfig ARC_HAS_ICACHE 176cfdbc2e1SVineet Gupta bool "Use Instruction Cache" 177cfdbc2e1SVineet Gupta default y 178cfdbc2e1SVineet Gupta 179cfdbc2e1SVineet Guptaconfig ARC_HAS_DCACHE 180cfdbc2e1SVineet Gupta bool "Use Data Cache" 181cfdbc2e1SVineet Gupta default y 182cfdbc2e1SVineet Gupta 183cfdbc2e1SVineet Guptaconfig ARC_CACHE_PAGES 184cfdbc2e1SVineet Gupta bool "Per Page Cache Control" 185cfdbc2e1SVineet Gupta default y 186cfdbc2e1SVineet Gupta depends on ARC_HAS_ICACHE || ARC_HAS_DCACHE 187cfdbc2e1SVineet Gupta help 188cfdbc2e1SVineet Gupta This can be used to over-ride the global I/D Cache Enable on a 189cfdbc2e1SVineet Gupta per-page basis (but only for pages accessed via MMU such as 190cfdbc2e1SVineet Gupta Kernel Virtual address or User Virtual Address) 191cfdbc2e1SVineet Gupta TLB entries have a per-page Cache Enable Bit. 192cfdbc2e1SVineet Gupta Note that Global I/D ENABLE + Per Page DISABLE works but corollary 193cfdbc2e1SVineet Gupta Global DISABLE + Per Page ENABLE won't work 194cfdbc2e1SVineet Gupta 195cfdbc2e1SVineet Guptaendif #ARC_CACHE 196cfdbc2e1SVineet Gupta 197cfdbc2e1SVineet Guptaconfig ARC_HAS_HW_MPY 198cfdbc2e1SVineet Gupta bool "Use Hardware Multiplier (Normal or Faster XMAC)" 199cfdbc2e1SVineet Gupta default y 200cfdbc2e1SVineet Gupta help 201cfdbc2e1SVineet Gupta Influences how gcc generates code for MPY operations. 202cfdbc2e1SVineet Gupta If enabled, MPYxx insns are generated, provided by Standard/XMAC 203cfdbc2e1SVineet Gupta Multipler. Otherwise software multipy lib is used 204cfdbc2e1SVineet Gupta 205cfdbc2e1SVineet Guptachoice 206cfdbc2e1SVineet Gupta prompt "ARC700 MMU Version" 207cfdbc2e1SVineet Gupta default ARC_MMU_V3 if ARC_CPU_770 208cfdbc2e1SVineet Gupta default ARC_MMU_V2 if ARC_CPU_750D 209cfdbc2e1SVineet Gupta 210cfdbc2e1SVineet Guptaconfig ARC_MMU_V1 211cfdbc2e1SVineet Gupta bool "MMU v1" 212cfdbc2e1SVineet Gupta help 213cfdbc2e1SVineet Gupta Orig ARC700 MMU 214cfdbc2e1SVineet Gupta 215cfdbc2e1SVineet Guptaconfig ARC_MMU_V2 216cfdbc2e1SVineet Gupta bool "MMU v2" 217cfdbc2e1SVineet Gupta help 218cfdbc2e1SVineet Gupta Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio 219cfdbc2e1SVineet Gupta when 2 D-TLB and 1 I-TLB entries index into same 2way set. 220cfdbc2e1SVineet Gupta 221cfdbc2e1SVineet Guptaconfig ARC_MMU_V3 222cfdbc2e1SVineet Gupta bool "MMU v3" 223cfdbc2e1SVineet Gupta depends on ARC_CPU_770 224cfdbc2e1SVineet Gupta help 225cfdbc2e1SVineet Gupta Introduced with ARC700 4.10: New Features 226cfdbc2e1SVineet Gupta Variable Page size (1k-16k), var JTLB size 128 x (2 or 4) 227cfdbc2e1SVineet Gupta Shared Address Spaces (SASID) 228cfdbc2e1SVineet Gupta 229cfdbc2e1SVineet Guptaendchoice 230cfdbc2e1SVineet Gupta 231cfdbc2e1SVineet Gupta 232cfdbc2e1SVineet Guptachoice 233cfdbc2e1SVineet Gupta prompt "MMU Page Size" 234cfdbc2e1SVineet Gupta default ARC_PAGE_SIZE_8K 235cfdbc2e1SVineet Gupta 236cfdbc2e1SVineet Guptaconfig ARC_PAGE_SIZE_8K 237cfdbc2e1SVineet Gupta bool "8KB" 238cfdbc2e1SVineet Gupta help 239cfdbc2e1SVineet Gupta Choose between 8k vs 16k 240cfdbc2e1SVineet Gupta 241cfdbc2e1SVineet Guptaconfig ARC_PAGE_SIZE_16K 242cfdbc2e1SVineet Gupta bool "16KB" 243cfdbc2e1SVineet Gupta depends on ARC_MMU_V3 244cfdbc2e1SVineet Gupta 245cfdbc2e1SVineet Guptaconfig ARC_PAGE_SIZE_4K 246cfdbc2e1SVineet Gupta bool "4KB" 247cfdbc2e1SVineet Gupta depends on ARC_MMU_V3 248cfdbc2e1SVineet Gupta 249cfdbc2e1SVineet Guptaendchoice 250cfdbc2e1SVineet Gupta 2514788a594SVineet Guptaconfig ARC_COMPACT_IRQ_LEVELS 2524788a594SVineet Gupta bool "ARCompact IRQ Priorities: High(2)/Low(1)" 2534788a594SVineet Gupta default n 2544788a594SVineet Gupta # Timer HAS to be high priority, for any other high priority config 2554788a594SVineet Gupta select ARC_IRQ3_LV2 25641195d23SVineet Gupta # if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy 25741195d23SVineet Gupta depends on !SMP || ARC_HAS_REENTRANT_IRQ_LV2 2584788a594SVineet Gupta 2594788a594SVineet Guptaif ARC_COMPACT_IRQ_LEVELS 2604788a594SVineet Gupta 2614788a594SVineet Guptaconfig ARC_IRQ3_LV2 2624788a594SVineet Gupta bool 2634788a594SVineet Gupta 2644788a594SVineet Guptaconfig ARC_IRQ5_LV2 2654788a594SVineet Gupta bool 2664788a594SVineet Gupta 2674788a594SVineet Guptaconfig ARC_IRQ6_LV2 2684788a594SVineet Gupta bool 2694788a594SVineet Gupta 2704788a594SVineet Guptaendif 2714788a594SVineet Gupta 272cfdbc2e1SVineet Guptaconfig ARC_FPU_SAVE_RESTORE 273cfdbc2e1SVineet Gupta bool "Enable FPU state persistence across context switch" 274cfdbc2e1SVineet Gupta default n 275cfdbc2e1SVineet Gupta help 276cfdbc2e1SVineet Gupta Double Precision Floating Point unit had dedictaed regs which 277cfdbc2e1SVineet Gupta need to be saved/restored across context-switch. 278cfdbc2e1SVineet Gupta Note that ARC FPU is overly simplistic, unlike say x86, which has 279cfdbc2e1SVineet Gupta hardware pieces to allow software to conditionally save/restore, 280cfdbc2e1SVineet Gupta based on actual usage of FPU by a task. Thus our implemn does 281cfdbc2e1SVineet Gupta this for all tasks in system. 282cfdbc2e1SVineet Gupta 283cfdbc2e1SVineet Guptamenuconfig ARC_CPU_REL_4_10 284cfdbc2e1SVineet Gupta bool "Enable support for Rel 4.10 features" 285cfdbc2e1SVineet Gupta default n 286cfdbc2e1SVineet Gupta help 287cfdbc2e1SVineet Gupta -ARC770 (and dependent features) enabled 288cfdbc2e1SVineet Gupta -ARC750 also shares some of the new features with 770 289cfdbc2e1SVineet Gupta 290cfdbc2e1SVineet Guptaconfig ARC_HAS_LLSC 291cfdbc2e1SVineet Gupta bool "Insn: LLOCK/SCOND (efficient atomic ops)" 292cfdbc2e1SVineet Gupta default y 293cfdbc2e1SVineet Gupta depends on ARC_CPU_770 294cfdbc2e1SVineet Gupta # if SMP, enable LLSC ONLY if ARC implementation has coherent atomics 295cfdbc2e1SVineet Gupta depends on !SMP || ARC_HAS_COH_LLSC 296cfdbc2e1SVineet Gupta 297cfdbc2e1SVineet Guptaconfig ARC_HAS_SWAPE 298cfdbc2e1SVineet Gupta bool "Insn: SWAPE (endian-swap)" 299cfdbc2e1SVineet Gupta default y 300cfdbc2e1SVineet Gupta depends on ARC_CPU_REL_4_10 301cfdbc2e1SVineet Gupta 302cfdbc2e1SVineet Guptaconfig ARC_HAS_RTSC 303cfdbc2e1SVineet Gupta bool "Insn: RTSC (64-bit r/o cycle counter)" 304cfdbc2e1SVineet Gupta default y 305cfdbc2e1SVineet Gupta depends on ARC_CPU_REL_4_10 30641195d23SVineet Gupta # if SMP, enable RTSC only if counter is coherent across cores 30741195d23SVineet Gupta depends on !SMP || ARC_HAS_COH_RTSC 308cfdbc2e1SVineet Gupta 309cfdbc2e1SVineet Guptaendmenu # "ARC CPU Configuration" 310cfdbc2e1SVineet Gupta 311cfdbc2e1SVineet Guptamenu "Platform Board Configuration" 312cfdbc2e1SVineet Gupta 313cfdbc2e1SVineet Guptasource "arch/arc/plat-arcfpga/Kconfig" 314cfdbc2e1SVineet Gupta 315cfdbc2e1SVineet Gupta#New platform adds here 316cfdbc2e1SVineet Gupta 317cfdbc2e1SVineet Guptaconfig LINUX_LINK_BASE 318cfdbc2e1SVineet Gupta hex "Linux Link Address" 319cfdbc2e1SVineet Gupta default "0x80000000" 320cfdbc2e1SVineet Gupta help 321cfdbc2e1SVineet Gupta ARC700 divides the 32 bit phy address space into two equal halves 322cfdbc2e1SVineet Gupta -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU 323cfdbc2e1SVineet Gupta -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel 324cfdbc2e1SVineet Gupta Typically Linux kernel is linked at the start of untransalted addr, 325cfdbc2e1SVineet Gupta hence the default value of 0x8zs. 326cfdbc2e1SVineet Gupta However some customers have peripherals mapped at this addr, so 327cfdbc2e1SVineet Gupta Linux needs to be scooted a bit. 328cfdbc2e1SVineet Gupta If you don't know what the above means, leave this setting alone. 329cfdbc2e1SVineet Gupta 330cfdbc2e1SVineet Guptaendmenu # "Platform Board Configuration" 331cfdbc2e1SVineet Gupta 332080c3747SVineet Guptaconfig ARC_CURR_IN_REG 333080c3747SVineet Gupta bool "Dedicate Register r25 for current_task pointer" 334080c3747SVineet Gupta default y 335080c3747SVineet Gupta help 336080c3747SVineet Gupta This reserved Register R25 to point to Current Task in 337080c3747SVineet Gupta kernel mode. This saves memory access for each such access 338080c3747SVineet Gupta 339cfdbc2e1SVineet Guptaconfig ARC_STACK_NONEXEC 340cfdbc2e1SVineet Gupta bool "Make stack non-executable" 341cfdbc2e1SVineet Gupta default n 342cfdbc2e1SVineet Gupta help 343cfdbc2e1SVineet Gupta To disable the execute permissions of stack/heap of processes 344cfdbc2e1SVineet Gupta which are enabled by default. 345cfdbc2e1SVineet Gupta 346cfdbc2e1SVineet Guptaconfig HZ 347cfdbc2e1SVineet Gupta int "Timer Frequency" 348cfdbc2e1SVineet Gupta default 100 349cfdbc2e1SVineet Gupta 350cfdbc2e1SVineet Guptamenuconfig ARC_DBG 351cfdbc2e1SVineet Gupta bool "ARC debugging" 352cfdbc2e1SVineet Gupta default y 353cfdbc2e1SVineet Gupta 354854a0d95SVineet Guptaconfig ARC_DW2_UNWIND 355854a0d95SVineet Gupta bool "Enable DWARF specific kernel stack unwind" 356854a0d95SVineet Gupta depends on ARC_DBG 357854a0d95SVineet Gupta default y 358854a0d95SVineet Gupta select KALLSYMS 359854a0d95SVineet Gupta help 360854a0d95SVineet Gupta Compiles the kernel with DWARF unwind information and can be used 361854a0d95SVineet Gupta to get stack backtraces. 362854a0d95SVineet Gupta 363854a0d95SVineet Gupta If you say Y here the resulting kernel image will be slightly larger 364854a0d95SVineet Gupta but not slower, and it will give very useful debugging information. 365854a0d95SVineet Gupta If you don't debug the kernel, you can say N, but we may not be able 366854a0d95SVineet Gupta to solve problems without frame unwind information 367854a0d95SVineet Gupta 368cfdbc2e1SVineet Guptaconfig ARC_DBG_TLB_PARANOIA 369cfdbc2e1SVineet Gupta bool "Paranoia Checks in Low Level TLB Handlers" 37041195d23SVineet Gupta depends on ARC_DBG && !SMP 371cfdbc2e1SVineet Gupta default n 372cfdbc2e1SVineet Gupta 373cfdbc2e1SVineet Guptaconfig ARC_DBG_TLB_MISS_COUNT 374cfdbc2e1SVineet Gupta bool "Profile TLB Misses" 375cfdbc2e1SVineet Gupta default n 376cfdbc2e1SVineet Gupta select DEBUG_FS 377cfdbc2e1SVineet Gupta depends on ARC_DBG 378cfdbc2e1SVineet Gupta help 379cfdbc2e1SVineet Gupta Counts number of I and D TLB Misses and exports them via Debugfs 380cfdbc2e1SVineet Gupta The counters can be cleared via Debugfs as well 381cfdbc2e1SVineet Gupta 382cfdbc2e1SVineet Guptaconfig CMDLINE 383cfdbc2e1SVineet Gupta string "Kernel command line to built-in" 384cfdbc2e1SVineet Gupta default "print-fatal-signals=1" 385cfdbc2e1SVineet Gupta help 386cfdbc2e1SVineet Gupta The default command line which will be appended to the optional 387cfdbc2e1SVineet Gupta u-boot provided command line (see below) 388cfdbc2e1SVineet Gupta 389cfdbc2e1SVineet Guptaconfig CMDLINE_UBOOT 390cfdbc2e1SVineet Gupta bool "Support U-boot kernel command line passing" 391cfdbc2e1SVineet Gupta default n 392cfdbc2e1SVineet Gupta help 393cfdbc2e1SVineet Gupta If you are using U-boot (www.denx.de) and wish to pass the kernel 394cfdbc2e1SVineet Gupta command line from the U-boot environment to the Linux kernel then 395cfdbc2e1SVineet Gupta switch this option on. 396cfdbc2e1SVineet Gupta ARC U-boot will setup the cmdline in RAM/flash and set r2 to point 397cfdbc2e1SVineet Gupta to it. kernel startup code will copy the string into cmdline buffer 398cfdbc2e1SVineet Gupta and also append CONFIG_CMDLINE. 399cfdbc2e1SVineet Gupta 400999159a5SVineet Guptaconfig ARC_BUILTIN_DTB_NAME 401999159a5SVineet Gupta string "Built in DTB" 402999159a5SVineet Gupta help 403999159a5SVineet Gupta Set the name of the DTB to embed in the vmlinux binary 404999159a5SVineet Gupta Leaving it blank selects the minimal "skeleton" dtb 405999159a5SVineet Gupta 406cfdbc2e1SVineet Guptasource "kernel/Kconfig.preempt" 407cfdbc2e1SVineet Gupta 408cfdbc2e1SVineet Guptaendmenu # "ARC Architecture Configuration" 409cfdbc2e1SVineet Gupta 410cfdbc2e1SVineet Guptasource "mm/Kconfig" 411cfdbc2e1SVineet Guptasource "net/Kconfig" 412cfdbc2e1SVineet Guptasource "drivers/Kconfig" 413cfdbc2e1SVineet Guptasource "fs/Kconfig" 414cfdbc2e1SVineet Guptasource "arch/arc/Kconfig.debug" 415cfdbc2e1SVineet Guptasource "security/Kconfig" 416cfdbc2e1SVineet Guptasource "crypto/Kconfig" 417cfdbc2e1SVineet Guptasource "lib/Kconfig" 418