1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * arch/alpha/kernel/traps.c 4 * 5 * (C) Copyright 1994 Linus Torvalds 6 */ 7 8 /* 9 * This file initializes the trap entry points 10 */ 11 12 #include <linux/cpu.h> 13 #include <linux/jiffies.h> 14 #include <linux/mm.h> 15 #include <linux/sched/signal.h> 16 #include <linux/sched/debug.h> 17 #include <linux/tty.h> 18 #include <linux/delay.h> 19 #include <linux/extable.h> 20 #include <linux/kallsyms.h> 21 #include <linux/ratelimit.h> 22 23 #include <asm/gentrap.h> 24 #include <linux/uaccess.h> 25 #include <linux/unaligned.h> 26 #include <asm/sysinfo.h> 27 #include <asm/hwrpb.h> 28 #include <asm/mmu_context.h> 29 #include <asm/special_insns.h> 30 31 #include "proto.h" 32 33 static __always_inline void alpha_snapshot_usp(struct pt_regs *regs) 34 { 35 if (user_mode(regs)) 36 regs->usp = rdusp(); 37 } 38 39 void 40 dik_show_regs(struct pt_regs *regs, unsigned long *r9_15) 41 { 42 printk("pc = [<%016lx>] ra = [<%016lx>] ps = %04lx %s\n", 43 regs->pc, regs->r26, regs->ps, print_tainted()); 44 printk("pc is at %pSR\n", (void *)regs->pc); 45 printk("ra is at %pSR\n", (void *)regs->r26); 46 printk("v0 = %016lx t0 = %016lx t1 = %016lx\n", 47 regs->r0, regs->r1, regs->r2); 48 printk("t2 = %016lx t3 = %016lx t4 = %016lx\n", 49 regs->r3, regs->r4, regs->r5); 50 printk("t5 = %016lx t6 = %016lx t7 = %016lx\n", 51 regs->r6, regs->r7, regs->r8); 52 53 if (r9_15) { 54 printk("s0 = %016lx s1 = %016lx s2 = %016lx\n", 55 r9_15[9], r9_15[10], r9_15[11]); 56 printk("s3 = %016lx s4 = %016lx s5 = %016lx\n", 57 r9_15[12], r9_15[13], r9_15[14]); 58 printk("s6 = %016lx\n", r9_15[15]); 59 } 60 61 printk("a0 = %016lx a1 = %016lx a2 = %016lx\n", 62 regs->r16, regs->r17, regs->r18); 63 printk("a3 = %016lx a4 = %016lx a5 = %016lx\n", 64 regs->r19, regs->r20, regs->r21); 65 printk("t8 = %016lx t9 = %016lx t10= %016lx\n", 66 regs->r22, regs->r23, regs->r24); 67 printk("t11= %016lx pv = %016lx at = %016lx\n", 68 regs->r25, regs->r27, regs->r28); 69 printk("gp = %016lx sp = %p\n", regs->gp, regs+1); 70 #if 0 71 __halt(); 72 #endif 73 } 74 75 #if 0 76 static char * ireg_name[] = {"v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6", 77 "t7", "s0", "s1", "s2", "s3", "s4", "s5", "s6", 78 "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9", 79 "t10", "t11", "ra", "pv", "at", "gp", "sp", "zero"}; 80 #endif 81 82 static void 83 dik_show_code(unsigned int *pc) 84 { 85 long i; 86 87 printk("Code:"); 88 for (i = -6; i < 2; i++) { 89 unsigned int insn; 90 if (__get_user(insn, (unsigned int __user *)pc + i)) 91 break; 92 printk("%c%08x%c", i ? ' ' : '<', insn, i ? ' ' : '>'); 93 } 94 printk("\n"); 95 } 96 97 static void 98 dik_show_trace(unsigned long *sp, const char *loglvl) 99 { 100 long i = 0; 101 printk("%sTrace:\n", loglvl); 102 while (0x1ff8 & (unsigned long) sp) { 103 extern char _stext[], _etext[]; 104 unsigned long tmp = *sp; 105 sp++; 106 if (!is_kernel_text(tmp)) 107 continue; 108 printk("%s[<%lx>] %pSR\n", loglvl, tmp, (void *)tmp); 109 if (i > 40) { 110 printk("%s ...", loglvl); 111 break; 112 } 113 } 114 printk("%s\n", loglvl); 115 } 116 117 static int kstack_depth_to_print = 24; 118 119 void show_stack(struct task_struct *task, unsigned long *sp, const char *loglvl) 120 { 121 unsigned long *stack; 122 int i; 123 124 /* 125 * debugging aid: "show_stack(NULL, NULL, KERN_EMERG);" prints the 126 * back trace for this cpu. 127 */ 128 if(sp==NULL) 129 sp=(unsigned long*)&sp; 130 131 stack = sp; 132 for(i=0; i < kstack_depth_to_print; i++) { 133 if (((long) stack & (THREAD_SIZE-1)) == 0) 134 break; 135 if ((i % 4) == 0) { 136 if (i) 137 pr_cont("\n"); 138 printk("%s ", loglvl); 139 } else { 140 pr_cont(" "); 141 } 142 pr_cont("%016lx", *stack++); 143 } 144 pr_cont("\n"); 145 dik_show_trace(sp, loglvl); 146 } 147 148 void 149 die_if_kernel(char * str, struct pt_regs *regs, long err, unsigned long *r9_15) 150 { 151 if (regs->ps & 8) 152 return; 153 #ifdef CONFIG_SMP 154 printk("CPU %d ", hard_smp_processor_id()); 155 #endif 156 printk("%s(%d): %s %ld\n", current->comm, task_pid_nr(current), str, err); 157 dik_show_regs(regs, r9_15); 158 add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE); 159 dik_show_trace((unsigned long *)(regs+1), KERN_DEFAULT); 160 dik_show_code((unsigned int *)regs->pc); 161 162 if (test_and_set_thread_flag (TIF_DIE_IF_KERNEL)) { 163 printk("die_if_kernel recursion detected.\n"); 164 local_irq_enable(); 165 while (1); 166 } 167 make_task_dead(SIGSEGV); 168 } 169 170 #ifndef CONFIG_MATHEMU 171 static long dummy_emul(void) { return 0; } 172 long (*alpha_fp_emul_imprecise)(struct pt_regs *regs, unsigned long writemask) 173 = (void *)dummy_emul; 174 EXPORT_SYMBOL_GPL(alpha_fp_emul_imprecise); 175 long (*alpha_fp_emul) (unsigned long pc) 176 = (void *)dummy_emul; 177 EXPORT_SYMBOL_GPL(alpha_fp_emul); 178 #else 179 long alpha_fp_emul_imprecise(struct pt_regs *regs, unsigned long writemask); 180 long alpha_fp_emul (unsigned long pc); 181 #endif 182 183 asmlinkage void 184 do_entArith(unsigned long summary, unsigned long write_mask, 185 struct pt_regs *regs) 186 { 187 long si_code = FPE_FLTINV; 188 189 alpha_snapshot_usp(regs); 190 if (summary & 1) { 191 /* Software-completion summary bit is set, so try to 192 emulate the instruction. If the processor supports 193 precise exceptions, we don't have to search. */ 194 if (!amask(AMASK_PRECISE_TRAP)) 195 si_code = alpha_fp_emul(regs->pc - 4); 196 else 197 si_code = alpha_fp_emul_imprecise(regs, write_mask); 198 if (si_code == 0) 199 return; 200 } 201 die_if_kernel("Arithmetic fault", regs, 0, NULL); 202 203 send_sig_fault_trapno(SIGFPE, si_code, (void __user *) regs->pc, 0, current); 204 } 205 206 asmlinkage void 207 do_entIF(unsigned long type, struct pt_regs *regs) 208 { 209 int signo, code; 210 211 alpha_snapshot_usp(regs); 212 if (type == 3) { /* FEN fault */ 213 /* Irritating users can call PAL_clrfen to disable the 214 FPU for the process. The kernel will then trap in 215 do_switch_stack and undo_switch_stack when we try 216 to save and restore the FP registers. 217 218 Given that GCC by default generates code that uses the 219 FP registers, PAL_clrfen is not useful except for DoS 220 attacks. So turn the bleeding FPU back on and be done 221 with it. */ 222 current_thread_info()->pcb.flags |= 1; 223 __reload_thread(¤t_thread_info()->pcb); 224 return; 225 } 226 if (!user_mode(regs)) { 227 if (type == 1) { 228 const unsigned int *data 229 = (const unsigned int *) regs->pc; 230 printk("Kernel bug at %s:%d\n", 231 (const char *)(data[1] | (long)data[2] << 32), 232 data[0]); 233 } 234 #ifdef CONFIG_ALPHA_WTINT 235 if (type == 4) { 236 /* If CALL_PAL WTINT is totally unsupported by the 237 PALcode, e.g. MILO, "emulate" it by overwriting 238 the insn. */ 239 unsigned int *pinsn 240 = (unsigned int *) regs->pc - 1; 241 if (*pinsn == PAL_wtint) { 242 *pinsn = 0x47e01400; /* mov 0,$0 */ 243 imb(); 244 regs->r0 = 0; 245 return; 246 } 247 } 248 #endif /* ALPHA_WTINT */ 249 die_if_kernel((type == 1 ? "Kernel Bug" : "Instruction fault"), 250 regs, type, NULL); 251 } 252 253 switch (type) { 254 case 0: /* breakpoint */ 255 if (ptrace_cancel_bpt(current)) { 256 regs->pc -= 4; /* make pc point to former bpt */ 257 } 258 259 send_sig_fault(SIGTRAP, TRAP_BRKPT, (void __user *)regs->pc, 260 current); 261 return; 262 263 case 1: /* bugcheck */ 264 send_sig_fault_trapno(SIGTRAP, TRAP_UNK, 265 (void __user *) regs->pc, 0, current); 266 return; 267 268 case 2: /* gentrap */ 269 switch ((long) regs->r16) { 270 case GEN_INTOVF: 271 signo = SIGFPE; 272 code = FPE_INTOVF; 273 break; 274 case GEN_INTDIV: 275 signo = SIGFPE; 276 code = FPE_INTDIV; 277 break; 278 case GEN_FLTOVF: 279 signo = SIGFPE; 280 code = FPE_FLTOVF; 281 break; 282 case GEN_FLTDIV: 283 signo = SIGFPE; 284 code = FPE_FLTDIV; 285 break; 286 case GEN_FLTUND: 287 signo = SIGFPE; 288 code = FPE_FLTUND; 289 break; 290 case GEN_FLTINV: 291 signo = SIGFPE; 292 code = FPE_FLTINV; 293 break; 294 case GEN_FLTINE: 295 signo = SIGFPE; 296 code = FPE_FLTRES; 297 break; 298 case GEN_ROPRAND: 299 signo = SIGFPE; 300 code = FPE_FLTUNK; 301 break; 302 303 case GEN_DECOVF: 304 case GEN_DECDIV: 305 case GEN_DECINV: 306 case GEN_ASSERTERR: 307 case GEN_NULPTRERR: 308 case GEN_STKOVF: 309 case GEN_STRLENERR: 310 case GEN_SUBSTRERR: 311 case GEN_RANGERR: 312 case GEN_SUBRNG: 313 case GEN_SUBRNG1: 314 case GEN_SUBRNG2: 315 case GEN_SUBRNG3: 316 case GEN_SUBRNG4: 317 case GEN_SUBRNG5: 318 case GEN_SUBRNG6: 319 case GEN_SUBRNG7: 320 default: 321 signo = SIGTRAP; 322 code = TRAP_UNK; 323 break; 324 } 325 326 send_sig_fault_trapno(signo, code, (void __user *) regs->pc, 327 regs->r16, current); 328 return; 329 330 case 4: /* opDEC */ 331 break; 332 333 case 5: /* illoc */ 334 default: /* unexpected instruction-fault type */ 335 ; 336 } 337 338 send_sig_fault(SIGILL, ILL_ILLOPC, (void __user *)regs->pc, current); 339 } 340 341 /* There is an ifdef in the PALcode in MILO that enables a 342 "kernel debugging entry point" as an unprivileged call_pal. 343 344 We don't want to have anything to do with it, but unfortunately 345 several versions of MILO included in distributions have it enabled, 346 and if we don't put something on the entry point we'll oops. */ 347 348 asmlinkage void 349 do_entDbg(struct pt_regs *regs) 350 { 351 die_if_kernel("Instruction fault", regs, 0, NULL); 352 353 force_sig_fault(SIGILL, ILL_ILLOPC, (void __user *)regs->pc); 354 } 355 356 357 /* 358 * entUna has a different register layout to be reasonably simple. It 359 * needs access to all the integer registers (the kernel doesn't use 360 * fp-regs), and it needs to have them in order for simpler access. 361 * 362 * Due to the non-standard register layout (and because we don't want 363 * to handle floating-point regs), user-mode unaligned accesses are 364 * handled separately by do_entUnaUser below. 365 * 366 * Oh, btw, we don't handle the "gp" register correctly, but if we fault 367 * on a gp-register unaligned load/store, something is _very_ wrong 368 * in the kernel anyway.. 369 */ 370 struct allregs { 371 unsigned long regs[32]; 372 unsigned long ps, pc, gp, a0, a1, a2; 373 }; 374 375 struct unaligned_stat { 376 unsigned long count, va, pc; 377 } unaligned[2]; 378 379 380 /* Macro for exception fixup code to access integer registers. */ 381 #define una_reg(r) (_regs[(r) >= 16 && (r) <= 18 ? (r)+19 : (r)]) 382 383 384 asmlinkage void 385 do_entUna(void * va, unsigned long opcode, unsigned long reg, 386 struct allregs *regs) 387 { 388 long error, tmp1, tmp2, tmp3, tmp4; 389 unsigned long pc = regs->pc - 4; 390 unsigned long *_regs = regs->regs; 391 const struct exception_table_entry *fixup; 392 393 unaligned[0].count++; 394 unaligned[0].va = (unsigned long) va; 395 unaligned[0].pc = pc; 396 397 /* We don't want to use the generic get/put unaligned macros as 398 we want to trap exceptions. Only if we actually get an 399 exception will we decide whether we should have caught it. */ 400 401 switch (opcode) { 402 case 0x0c: /* ldwu */ 403 __asm__ __volatile__( 404 "1: ldq_u %1,0(%3)\n" 405 "2: ldq_u %2,1(%3)\n" 406 " extwl %1,%3,%1\n" 407 " extwh %2,%3,%2\n" 408 "3:\n" 409 EXC(1b,3b,%1,%0) 410 EXC(2b,3b,%2,%0) 411 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 412 : "r"(va), "0"(0)); 413 if (error) 414 goto got_exception; 415 una_reg(reg) = tmp1|tmp2; 416 return; 417 418 case 0x28: /* ldl */ 419 __asm__ __volatile__( 420 "1: ldq_u %1,0(%3)\n" 421 "2: ldq_u %2,3(%3)\n" 422 " extll %1,%3,%1\n" 423 " extlh %2,%3,%2\n" 424 "3:\n" 425 EXC(1b,3b,%1,%0) 426 EXC(2b,3b,%2,%0) 427 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 428 : "r"(va), "0"(0)); 429 if (error) 430 goto got_exception; 431 una_reg(reg) = (int)(tmp1|tmp2); 432 return; 433 434 case 0x29: /* ldq */ 435 __asm__ __volatile__( 436 "1: ldq_u %1,0(%3)\n" 437 "2: ldq_u %2,7(%3)\n" 438 " extql %1,%3,%1\n" 439 " extqh %2,%3,%2\n" 440 "3:\n" 441 EXC(1b,3b,%1,%0) 442 EXC(2b,3b,%2,%0) 443 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 444 : "r"(va), "0"(0)); 445 if (error) 446 goto got_exception; 447 una_reg(reg) = tmp1|tmp2; 448 return; 449 450 /* Note that the store sequences do not indicate that they change 451 memory because it _should_ be affecting nothing in this context. 452 (Otherwise we have other, much larger, problems.) */ 453 case 0x0d: /* stw */ 454 __asm__ __volatile__( 455 "1: ldq_u %2,1(%5)\n" 456 "2: ldq_u %1,0(%5)\n" 457 " inswh %6,%5,%4\n" 458 " inswl %6,%5,%3\n" 459 " mskwh %2,%5,%2\n" 460 " mskwl %1,%5,%1\n" 461 " or %2,%4,%2\n" 462 " or %1,%3,%1\n" 463 "3: stq_u %2,1(%5)\n" 464 "4: stq_u %1,0(%5)\n" 465 "5:\n" 466 EXC(1b,5b,%2,%0) 467 EXC(2b,5b,%1,%0) 468 EXC(3b,5b,$31,%0) 469 EXC(4b,5b,$31,%0) 470 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2), 471 "=&r"(tmp3), "=&r"(tmp4) 472 : "r"(va), "r"(una_reg(reg)), "0"(0)); 473 if (error) 474 goto got_exception; 475 return; 476 477 case 0x2c: /* stl */ 478 __asm__ __volatile__( 479 "1: ldq_u %2,3(%5)\n" 480 "2: ldq_u %1,0(%5)\n" 481 " inslh %6,%5,%4\n" 482 " insll %6,%5,%3\n" 483 " msklh %2,%5,%2\n" 484 " mskll %1,%5,%1\n" 485 " or %2,%4,%2\n" 486 " or %1,%3,%1\n" 487 "3: stq_u %2,3(%5)\n" 488 "4: stq_u %1,0(%5)\n" 489 "5:\n" 490 EXC(1b,5b,%2,%0) 491 EXC(2b,5b,%1,%0) 492 EXC(3b,5b,$31,%0) 493 EXC(4b,5b,$31,%0) 494 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2), 495 "=&r"(tmp3), "=&r"(tmp4) 496 : "r"(va), "r"(una_reg(reg)), "0"(0)); 497 if (error) 498 goto got_exception; 499 return; 500 501 case 0x2d: /* stq */ 502 __asm__ __volatile__( 503 "1: ldq_u %2,7(%5)\n" 504 "2: ldq_u %1,0(%5)\n" 505 " insqh %6,%5,%4\n" 506 " insql %6,%5,%3\n" 507 " mskqh %2,%5,%2\n" 508 " mskql %1,%5,%1\n" 509 " or %2,%4,%2\n" 510 " or %1,%3,%1\n" 511 "3: stq_u %2,7(%5)\n" 512 "4: stq_u %1,0(%5)\n" 513 "5:\n" 514 EXC(1b,5b,%2,%0) 515 EXC(2b,5b,%1,%0) 516 EXC(3b,5b,$31,%0) 517 EXC(4b,5b,$31,%0) 518 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2), 519 "=&r"(tmp3), "=&r"(tmp4) 520 : "r"(va), "r"(una_reg(reg)), "0"(0)); 521 if (error) 522 goto got_exception; 523 return; 524 } 525 526 printk("Bad unaligned kernel access at %016lx: %p %lx %lu\n", 527 pc, va, opcode, reg); 528 make_task_dead(SIGSEGV); 529 530 got_exception: 531 /* Ok, we caught the exception, but we don't want it. Is there 532 someone to pass it along to? */ 533 if ((fixup = search_exception_tables(pc)) != 0) { 534 unsigned long newpc; 535 newpc = fixup_exception(una_reg, fixup, pc); 536 537 printk("Forwarding unaligned exception at %lx (%lx)\n", 538 pc, newpc); 539 540 regs->pc = newpc; 541 return; 542 } 543 544 /* 545 * Yikes! No one to forward the exception to. 546 * Since the registers are in a weird format, dump them ourselves. 547 */ 548 549 printk("%s(%d): unhandled unaligned exception\n", 550 current->comm, task_pid_nr(current)); 551 552 printk("pc = [<%016lx>] ra = [<%016lx>] ps = %04lx\n", 553 pc, una_reg(26), regs->ps); 554 printk("r0 = %016lx r1 = %016lx r2 = %016lx\n", 555 una_reg(0), una_reg(1), una_reg(2)); 556 printk("r3 = %016lx r4 = %016lx r5 = %016lx\n", 557 una_reg(3), una_reg(4), una_reg(5)); 558 printk("r6 = %016lx r7 = %016lx r8 = %016lx\n", 559 una_reg(6), una_reg(7), una_reg(8)); 560 printk("r9 = %016lx r10= %016lx r11= %016lx\n", 561 una_reg(9), una_reg(10), una_reg(11)); 562 printk("r12= %016lx r13= %016lx r14= %016lx\n", 563 una_reg(12), una_reg(13), una_reg(14)); 564 printk("r15= %016lx\n", una_reg(15)); 565 printk("r16= %016lx r17= %016lx r18= %016lx\n", 566 una_reg(16), una_reg(17), una_reg(18)); 567 printk("r19= %016lx r20= %016lx r21= %016lx\n", 568 una_reg(19), una_reg(20), una_reg(21)); 569 printk("r22= %016lx r23= %016lx r24= %016lx\n", 570 una_reg(22), una_reg(23), una_reg(24)); 571 printk("r25= %016lx r27= %016lx r28= %016lx\n", 572 una_reg(25), una_reg(27), una_reg(28)); 573 printk("gp = %016lx sp = %p\n", regs->gp, regs+1); 574 575 dik_show_code((unsigned int *)pc); 576 dik_show_trace((unsigned long *)(regs+1), KERN_DEFAULT); 577 578 if (test_and_set_thread_flag (TIF_DIE_IF_KERNEL)) { 579 printk("die_if_kernel recursion detected.\n"); 580 local_irq_enable(); 581 while (1); 582 } 583 make_task_dead(SIGSEGV); 584 } 585 586 /* 587 * Convert an s-floating point value in memory format to the 588 * corresponding value in register format. The exponent 589 * needs to be remapped to preserve non-finite values 590 * (infinities, not-a-numbers, denormals). 591 */ 592 static inline unsigned long 593 s_mem_to_reg (unsigned long s_mem) 594 { 595 unsigned long frac = (s_mem >> 0) & 0x7fffff; 596 unsigned long sign = (s_mem >> 31) & 0x1; 597 unsigned long exp_msb = (s_mem >> 30) & 0x1; 598 unsigned long exp_low = (s_mem >> 23) & 0x7f; 599 unsigned long exp; 600 601 exp = (exp_msb << 10) | exp_low; /* common case */ 602 if (exp_msb) { 603 if (exp_low == 0x7f) { 604 exp = 0x7ff; 605 } 606 } else { 607 if (exp_low == 0x00) { 608 exp = 0x000; 609 } else { 610 exp |= (0x7 << 7); 611 } 612 } 613 return (sign << 63) | (exp << 52) | (frac << 29); 614 } 615 616 /* 617 * Convert an s-floating point value in register format to the 618 * corresponding value in memory format. 619 */ 620 static inline unsigned long 621 s_reg_to_mem (unsigned long s_reg) 622 { 623 return ((s_reg >> 62) << 30) | ((s_reg << 5) >> 34); 624 } 625 626 /* 627 * Handle user-level unaligned fault. Handling user-level unaligned 628 * faults is *extremely* slow and produces nasty messages. A user 629 * program *should* fix unaligned faults ASAP. 630 * 631 * Notice that we have (almost) the regular kernel stack layout here, 632 * so finding the appropriate registers is a little more difficult 633 * than in the kernel case. 634 * 635 * Finally, we handle regular integer load/stores only. In 636 * particular, load-linked/store-conditionally and floating point 637 * load/stores are not supported. The former make no sense with 638 * unaligned faults (they are guaranteed to fail) and I don't think 639 * the latter will occur in any decent program. 640 * 641 * Sigh. We *do* have to handle some FP operations, because GCC will 642 * uses them as temporary storage for integer memory to memory copies. 643 * However, we need to deal with stt/ldt and sts/lds only. 644 */ 645 646 #define OP_INT_MASK ( 1L << 0x28 | 1L << 0x2c /* ldl stl */ \ 647 | 1L << 0x29 | 1L << 0x2d /* ldq stq */ \ 648 | 1L << 0x0c | 1L << 0x0d /* ldwu stw */ \ 649 | 1L << 0x0a | 1L << 0x0e ) /* ldbu stb */ 650 651 #define OP_WRITE_MASK ( 1L << 0x26 | 1L << 0x27 /* sts stt */ \ 652 | 1L << 0x2c | 1L << 0x2d /* stl stq */ \ 653 | 1L << 0x0d | 1L << 0x0e ) /* stw stb */ 654 655 #define R(x) ((size_t) &((struct pt_regs *)0)->x) 656 657 static int unauser_reg_offsets[32] = { 658 R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), R(r8), 659 /* r9 ... r15 are stored in front of regs. */ 660 -64, -56, -48, -40, -32, -24, -16, /* padding at -8 */ 661 R(r16), R(r17), R(r18), 662 R(r19), R(r20), R(r21), R(r22), R(r23), R(r24), R(r25), R(r26), 663 R(r27), R(r28), R(gp), 664 0, 0 665 }; 666 667 #undef R 668 669 asmlinkage void 670 do_entUnaUser(void __user * va, unsigned long opcode, 671 unsigned long reg, struct pt_regs *regs) 672 { 673 static DEFINE_RATELIMIT_STATE(ratelimit, 5 * HZ, 5); 674 675 unsigned long tmp1, tmp2, tmp3, tmp4; 676 unsigned long fake_reg, *reg_addr = &fake_reg; 677 int si_code; 678 long error; 679 680 /* Check the UAC bits to decide what the user wants us to do 681 with the unaligned access. */ 682 683 if (!(current_thread_info()->status & TS_UAC_NOPRINT)) { 684 if (__ratelimit(&ratelimit)) { 685 printk("%s(%d): unaligned trap at %016lx: %p %lx %ld\n", 686 current->comm, task_pid_nr(current), 687 regs->pc - 4, va, opcode, reg); 688 } 689 } 690 if ((current_thread_info()->status & TS_UAC_SIGBUS)) 691 goto give_sigbus; 692 /* Not sure why you'd want to use this, but... */ 693 if ((current_thread_info()->status & TS_UAC_NOFIX)) 694 return; 695 696 /* Don't bother reading ds in the access check since we already 697 know that this came from the user. Also rely on the fact that 698 the page at TASK_SIZE is unmapped and so can't be touched anyway. */ 699 if ((unsigned long)va >= TASK_SIZE) 700 goto give_sigsegv; 701 702 ++unaligned[1].count; 703 unaligned[1].va = (unsigned long)va; 704 unaligned[1].pc = regs->pc - 4; 705 706 if ((1L << opcode) & OP_INT_MASK) { 707 /* it's an integer load/store */ 708 if (reg < 30) { 709 reg_addr = (unsigned long *) 710 ((char *)regs + unauser_reg_offsets[reg]); 711 } else if (reg == 30) { 712 /* usp in PAL regs */ 713 fake_reg = rdusp(); 714 } else { 715 /* zero "register" */ 716 fake_reg = 0; 717 } 718 } 719 720 /* We don't want to use the generic get/put unaligned macros as 721 we want to trap exceptions. Only if we actually get an 722 exception will we decide whether we should have caught it. */ 723 724 switch (opcode) { 725 case 0x0c: /* ldwu */ 726 __asm__ __volatile__( 727 "1: ldq_u %1,0(%3)\n" 728 "2: ldq_u %2,1(%3)\n" 729 " extwl %1,%3,%1\n" 730 " extwh %2,%3,%2\n" 731 "3:\n" 732 EXC(1b,3b,%1,%0) 733 EXC(2b,3b,%2,%0) 734 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 735 : "r"(va), "0"(0)); 736 if (error) 737 goto give_sigsegv; 738 *reg_addr = tmp1|tmp2; 739 break; 740 741 case 0x22: /* lds */ 742 __asm__ __volatile__( 743 "1: ldq_u %1,0(%3)\n" 744 "2: ldq_u %2,3(%3)\n" 745 " extll %1,%3,%1\n" 746 " extlh %2,%3,%2\n" 747 "3:\n" 748 EXC(1b,3b,%1,%0) 749 EXC(2b,3b,%2,%0) 750 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 751 : "r"(va), "0"(0)); 752 if (error) 753 goto give_sigsegv; 754 alpha_write_fp_reg(reg, s_mem_to_reg((int)(tmp1|tmp2))); 755 return; 756 757 case 0x23: /* ldt */ 758 __asm__ __volatile__( 759 "1: ldq_u %1,0(%3)\n" 760 "2: ldq_u %2,7(%3)\n" 761 " extql %1,%3,%1\n" 762 " extqh %2,%3,%2\n" 763 "3:\n" 764 EXC(1b,3b,%1,%0) 765 EXC(2b,3b,%2,%0) 766 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 767 : "r"(va), "0"(0)); 768 if (error) 769 goto give_sigsegv; 770 alpha_write_fp_reg(reg, tmp1|tmp2); 771 return; 772 773 case 0x28: /* ldl */ 774 __asm__ __volatile__( 775 "1: ldq_u %1,0(%3)\n" 776 "2: ldq_u %2,3(%3)\n" 777 " extll %1,%3,%1\n" 778 " extlh %2,%3,%2\n" 779 "3:\n" 780 EXC(1b,3b,%1,%0) 781 EXC(2b,3b,%2,%0) 782 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 783 : "r"(va), "0"(0)); 784 if (error) 785 goto give_sigsegv; 786 *reg_addr = (int)(tmp1|tmp2); 787 break; 788 789 case 0x29: /* ldq */ 790 __asm__ __volatile__( 791 "1: ldq_u %1,0(%3)\n" 792 "2: ldq_u %2,7(%3)\n" 793 " extql %1,%3,%1\n" 794 " extqh %2,%3,%2\n" 795 "3:\n" 796 EXC(1b,3b,%1,%0) 797 EXC(2b,3b,%2,%0) 798 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 799 : "r"(va), "0"(0)); 800 if (error) 801 goto give_sigsegv; 802 *reg_addr = tmp1|tmp2; 803 break; 804 805 /* Note that the store sequences do not indicate that they change 806 memory because it _should_ be affecting nothing in this context. 807 (Otherwise we have other, much larger, problems.) */ 808 case 0x0d: /* stw */ 809 __asm__ __volatile__( 810 "1: ldq_u %2,1(%5)\n" 811 "2: ldq_u %1,0(%5)\n" 812 " inswh %6,%5,%4\n" 813 " inswl %6,%5,%3\n" 814 " mskwh %2,%5,%2\n" 815 " mskwl %1,%5,%1\n" 816 " or %2,%4,%2\n" 817 " or %1,%3,%1\n" 818 "3: stq_u %2,1(%5)\n" 819 "4: stq_u %1,0(%5)\n" 820 "5:\n" 821 EXC(1b,5b,%2,%0) 822 EXC(2b,5b,%1,%0) 823 EXC(3b,5b,$31,%0) 824 EXC(4b,5b,$31,%0) 825 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2), 826 "=&r"(tmp3), "=&r"(tmp4) 827 : "r"(va), "r"(*reg_addr), "0"(0)); 828 if (error) 829 goto give_sigsegv; 830 return; 831 832 case 0x26: /* sts */ 833 fake_reg = s_reg_to_mem(alpha_read_fp_reg(reg)); 834 fallthrough; 835 836 case 0x2c: /* stl */ 837 __asm__ __volatile__( 838 "1: ldq_u %2,3(%5)\n" 839 "2: ldq_u %1,0(%5)\n" 840 " inslh %6,%5,%4\n" 841 " insll %6,%5,%3\n" 842 " msklh %2,%5,%2\n" 843 " mskll %1,%5,%1\n" 844 " or %2,%4,%2\n" 845 " or %1,%3,%1\n" 846 "3: stq_u %2,3(%5)\n" 847 "4: stq_u %1,0(%5)\n" 848 "5:\n" 849 EXC(1b,5b,%2,%0) 850 EXC(2b,5b,%1,%0) 851 EXC(3b,5b,$31,%0) 852 EXC(4b,5b,$31,%0) 853 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2), 854 "=&r"(tmp3), "=&r"(tmp4) 855 : "r"(va), "r"(*reg_addr), "0"(0)); 856 if (error) 857 goto give_sigsegv; 858 return; 859 860 case 0x27: /* stt */ 861 fake_reg = alpha_read_fp_reg(reg); 862 fallthrough; 863 864 case 0x2d: /* stq */ 865 __asm__ __volatile__( 866 "1: ldq_u %2,7(%5)\n" 867 "2: ldq_u %1,0(%5)\n" 868 " insqh %6,%5,%4\n" 869 " insql %6,%5,%3\n" 870 " mskqh %2,%5,%2\n" 871 " mskql %1,%5,%1\n" 872 " or %2,%4,%2\n" 873 " or %1,%3,%1\n" 874 "3: stq_u %2,7(%5)\n" 875 "4: stq_u %1,0(%5)\n" 876 "5:\n" 877 EXC(1b,5b,%2,%0) 878 EXC(2b,5b,%1,%0) 879 EXC(3b,5b,$31,%0) 880 EXC(4b,5b,$31,%0) 881 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2), 882 "=&r"(tmp3), "=&r"(tmp4) 883 : "r"(va), "r"(*reg_addr), "0"(0)); 884 if (error) 885 goto give_sigsegv; 886 return; 887 888 default: 889 /* What instruction were you trying to use, exactly? */ 890 goto give_sigbus; 891 } 892 893 /* Only integer loads should get here; everyone else returns early. */ 894 if (reg == 30) 895 wrusp(fake_reg); 896 return; 897 898 give_sigsegv: 899 regs->pc -= 4; /* make pc point to faulting insn */ 900 901 /* We need to replicate some of the logic in mm/fault.c, 902 since we don't have access to the fault code in the 903 exception handling return path. */ 904 if ((unsigned long)va >= TASK_SIZE) 905 si_code = SEGV_ACCERR; 906 else { 907 struct mm_struct *mm = current->mm; 908 mmap_read_lock(mm); 909 if (find_vma(mm, (unsigned long)va)) 910 si_code = SEGV_ACCERR; 911 else 912 si_code = SEGV_MAPERR; 913 mmap_read_unlock(mm); 914 } 915 send_sig_fault(SIGSEGV, si_code, va, current); 916 return; 917 918 give_sigbus: 919 regs->pc -= 4; 920 send_sig_fault(SIGBUS, BUS_ADRALN, va, current); 921 return; 922 } 923 924 void 925 trap_init(void) 926 { 927 /* Tell PAL-code what global pointer we want in the kernel. */ 928 register unsigned long gptr __asm__("$29"); 929 wrkgp(gptr); 930 931 wrent(entArith, 1); 932 wrent(entMM, 2); 933 wrent(entIF, 3); 934 wrent(entUna, 4); 935 wrent(entSys, 5); 936 wrent(entDbg, 6); 937 } 938