11da177e4SLinus Torvalds /* 21da177e4SLinus Torvalds * linux/arch/alpha/kernel/sys_rx164.c 31da177e4SLinus Torvalds * 41da177e4SLinus Torvalds * Copyright (C) 1995 David A Rusling 51da177e4SLinus Torvalds * Copyright (C) 1996 Jay A Estabrook 61da177e4SLinus Torvalds * Copyright (C) 1998, 1999 Richard Henderson 71da177e4SLinus Torvalds * 81da177e4SLinus Torvalds * Code supporting the RX164 (PCA56+POLARIS). 91da177e4SLinus Torvalds */ 101da177e4SLinus Torvalds 111da177e4SLinus Torvalds #include <linux/kernel.h> 121da177e4SLinus Torvalds #include <linux/types.h> 131da177e4SLinus Torvalds #include <linux/mm.h> 141da177e4SLinus Torvalds #include <linux/sched.h> 151da177e4SLinus Torvalds #include <linux/pci.h> 161da177e4SLinus Torvalds #include <linux/init.h> 171da177e4SLinus Torvalds #include <linux/bitops.h> 181da177e4SLinus Torvalds 191da177e4SLinus Torvalds #include <asm/ptrace.h> 201da177e4SLinus Torvalds #include <asm/dma.h> 211da177e4SLinus Torvalds #include <asm/irq.h> 221da177e4SLinus Torvalds #include <asm/mmu_context.h> 231da177e4SLinus Torvalds #include <asm/io.h> 241da177e4SLinus Torvalds #include <asm/pgtable.h> 251da177e4SLinus Torvalds #include <asm/core_polaris.h> 261da177e4SLinus Torvalds #include <asm/tlbflush.h> 271da177e4SLinus Torvalds 281da177e4SLinus Torvalds #include "proto.h" 291da177e4SLinus Torvalds #include "irq_impl.h" 301da177e4SLinus Torvalds #include "pci_impl.h" 311da177e4SLinus Torvalds #include "machvec_impl.h" 321da177e4SLinus Torvalds 331da177e4SLinus Torvalds 341da177e4SLinus Torvalds /* Note mask bit is true for ENABLED irqs. */ 351da177e4SLinus Torvalds static unsigned long cached_irq_mask; 361da177e4SLinus Torvalds 371da177e4SLinus Torvalds static inline void 381da177e4SLinus Torvalds rx164_update_irq_hw(unsigned long mask) 391da177e4SLinus Torvalds { 401da177e4SLinus Torvalds volatile unsigned int *irq_mask; 411da177e4SLinus Torvalds 421da177e4SLinus Torvalds irq_mask = (void *)(POLARIS_DENSE_CONFIG_BASE + 0x74); 431da177e4SLinus Torvalds *irq_mask = mask; 441da177e4SLinus Torvalds mb(); 451da177e4SLinus Torvalds *irq_mask; 461da177e4SLinus Torvalds } 471da177e4SLinus Torvalds 481da177e4SLinus Torvalds static inline void 492758a8afSThomas Gleixner rx164_enable_irq(struct irq_data *d) 501da177e4SLinus Torvalds { 512758a8afSThomas Gleixner rx164_update_irq_hw(cached_irq_mask |= 1UL << (d->irq - 16)); 521da177e4SLinus Torvalds } 531da177e4SLinus Torvalds 541da177e4SLinus Torvalds static void 552758a8afSThomas Gleixner rx164_disable_irq(struct irq_data *d) 561da177e4SLinus Torvalds { 572758a8afSThomas Gleixner rx164_update_irq_hw(cached_irq_mask &= ~(1UL << (d->irq - 16))); 581da177e4SLinus Torvalds } 591da177e4SLinus Torvalds 6044377f62SThomas Gleixner static struct irq_chip rx164_irq_type = { 618ab1221cSThomas Gleixner .name = "RX164", 622758a8afSThomas Gleixner .irq_unmask = rx164_enable_irq, 632758a8afSThomas Gleixner .irq_mask = rx164_disable_irq, 642758a8afSThomas Gleixner .irq_mask_ack = rx164_disable_irq, 651da177e4SLinus Torvalds }; 661da177e4SLinus Torvalds 671da177e4SLinus Torvalds static void 687ca56053SAl Viro rx164_device_interrupt(unsigned long vector) 691da177e4SLinus Torvalds { 701da177e4SLinus Torvalds unsigned long pld; 711da177e4SLinus Torvalds volatile unsigned int *dirr; 721da177e4SLinus Torvalds long i; 731da177e4SLinus Torvalds 741da177e4SLinus Torvalds /* Read the interrupt summary register. On Polaris, this is 751da177e4SLinus Torvalds the DIRR register in PCI config space (offset 0x84). */ 761da177e4SLinus Torvalds dirr = (void *)(POLARIS_DENSE_CONFIG_BASE + 0x84); 771da177e4SLinus Torvalds pld = *dirr; 781da177e4SLinus Torvalds 791da177e4SLinus Torvalds /* 801da177e4SLinus Torvalds * Now for every possible bit set, work through them and call 811da177e4SLinus Torvalds * the appropriate interrupt handler. 821da177e4SLinus Torvalds */ 831da177e4SLinus Torvalds while (pld) { 841da177e4SLinus Torvalds i = ffz(~pld); 851da177e4SLinus Torvalds pld &= pld - 1; /* clear least bit set */ 861da177e4SLinus Torvalds if (i == 20) { 873dbb8c62SAl Viro isa_no_iack_sc_device_interrupt(vector); 881da177e4SLinus Torvalds } else { 893dbb8c62SAl Viro handle_irq(16+i); 901da177e4SLinus Torvalds } 911da177e4SLinus Torvalds } 921da177e4SLinus Torvalds } 931da177e4SLinus Torvalds 941da177e4SLinus Torvalds static void __init 951da177e4SLinus Torvalds rx164_init_irq(void) 961da177e4SLinus Torvalds { 971da177e4SLinus Torvalds long i; 981da177e4SLinus Torvalds 991da177e4SLinus Torvalds rx164_update_irq_hw(0); 1001da177e4SLinus Torvalds for (i = 16; i < 40; ++i) { 101a9eb076bSThomas Gleixner irq_set_chip_and_handler(i, &rx164_irq_type, handle_level_irq); 1022758a8afSThomas Gleixner irq_set_status_flags(i, IRQ_LEVEL); 1031da177e4SLinus Torvalds } 1041da177e4SLinus Torvalds 1051da177e4SLinus Torvalds init_i8259a_irqs(); 1061da177e4SLinus Torvalds common_init_isa_dma(); 1071da177e4SLinus Torvalds 1081da177e4SLinus Torvalds setup_irq(16+20, &isa_cascade_irqaction); 1091da177e4SLinus Torvalds } 1101da177e4SLinus Torvalds 1111da177e4SLinus Torvalds 1121da177e4SLinus Torvalds /* 1131da177e4SLinus Torvalds * The RX164 changed its interrupt routing between pass1 and pass2... 1141da177e4SLinus Torvalds * 1151da177e4SLinus Torvalds * PASS1: 1161da177e4SLinus Torvalds * 1171da177e4SLinus Torvalds * Slot IDSEL INTA INTB INTC INTD 1181da177e4SLinus Torvalds * 0 6 5 10 15 20 1191da177e4SLinus Torvalds * 1 7 4 9 14 19 1201da177e4SLinus Torvalds * 2 5 3 8 13 18 1211da177e4SLinus Torvalds * 3 9 2 7 12 17 1221da177e4SLinus Torvalds * 4 10 1 6 11 16 1231da177e4SLinus Torvalds * 1241da177e4SLinus Torvalds * PASS2: 1251da177e4SLinus Torvalds * Slot IDSEL INTA INTB INTC INTD 1261da177e4SLinus Torvalds * 0 5 1 7 12 17 1271da177e4SLinus Torvalds * 1 6 2 8 13 18 1281da177e4SLinus Torvalds * 2 8 3 9 14 19 1291da177e4SLinus Torvalds * 3 9 4 10 15 20 1301da177e4SLinus Torvalds * 4 10 5 11 16 6 1311da177e4SLinus Torvalds * 1321da177e4SLinus Torvalds */ 1331da177e4SLinus Torvalds 1341da177e4SLinus Torvalds /* 1351da177e4SLinus Torvalds * IdSel 1361da177e4SLinus Torvalds * 5 32 bit PCI option slot 0 1371da177e4SLinus Torvalds * 6 64 bit PCI option slot 1 1381da177e4SLinus Torvalds * 7 PCI-ISA bridge 1391da177e4SLinus Torvalds * 7 64 bit PCI option slot 2 1401da177e4SLinus Torvalds * 9 32 bit PCI option slot 3 1411da177e4SLinus Torvalds * 10 PCI-PCI bridge 1421da177e4SLinus Torvalds * 1431da177e4SLinus Torvalds */ 1441da177e4SLinus Torvalds 145*814eae59SLorenzo Pieralisi static int 146d5341942SRalf Baechle rx164_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) 1471da177e4SLinus Torvalds { 1481da177e4SLinus Torvalds #if 0 1491da177e4SLinus Torvalds static char irq_tab_pass1[6][5] __initdata = { 1501da177e4SLinus Torvalds /*INT INTA INTB INTC INTD */ 1511da177e4SLinus Torvalds { 16+3, 16+3, 16+8, 16+13, 16+18}, /* IdSel 5, slot 2 */ 1521da177e4SLinus Torvalds { 16+5, 16+5, 16+10, 16+15, 16+20}, /* IdSel 6, slot 0 */ 1531da177e4SLinus Torvalds { 16+4, 16+4, 16+9, 16+14, 16+19}, /* IdSel 7, slot 1 */ 1541da177e4SLinus Torvalds { -1, -1, -1, -1, -1}, /* IdSel 8, PCI/ISA bridge */ 1551da177e4SLinus Torvalds { 16+2, 16+2, 16+7, 16+12, 16+17}, /* IdSel 9, slot 3 */ 1561da177e4SLinus Torvalds { 16+1, 16+1, 16+6, 16+11, 16+16}, /* IdSel 10, slot 4 */ 1571da177e4SLinus Torvalds }; 1581da177e4SLinus Torvalds #else 159*814eae59SLorenzo Pieralisi static char irq_tab[6][5] = { 1601da177e4SLinus Torvalds /*INT INTA INTB INTC INTD */ 1611da177e4SLinus Torvalds { 16+0, 16+0, 16+6, 16+11, 16+16}, /* IdSel 5, slot 0 */ 1621da177e4SLinus Torvalds { 16+1, 16+1, 16+7, 16+12, 16+17}, /* IdSel 6, slot 1 */ 1631da177e4SLinus Torvalds { -1, -1, -1, -1, -1}, /* IdSel 7, PCI/ISA bridge */ 1641da177e4SLinus Torvalds { 16+2, 16+2, 16+8, 16+13, 16+18}, /* IdSel 8, slot 2 */ 1651da177e4SLinus Torvalds { 16+3, 16+3, 16+9, 16+14, 16+19}, /* IdSel 9, slot 3 */ 1661da177e4SLinus Torvalds { 16+4, 16+4, 16+10, 16+15, 16+5}, /* IdSel 10, PCI-PCI */ 1671da177e4SLinus Torvalds }; 1681da177e4SLinus Torvalds #endif 1691da177e4SLinus Torvalds const long min_idsel = 5, max_idsel = 10, irqs_per_slot = 5; 1701da177e4SLinus Torvalds 1711da177e4SLinus Torvalds /* JRP - Need to figure out how to distinguish pass1 from pass2, 1721da177e4SLinus Torvalds and use the correct table. */ 1731da177e4SLinus Torvalds return COMMON_TABLE_LOOKUP; 1741da177e4SLinus Torvalds } 1751da177e4SLinus Torvalds 1761da177e4SLinus Torvalds 1771da177e4SLinus Torvalds /* 1781da177e4SLinus Torvalds * The System Vector 1791da177e4SLinus Torvalds */ 1801da177e4SLinus Torvalds 1811da177e4SLinus Torvalds struct alpha_machine_vector rx164_mv __initmv = { 1821da177e4SLinus Torvalds .vector_name = "RX164", 1831da177e4SLinus Torvalds DO_EV5_MMU, 1841da177e4SLinus Torvalds DO_DEFAULT_RTC, 1851da177e4SLinus Torvalds DO_POLARIS_IO, 1861da177e4SLinus Torvalds .machine_check = polaris_machine_check, 1871da177e4SLinus Torvalds .max_isa_dma_address = ALPHA_MAX_ISA_DMA_ADDRESS, 1881da177e4SLinus Torvalds .min_io_address = DEFAULT_IO_BASE, 1891da177e4SLinus Torvalds .min_mem_address = DEFAULT_MEM_BASE, 1901da177e4SLinus Torvalds 1911da177e4SLinus Torvalds .nr_irqs = 40, 1921da177e4SLinus Torvalds .device_interrupt = rx164_device_interrupt, 1931da177e4SLinus Torvalds 1941da177e4SLinus Torvalds .init_arch = polaris_init_arch, 1951da177e4SLinus Torvalds .init_irq = rx164_init_irq, 1961da177e4SLinus Torvalds .init_rtc = common_init_rtc, 1971da177e4SLinus Torvalds .init_pci = common_init_pci, 1981da177e4SLinus Torvalds .kill_arch = NULL, 1991da177e4SLinus Torvalds .pci_map_irq = rx164_map_irq, 2001da177e4SLinus Torvalds .pci_swizzle = common_swizzle, 2011da177e4SLinus Torvalds }; 2021da177e4SLinus Torvalds ALIAS_MV(rx164) 203