1*1da177e4SLinus Torvalds /* 2*1da177e4SLinus Torvalds * linux/arch/alpha/kernel/sys_rx164.c 3*1da177e4SLinus Torvalds * 4*1da177e4SLinus Torvalds * Copyright (C) 1995 David A Rusling 5*1da177e4SLinus Torvalds * Copyright (C) 1996 Jay A Estabrook 6*1da177e4SLinus Torvalds * Copyright (C) 1998, 1999 Richard Henderson 7*1da177e4SLinus Torvalds * 8*1da177e4SLinus Torvalds * Code supporting the RX164 (PCA56+POLARIS). 9*1da177e4SLinus Torvalds */ 10*1da177e4SLinus Torvalds 11*1da177e4SLinus Torvalds #include <linux/kernel.h> 12*1da177e4SLinus Torvalds #include <linux/types.h> 13*1da177e4SLinus Torvalds #include <linux/mm.h> 14*1da177e4SLinus Torvalds #include <linux/sched.h> 15*1da177e4SLinus Torvalds #include <linux/pci.h> 16*1da177e4SLinus Torvalds #include <linux/init.h> 17*1da177e4SLinus Torvalds #include <linux/bitops.h> 18*1da177e4SLinus Torvalds 19*1da177e4SLinus Torvalds #include <asm/ptrace.h> 20*1da177e4SLinus Torvalds #include <asm/system.h> 21*1da177e4SLinus Torvalds #include <asm/dma.h> 22*1da177e4SLinus Torvalds #include <asm/irq.h> 23*1da177e4SLinus Torvalds #include <asm/mmu_context.h> 24*1da177e4SLinus Torvalds #include <asm/io.h> 25*1da177e4SLinus Torvalds #include <asm/pgtable.h> 26*1da177e4SLinus Torvalds #include <asm/core_polaris.h> 27*1da177e4SLinus Torvalds #include <asm/tlbflush.h> 28*1da177e4SLinus Torvalds 29*1da177e4SLinus Torvalds #include "proto.h" 30*1da177e4SLinus Torvalds #include "irq_impl.h" 31*1da177e4SLinus Torvalds #include "pci_impl.h" 32*1da177e4SLinus Torvalds #include "machvec_impl.h" 33*1da177e4SLinus Torvalds 34*1da177e4SLinus Torvalds 35*1da177e4SLinus Torvalds /* Note mask bit is true for ENABLED irqs. */ 36*1da177e4SLinus Torvalds static unsigned long cached_irq_mask; 37*1da177e4SLinus Torvalds 38*1da177e4SLinus Torvalds static inline void 39*1da177e4SLinus Torvalds rx164_update_irq_hw(unsigned long mask) 40*1da177e4SLinus Torvalds { 41*1da177e4SLinus Torvalds volatile unsigned int *irq_mask; 42*1da177e4SLinus Torvalds 43*1da177e4SLinus Torvalds irq_mask = (void *)(POLARIS_DENSE_CONFIG_BASE + 0x74); 44*1da177e4SLinus Torvalds *irq_mask = mask; 45*1da177e4SLinus Torvalds mb(); 46*1da177e4SLinus Torvalds *irq_mask; 47*1da177e4SLinus Torvalds } 48*1da177e4SLinus Torvalds 49*1da177e4SLinus Torvalds static inline void 50*1da177e4SLinus Torvalds rx164_enable_irq(unsigned int irq) 51*1da177e4SLinus Torvalds { 52*1da177e4SLinus Torvalds rx164_update_irq_hw(cached_irq_mask |= 1UL << (irq - 16)); 53*1da177e4SLinus Torvalds } 54*1da177e4SLinus Torvalds 55*1da177e4SLinus Torvalds static void 56*1da177e4SLinus Torvalds rx164_disable_irq(unsigned int irq) 57*1da177e4SLinus Torvalds { 58*1da177e4SLinus Torvalds rx164_update_irq_hw(cached_irq_mask &= ~(1UL << (irq - 16))); 59*1da177e4SLinus Torvalds } 60*1da177e4SLinus Torvalds 61*1da177e4SLinus Torvalds static unsigned int 62*1da177e4SLinus Torvalds rx164_startup_irq(unsigned int irq) 63*1da177e4SLinus Torvalds { 64*1da177e4SLinus Torvalds rx164_enable_irq(irq); 65*1da177e4SLinus Torvalds return 0; 66*1da177e4SLinus Torvalds } 67*1da177e4SLinus Torvalds 68*1da177e4SLinus Torvalds static void 69*1da177e4SLinus Torvalds rx164_end_irq(unsigned int irq) 70*1da177e4SLinus Torvalds { 71*1da177e4SLinus Torvalds if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) 72*1da177e4SLinus Torvalds rx164_enable_irq(irq); 73*1da177e4SLinus Torvalds } 74*1da177e4SLinus Torvalds 75*1da177e4SLinus Torvalds static struct hw_interrupt_type rx164_irq_type = { 76*1da177e4SLinus Torvalds .typename = "RX164", 77*1da177e4SLinus Torvalds .startup = rx164_startup_irq, 78*1da177e4SLinus Torvalds .shutdown = rx164_disable_irq, 79*1da177e4SLinus Torvalds .enable = rx164_enable_irq, 80*1da177e4SLinus Torvalds .disable = rx164_disable_irq, 81*1da177e4SLinus Torvalds .ack = rx164_disable_irq, 82*1da177e4SLinus Torvalds .end = rx164_end_irq, 83*1da177e4SLinus Torvalds }; 84*1da177e4SLinus Torvalds 85*1da177e4SLinus Torvalds static void 86*1da177e4SLinus Torvalds rx164_device_interrupt(unsigned long vector, struct pt_regs *regs) 87*1da177e4SLinus Torvalds { 88*1da177e4SLinus Torvalds unsigned long pld; 89*1da177e4SLinus Torvalds volatile unsigned int *dirr; 90*1da177e4SLinus Torvalds long i; 91*1da177e4SLinus Torvalds 92*1da177e4SLinus Torvalds /* Read the interrupt summary register. On Polaris, this is 93*1da177e4SLinus Torvalds the DIRR register in PCI config space (offset 0x84). */ 94*1da177e4SLinus Torvalds dirr = (void *)(POLARIS_DENSE_CONFIG_BASE + 0x84); 95*1da177e4SLinus Torvalds pld = *dirr; 96*1da177e4SLinus Torvalds 97*1da177e4SLinus Torvalds /* 98*1da177e4SLinus Torvalds * Now for every possible bit set, work through them and call 99*1da177e4SLinus Torvalds * the appropriate interrupt handler. 100*1da177e4SLinus Torvalds */ 101*1da177e4SLinus Torvalds while (pld) { 102*1da177e4SLinus Torvalds i = ffz(~pld); 103*1da177e4SLinus Torvalds pld &= pld - 1; /* clear least bit set */ 104*1da177e4SLinus Torvalds if (i == 20) { 105*1da177e4SLinus Torvalds isa_no_iack_sc_device_interrupt(vector, regs); 106*1da177e4SLinus Torvalds } else { 107*1da177e4SLinus Torvalds handle_irq(16+i, regs); 108*1da177e4SLinus Torvalds } 109*1da177e4SLinus Torvalds } 110*1da177e4SLinus Torvalds } 111*1da177e4SLinus Torvalds 112*1da177e4SLinus Torvalds static void __init 113*1da177e4SLinus Torvalds rx164_init_irq(void) 114*1da177e4SLinus Torvalds { 115*1da177e4SLinus Torvalds long i; 116*1da177e4SLinus Torvalds 117*1da177e4SLinus Torvalds rx164_update_irq_hw(0); 118*1da177e4SLinus Torvalds for (i = 16; i < 40; ++i) { 119*1da177e4SLinus Torvalds irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; 120*1da177e4SLinus Torvalds irq_desc[i].handler = &rx164_irq_type; 121*1da177e4SLinus Torvalds } 122*1da177e4SLinus Torvalds 123*1da177e4SLinus Torvalds init_i8259a_irqs(); 124*1da177e4SLinus Torvalds common_init_isa_dma(); 125*1da177e4SLinus Torvalds 126*1da177e4SLinus Torvalds setup_irq(16+20, &isa_cascade_irqaction); 127*1da177e4SLinus Torvalds } 128*1da177e4SLinus Torvalds 129*1da177e4SLinus Torvalds 130*1da177e4SLinus Torvalds /* 131*1da177e4SLinus Torvalds * The RX164 changed its interrupt routing between pass1 and pass2... 132*1da177e4SLinus Torvalds * 133*1da177e4SLinus Torvalds * PASS1: 134*1da177e4SLinus Torvalds * 135*1da177e4SLinus Torvalds * Slot IDSEL INTA INTB INTC INTD 136*1da177e4SLinus Torvalds * 0 6 5 10 15 20 137*1da177e4SLinus Torvalds * 1 7 4 9 14 19 138*1da177e4SLinus Torvalds * 2 5 3 8 13 18 139*1da177e4SLinus Torvalds * 3 9 2 7 12 17 140*1da177e4SLinus Torvalds * 4 10 1 6 11 16 141*1da177e4SLinus Torvalds * 142*1da177e4SLinus Torvalds * PASS2: 143*1da177e4SLinus Torvalds * Slot IDSEL INTA INTB INTC INTD 144*1da177e4SLinus Torvalds * 0 5 1 7 12 17 145*1da177e4SLinus Torvalds * 1 6 2 8 13 18 146*1da177e4SLinus Torvalds * 2 8 3 9 14 19 147*1da177e4SLinus Torvalds * 3 9 4 10 15 20 148*1da177e4SLinus Torvalds * 4 10 5 11 16 6 149*1da177e4SLinus Torvalds * 150*1da177e4SLinus Torvalds */ 151*1da177e4SLinus Torvalds 152*1da177e4SLinus Torvalds /* 153*1da177e4SLinus Torvalds * IdSel 154*1da177e4SLinus Torvalds * 5 32 bit PCI option slot 0 155*1da177e4SLinus Torvalds * 6 64 bit PCI option slot 1 156*1da177e4SLinus Torvalds * 7 PCI-ISA bridge 157*1da177e4SLinus Torvalds * 7 64 bit PCI option slot 2 158*1da177e4SLinus Torvalds * 9 32 bit PCI option slot 3 159*1da177e4SLinus Torvalds * 10 PCI-PCI bridge 160*1da177e4SLinus Torvalds * 161*1da177e4SLinus Torvalds */ 162*1da177e4SLinus Torvalds 163*1da177e4SLinus Torvalds static int __init 164*1da177e4SLinus Torvalds rx164_map_irq(struct pci_dev *dev, u8 slot, u8 pin) 165*1da177e4SLinus Torvalds { 166*1da177e4SLinus Torvalds #if 0 167*1da177e4SLinus Torvalds static char irq_tab_pass1[6][5] __initdata = { 168*1da177e4SLinus Torvalds /*INT INTA INTB INTC INTD */ 169*1da177e4SLinus Torvalds { 16+3, 16+3, 16+8, 16+13, 16+18}, /* IdSel 5, slot 2 */ 170*1da177e4SLinus Torvalds { 16+5, 16+5, 16+10, 16+15, 16+20}, /* IdSel 6, slot 0 */ 171*1da177e4SLinus Torvalds { 16+4, 16+4, 16+9, 16+14, 16+19}, /* IdSel 7, slot 1 */ 172*1da177e4SLinus Torvalds { -1, -1, -1, -1, -1}, /* IdSel 8, PCI/ISA bridge */ 173*1da177e4SLinus Torvalds { 16+2, 16+2, 16+7, 16+12, 16+17}, /* IdSel 9, slot 3 */ 174*1da177e4SLinus Torvalds { 16+1, 16+1, 16+6, 16+11, 16+16}, /* IdSel 10, slot 4 */ 175*1da177e4SLinus Torvalds }; 176*1da177e4SLinus Torvalds #else 177*1da177e4SLinus Torvalds static char irq_tab[6][5] __initdata = { 178*1da177e4SLinus Torvalds /*INT INTA INTB INTC INTD */ 179*1da177e4SLinus Torvalds { 16+0, 16+0, 16+6, 16+11, 16+16}, /* IdSel 5, slot 0 */ 180*1da177e4SLinus Torvalds { 16+1, 16+1, 16+7, 16+12, 16+17}, /* IdSel 6, slot 1 */ 181*1da177e4SLinus Torvalds { -1, -1, -1, -1, -1}, /* IdSel 7, PCI/ISA bridge */ 182*1da177e4SLinus Torvalds { 16+2, 16+2, 16+8, 16+13, 16+18}, /* IdSel 8, slot 2 */ 183*1da177e4SLinus Torvalds { 16+3, 16+3, 16+9, 16+14, 16+19}, /* IdSel 9, slot 3 */ 184*1da177e4SLinus Torvalds { 16+4, 16+4, 16+10, 16+15, 16+5}, /* IdSel 10, PCI-PCI */ 185*1da177e4SLinus Torvalds }; 186*1da177e4SLinus Torvalds #endif 187*1da177e4SLinus Torvalds const long min_idsel = 5, max_idsel = 10, irqs_per_slot = 5; 188*1da177e4SLinus Torvalds 189*1da177e4SLinus Torvalds /* JRP - Need to figure out how to distinguish pass1 from pass2, 190*1da177e4SLinus Torvalds and use the correct table. */ 191*1da177e4SLinus Torvalds return COMMON_TABLE_LOOKUP; 192*1da177e4SLinus Torvalds } 193*1da177e4SLinus Torvalds 194*1da177e4SLinus Torvalds 195*1da177e4SLinus Torvalds /* 196*1da177e4SLinus Torvalds * The System Vector 197*1da177e4SLinus Torvalds */ 198*1da177e4SLinus Torvalds 199*1da177e4SLinus Torvalds struct alpha_machine_vector rx164_mv __initmv = { 200*1da177e4SLinus Torvalds .vector_name = "RX164", 201*1da177e4SLinus Torvalds DO_EV5_MMU, 202*1da177e4SLinus Torvalds DO_DEFAULT_RTC, 203*1da177e4SLinus Torvalds DO_POLARIS_IO, 204*1da177e4SLinus Torvalds .machine_check = polaris_machine_check, 205*1da177e4SLinus Torvalds .max_isa_dma_address = ALPHA_MAX_ISA_DMA_ADDRESS, 206*1da177e4SLinus Torvalds .min_io_address = DEFAULT_IO_BASE, 207*1da177e4SLinus Torvalds .min_mem_address = DEFAULT_MEM_BASE, 208*1da177e4SLinus Torvalds 209*1da177e4SLinus Torvalds .nr_irqs = 40, 210*1da177e4SLinus Torvalds .device_interrupt = rx164_device_interrupt, 211*1da177e4SLinus Torvalds 212*1da177e4SLinus Torvalds .init_arch = polaris_init_arch, 213*1da177e4SLinus Torvalds .init_irq = rx164_init_irq, 214*1da177e4SLinus Torvalds .init_rtc = common_init_rtc, 215*1da177e4SLinus Torvalds .init_pci = common_init_pci, 216*1da177e4SLinus Torvalds .kill_arch = NULL, 217*1da177e4SLinus Torvalds .pci_map_irq = rx164_map_irq, 218*1da177e4SLinus Torvalds .pci_swizzle = common_swizzle, 219*1da177e4SLinus Torvalds }; 220*1da177e4SLinus Torvalds ALIAS_MV(rx164) 221