1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * linux/arch/alpha/kernel/sys_mikasa.c 4 * 5 * Copyright (C) 1995 David A Rusling 6 * Copyright (C) 1996 Jay A Estabrook 7 * Copyright (C) 1998, 1999 Richard Henderson 8 * 9 * Code supporting the MIKASA (AlphaServer 1000). 10 */ 11 12 #include <linux/kernel.h> 13 #include <linux/types.h> 14 #include <linux/mm.h> 15 #include <linux/sched.h> 16 #include <linux/pci.h> 17 #include <linux/init.h> 18 #include <linux/bitops.h> 19 20 #include <asm/ptrace.h> 21 #include <asm/mce.h> 22 #include <asm/dma.h> 23 #include <asm/irq.h> 24 #include <asm/mmu_context.h> 25 #include <asm/io.h> 26 #include <asm/core_cia.h> 27 #include <asm/tlbflush.h> 28 29 #include "proto.h" 30 #include "irq_impl.h" 31 #include "pci_impl.h" 32 #include "machvec_impl.h" 33 34 35 /* Note mask bit is true for ENABLED irqs. */ 36 static int cached_irq_mask; 37 38 static inline void 39 mikasa_update_irq_hw(int mask) 40 { 41 outw(mask, 0x536); 42 } 43 44 static inline void 45 mikasa_enable_irq(struct irq_data *d) 46 { 47 mikasa_update_irq_hw(cached_irq_mask |= 1 << (d->irq - 16)); 48 } 49 50 static void 51 mikasa_disable_irq(struct irq_data *d) 52 { 53 mikasa_update_irq_hw(cached_irq_mask &= ~(1 << (d->irq - 16))); 54 } 55 56 static struct irq_chip mikasa_irq_type = { 57 .name = "MIKASA", 58 .irq_unmask = mikasa_enable_irq, 59 .irq_mask = mikasa_disable_irq, 60 .irq_mask_ack = mikasa_disable_irq, 61 }; 62 63 static void 64 mikasa_device_interrupt(unsigned long vector) 65 { 66 unsigned long pld; 67 unsigned int i; 68 69 /* Read the interrupt summary registers */ 70 pld = (((~inw(0x534) & 0x0000ffffUL) << 16) 71 | (((unsigned long) inb(0xa0)) << 8) 72 | inb(0x20)); 73 74 /* 75 * Now for every possible bit set, work through them and call 76 * the appropriate interrupt handler. 77 */ 78 while (pld) { 79 i = ffz(~pld); 80 pld &= pld - 1; /* clear least bit set */ 81 if (i < 16) { 82 isa_device_interrupt(vector); 83 } else { 84 handle_irq(i); 85 } 86 } 87 } 88 89 static void __init 90 mikasa_init_irq(void) 91 { 92 long i; 93 94 if (alpha_using_srm) 95 alpha_mv.device_interrupt = srm_device_interrupt; 96 97 mikasa_update_irq_hw(0); 98 99 for (i = 16; i < 32; ++i) { 100 irq_set_chip_and_handler(i, &mikasa_irq_type, 101 handle_level_irq); 102 irq_set_status_flags(i, IRQ_LEVEL); 103 } 104 105 init_i8259a_irqs(); 106 common_init_isa_dma(); 107 } 108 109 110 /* 111 * PCI Fixup configuration. 112 * 113 * Summary @ 0x536: 114 * Bit Meaning 115 * 0 Interrupt Line A from slot 0 116 * 1 Interrupt Line B from slot 0 117 * 2 Interrupt Line C from slot 0 118 * 3 Interrupt Line D from slot 0 119 * 4 Interrupt Line A from slot 1 120 * 5 Interrupt line B from slot 1 121 * 6 Interrupt Line C from slot 1 122 * 7 Interrupt Line D from slot 1 123 * 8 Interrupt Line A from slot 2 124 * 9 Interrupt Line B from slot 2 125 *10 Interrupt Line C from slot 2 126 *11 Interrupt Line D from slot 2 127 *12 NCR 810 SCSI 128 *13 Power Supply Fail 129 *14 Temperature Warn 130 *15 Reserved 131 * 132 * The device to slot mapping looks like: 133 * 134 * Slot Device 135 * 6 NCR SCSI controller 136 * 7 Intel PCI-EISA bridge chip 137 * 11 PCI on board slot 0 138 * 12 PCI on board slot 1 139 * 13 PCI on board slot 2 140 * 141 * 142 * This two layered interrupt approach means that we allocate IRQ 16 and 143 * above for PCI interrupts. The IRQ relates to which bit the interrupt 144 * comes in on. This makes interrupt processing much easier. 145 */ 146 147 static int 148 mikasa_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) 149 { 150 static char irq_tab[8][5] = { 151 /*INT INTA INTB INTC INTD */ 152 {16+12, 16+12, 16+12, 16+12, 16+12}, /* IdSel 17, SCSI */ 153 { -1, -1, -1, -1, -1}, /* IdSel 18, PCEB */ 154 { -1, -1, -1, -1, -1}, /* IdSel 19, ???? */ 155 { -1, -1, -1, -1, -1}, /* IdSel 20, ???? */ 156 { -1, -1, -1, -1, -1}, /* IdSel 21, ???? */ 157 { 16+0, 16+0, 16+1, 16+2, 16+3}, /* IdSel 22, slot 0 */ 158 { 16+4, 16+4, 16+5, 16+6, 16+7}, /* IdSel 23, slot 1 */ 159 { 16+8, 16+8, 16+9, 16+10, 16+11}, /* IdSel 24, slot 2 */ 160 }; 161 const long min_idsel = 6, max_idsel = 13, irqs_per_slot = 5; 162 return COMMON_TABLE_LOOKUP; 163 } 164 165 166 /* 167 * The System Vector 168 */ 169 struct alpha_machine_vector mikasa_primo_mv __initmv = { 170 .vector_name = "Mikasa-Primo", 171 DO_EV5_MMU, 172 DO_DEFAULT_RTC, 173 DO_CIA_IO, 174 .machine_check = cia_machine_check, 175 .max_isa_dma_address = ALPHA_MAX_ISA_DMA_ADDRESS, 176 .min_io_address = DEFAULT_IO_BASE, 177 .min_mem_address = CIA_DEFAULT_MEM_BASE, 178 179 .nr_irqs = 32, 180 .device_interrupt = mikasa_device_interrupt, 181 182 .init_arch = cia_init_arch, 183 .init_irq = mikasa_init_irq, 184 .init_rtc = common_init_rtc, 185 .init_pci = cia_init_pci, 186 .kill_arch = cia_kill_arch, 187 .pci_map_irq = mikasa_map_irq, 188 .pci_swizzle = common_swizzle, 189 }; 190 ALIAS_MV(mikasa_primo) 191