1 // SPDX-License-Identifier: GPL-2.0 2 /* ptrace.c */ 3 /* By Ross Biro 1/23/92 */ 4 /* edited by Linus Torvalds */ 5 /* mangled further by Bob Manson (manson@santafe.edu) */ 6 /* more mutilation by David Mosberger (davidm@azstarnet.com) */ 7 8 #include <linux/kernel.h> 9 #include <linux/sched.h> 10 #include <linux/sched/task_stack.h> 11 #include <linux/mm.h> 12 #include <linux/smp.h> 13 #include <linux/errno.h> 14 #include <linux/ptrace.h> 15 #include <linux/user.h> 16 #include <linux/security.h> 17 #include <linux/signal.h> 18 #include <linux/audit.h> 19 #include <linux/seccomp.h> 20 #include <asm/syscall.h> 21 22 #include <linux/uaccess.h> 23 #include <asm/fpu.h> 24 25 #include "proto.h" 26 #include <linux/uio.h> 27 28 #define DEBUG DBG_MEM 29 #undef DEBUG 30 31 #ifdef DEBUG 32 enum { 33 DBG_MEM = (1<<0), 34 DBG_BPT = (1<<1), 35 DBG_MEM_ALL = (1<<2) 36 }; 37 #define DBG(fac,args) {if ((fac) & DEBUG) printk args;} 38 #else 39 #define DBG(fac,args) 40 #endif 41 42 #define BREAKINST 0x00000080 /* call_pal bpt */ 43 44 /* 45 * does not yet catch signals sent when the child dies. 46 * in exit.c or in signal.c. 47 */ 48 49 /* 50 * Processes always block with the following stack-layout: 51 * 52 * +================================+ <---- task + 2*PAGE_SIZE 53 * | PALcode saved frame (ps, pc, | ^ 54 * | gp, a0, a1, a2) | | 55 * +================================+ | struct pt_regs 56 * | | | 57 * | frame generated by SAVE_ALL | | 58 * | | v 59 * +================================+ 60 * | | ^ 61 * | frame saved by do_switch_stack | | struct switch_stack 62 * | | v 63 * +================================+ 64 */ 65 66 /* 67 * The following table maps a register index into the stack offset at 68 * which the register is saved. Register indices are 0-31 for integer 69 * regs, 32-63 for fp regs, and 64 for the pc. Notice that sp and 70 * zero have no stack-slot and need to be treated specially (see 71 * get_reg/put_reg below). 72 */ 73 enum { 74 REG_R0 = 0, REG_F0 = 32, REG_FPCR = 63, REG_PC = 64 75 }; 76 77 #define PT_REG(reg) \ 78 (PAGE_SIZE*2 - sizeof(struct pt_regs) + offsetof(struct pt_regs, reg)) 79 80 #define SW_REG(reg) \ 81 (PAGE_SIZE*2 - sizeof(struct pt_regs) - sizeof(struct switch_stack) \ 82 + offsetof(struct switch_stack, reg)) 83 84 #define FP_REG(reg) (offsetof(struct thread_info, reg)) 85 86 static int regoff[] = { 87 PT_REG( r0), PT_REG( r1), PT_REG( r2), PT_REG( r3), 88 PT_REG( r4), PT_REG( r5), PT_REG( r6), PT_REG( r7), 89 PT_REG( r8), SW_REG( r9), SW_REG( r10), SW_REG( r11), 90 SW_REG( r12), SW_REG( r13), SW_REG( r14), SW_REG( r15), 91 PT_REG( r16), PT_REG( r17), PT_REG( r18), PT_REG( r19), 92 PT_REG( r20), PT_REG( r21), PT_REG( r22), PT_REG( r23), 93 PT_REG( r24), PT_REG( r25), PT_REG( r26), PT_REG( r27), 94 PT_REG( r28), PT_REG( gp), -1, -1, 95 FP_REG(fp[ 0]), FP_REG(fp[ 1]), FP_REG(fp[ 2]), FP_REG(fp[ 3]), 96 FP_REG(fp[ 4]), FP_REG(fp[ 5]), FP_REG(fp[ 6]), FP_REG(fp[ 7]), 97 FP_REG(fp[ 8]), FP_REG(fp[ 9]), FP_REG(fp[10]), FP_REG(fp[11]), 98 FP_REG(fp[12]), FP_REG(fp[13]), FP_REG(fp[14]), FP_REG(fp[15]), 99 FP_REG(fp[16]), FP_REG(fp[17]), FP_REG(fp[18]), FP_REG(fp[19]), 100 FP_REG(fp[20]), FP_REG(fp[21]), FP_REG(fp[22]), FP_REG(fp[23]), 101 FP_REG(fp[24]), FP_REG(fp[25]), FP_REG(fp[26]), FP_REG(fp[27]), 102 FP_REG(fp[28]), FP_REG(fp[29]), FP_REG(fp[30]), FP_REG(fp[31]), 103 PT_REG( pc) 104 }; 105 106 static unsigned long zero; 107 108 /* 109 * Get address of register REGNO in task TASK. 110 */ 111 static unsigned long * 112 get_reg_addr(struct task_struct * task, unsigned long regno) 113 { 114 unsigned long *addr; 115 116 if (regno == 30) { 117 addr = &task_thread_info(task)->pcb.usp; 118 } else if (regno == 65) { 119 addr = &task_thread_info(task)->pcb.unique; 120 } else if (regno == 31 || regno > 65) { 121 zero = 0; 122 addr = &zero; 123 } else { 124 addr = task_stack_page(task) + regoff[regno]; 125 } 126 return addr; 127 } 128 129 /* 130 * Get contents of register REGNO in task TASK. 131 */ 132 static unsigned long 133 get_reg(struct task_struct * task, unsigned long regno) 134 { 135 /* Special hack for fpcr -- combine hardware and software bits. */ 136 if (regno == 63) { 137 unsigned long fpcr = *get_reg_addr(task, regno); 138 unsigned long swcr 139 = task_thread_info(task)->ieee_state & IEEE_SW_MASK; 140 swcr = swcr_update_status(swcr, fpcr); 141 return fpcr | swcr; 142 } 143 return *get_reg_addr(task, regno); 144 } 145 146 /* 147 * Write contents of register REGNO in task TASK. 148 */ 149 static int 150 put_reg(struct task_struct *task, unsigned long regno, unsigned long data) 151 { 152 if (regno == 63) { 153 task_thread_info(task)->ieee_state 154 = ((task_thread_info(task)->ieee_state & ~IEEE_SW_MASK) 155 | (data & IEEE_SW_MASK)); 156 data = (data & FPCR_DYN_MASK) | ieee_swcr_to_fpcr(data); 157 } 158 *get_reg_addr(task, regno) = data; 159 return 0; 160 } 161 162 static inline int 163 read_int(struct task_struct *task, unsigned long addr, int * data) 164 { 165 int copied = access_process_vm(task, addr, data, sizeof(int), 166 FOLL_FORCE); 167 return (copied == sizeof(int)) ? 0 : -EIO; 168 } 169 170 static inline int 171 write_int(struct task_struct *task, unsigned long addr, int data) 172 { 173 int copied = access_process_vm(task, addr, &data, sizeof(int), 174 FOLL_FORCE | FOLL_WRITE); 175 return (copied == sizeof(int)) ? 0 : -EIO; 176 } 177 178 /* 179 * Set breakpoint. 180 */ 181 int 182 ptrace_set_bpt(struct task_struct * child) 183 { 184 int displ, i, res, reg_b, nsaved = 0; 185 unsigned int insn, op_code; 186 unsigned long pc; 187 188 pc = get_reg(child, REG_PC); 189 res = read_int(child, pc, (int *) &insn); 190 if (res < 0) 191 return res; 192 193 op_code = insn >> 26; 194 if (op_code >= 0x30) { 195 /* 196 * It's a branch: instead of trying to figure out 197 * whether the branch will be taken or not, we'll put 198 * a breakpoint at either location. This is simpler, 199 * more reliable, and probably not a whole lot slower 200 * than the alternative approach of emulating the 201 * branch (emulation can be tricky for fp branches). 202 */ 203 displ = ((s32)(insn << 11)) >> 9; 204 task_thread_info(child)->bpt_addr[nsaved++] = pc + 4; 205 if (displ) /* guard against unoptimized code */ 206 task_thread_info(child)->bpt_addr[nsaved++] 207 = pc + 4 + displ; 208 DBG(DBG_BPT, ("execing branch\n")); 209 } else if (op_code == 0x1a) { 210 reg_b = (insn >> 16) & 0x1f; 211 task_thread_info(child)->bpt_addr[nsaved++] = get_reg(child, reg_b); 212 DBG(DBG_BPT, ("execing jump\n")); 213 } else { 214 task_thread_info(child)->bpt_addr[nsaved++] = pc + 4; 215 DBG(DBG_BPT, ("execing normal insn\n")); 216 } 217 218 /* install breakpoints: */ 219 for (i = 0; i < nsaved; ++i) { 220 res = read_int(child, task_thread_info(child)->bpt_addr[i], 221 (int *) &insn); 222 if (res < 0) 223 return res; 224 task_thread_info(child)->bpt_insn[i] = insn; 225 DBG(DBG_BPT, (" -> next_pc=%lx\n", 226 task_thread_info(child)->bpt_addr[i])); 227 res = write_int(child, task_thread_info(child)->bpt_addr[i], 228 BREAKINST); 229 if (res < 0) 230 return res; 231 } 232 task_thread_info(child)->bpt_nsaved = nsaved; 233 return 0; 234 } 235 236 /* 237 * Ensure no single-step breakpoint is pending. Returns non-zero 238 * value if child was being single-stepped. 239 */ 240 int 241 ptrace_cancel_bpt(struct task_struct * child) 242 { 243 int i, nsaved = task_thread_info(child)->bpt_nsaved; 244 245 task_thread_info(child)->bpt_nsaved = 0; 246 247 if (nsaved > 2) { 248 printk("ptrace_cancel_bpt: bogus nsaved: %d!\n", nsaved); 249 nsaved = 2; 250 } 251 252 for (i = 0; i < nsaved; ++i) { 253 write_int(child, task_thread_info(child)->bpt_addr[i], 254 task_thread_info(child)->bpt_insn[i]); 255 } 256 return (nsaved != 0); 257 } 258 259 void user_enable_single_step(struct task_struct *child) 260 { 261 /* Mark single stepping. */ 262 task_thread_info(child)->bpt_nsaved = -1; 263 } 264 265 void user_disable_single_step(struct task_struct *child) 266 { 267 ptrace_cancel_bpt(child); 268 } 269 270 /* 271 * Called by kernel/ptrace.c when detaching.. 272 * 273 * Make sure the single step bit is not set. 274 */ 275 void ptrace_disable(struct task_struct *child) 276 { 277 user_disable_single_step(child); 278 } 279 280 long arch_ptrace(struct task_struct *child, long request, 281 unsigned long addr, unsigned long data) 282 { 283 unsigned long tmp; 284 size_t copied; 285 long ret; 286 287 switch (request) { 288 /* When I and D space are separate, these will need to be fixed. */ 289 case PTRACE_PEEKTEXT: /* read word at location addr. */ 290 case PTRACE_PEEKDATA: 291 copied = ptrace_access_vm(child, addr, &tmp, sizeof(tmp), 292 FOLL_FORCE); 293 ret = -EIO; 294 if (copied != sizeof(tmp)) 295 break; 296 297 force_successful_syscall_return(); 298 ret = tmp; 299 break; 300 301 /* Read register number ADDR. */ 302 case PTRACE_PEEKUSR: 303 force_successful_syscall_return(); 304 ret = get_reg(child, addr); 305 DBG(DBG_MEM, ("peek $%lu->%#lx\n", addr, ret)); 306 break; 307 308 /* When I and D space are separate, this will have to be fixed. */ 309 case PTRACE_POKETEXT: /* write the word at location addr. */ 310 case PTRACE_POKEDATA: 311 ret = generic_ptrace_pokedata(child, addr, data); 312 break; 313 314 case PTRACE_POKEUSR: /* write the specified register */ 315 DBG(DBG_MEM, ("poke $%lu<-%#lx\n", addr, data)); 316 ret = put_reg(child, addr, data); 317 break; 318 case PTRACE_GETREGSET: 319 case PTRACE_SETREGSET: { 320 struct iovec __user *uiov = (struct iovec __user *)data; 321 struct iovec iov; 322 struct pt_regs *regs; 323 size_t len; 324 325 /* Only support NT_PRSTATUS (general registers) for now. */ 326 if (addr != NT_PRSTATUS) { 327 ret = -EIO; 328 break; 329 } 330 331 if (copy_from_user(&iov, uiov, sizeof(iov))) { 332 ret = -EFAULT; 333 break; 334 } 335 336 regs = task_pt_regs(child); 337 len = min_t(size_t, iov.iov_len, sizeof(*regs)); 338 339 if (request == PTRACE_GETREGSET) { 340 if (copy_to_user(iov.iov_base, regs, len)) { 341 ret = -EFAULT; 342 break; 343 } 344 } else { 345 /* 346 * Allow writing back regs. This is needed by the TRACE_syscall 347 * tests (they change PC/syscall nr/retval). 348 */ 349 if (copy_from_user(regs, iov.iov_base, len)) { 350 ret = -EFAULT; 351 break; 352 } 353 } 354 355 /* Per API, update iov_len with amount transferred. */ 356 iov.iov_len = len; 357 if (copy_to_user(uiov, &iov, sizeof(iov))) { 358 ret = -EFAULT; 359 break; 360 } 361 362 ret = 0; 363 break; 364 } 365 366 default: 367 ret = ptrace_request(child, request, addr, data); 368 break; 369 } 370 return ret; 371 } 372 373 asmlinkage unsigned long syscall_trace_enter(void) 374 { 375 struct pt_regs *regs = current_pt_regs(); 376 377 if (test_thread_flag(TIF_SYSCALL_TRACE) && 378 ptrace_report_syscall_entry(regs)) { 379 syscall_set_nr(current, regs, -1); 380 if (regs->r19 == 0 && regs->r0 == (unsigned long)-1) 381 syscall_set_return_value(current, regs, -ENOSYS, 0); 382 return -1UL; 383 } 384 385 /* 386 * Do the secure computing after ptrace; failures should be fast. 387 * If this fails, seccomp may already have set up the return value 388 * (e.g. SECCOMP_RET_ERRNO / TRACE). 389 */ 390 if (secure_computing() == -1) { 391 if (regs->r19 == 0 && regs->r0 == (unsigned long)-1) 392 syscall_set_return_value(current, regs, -ENOSYS, 0); 393 syscall_set_nr(current, regs, -1); 394 return -1UL; 395 } 396 397 #ifdef CONFIG_AUDITSYSCALL 398 audit_syscall_entry(syscall_get_nr(current, regs), 399 regs->r16, regs->r17, regs->r18, regs->r19); 400 #endif 401 return syscall_get_nr(current, regs); 402 } 403 404 405 406 asmlinkage void 407 syscall_trace_leave(void) 408 { 409 audit_syscall_exit(current_pt_regs()); 410 if (test_thread_flag(TIF_SYSCALL_TRACE)) 411 ptrace_report_syscall_exit(current_pt_regs(), 0); 412 } 413