1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ALPHA_PGTABLE_H 3 #define _ALPHA_PGTABLE_H 4 5 #include <asm-generic/pgtable-nopud.h> 6 7 /* 8 * This file contains the functions and defines necessary to modify and use 9 * the Alpha page table tree. 10 * 11 * This hopefully works with any standard Alpha page-size, as defined 12 * in <asm/page.h> (currently 8192). 13 */ 14 #include <linux/mmzone.h> 15 16 #include <asm/page.h> 17 #include <asm/processor.h> /* For TASK_SIZE */ 18 #include <asm/machvec.h> 19 #include <asm/setup.h> 20 #include <linux/page_table_check.h> 21 22 struct mm_struct; 23 struct vm_area_struct; 24 25 /* Certain architectures need to do special things when PTEs 26 * within a page table are directly modified. Thus, the following 27 * hook is made available. 28 */ 29 #define set_pte(pteptr, pteval) ((*(pteptr)) = (pteval)) 30 31 /* PMD_SHIFT determines the size of the area a second-level page table can map */ 32 #define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-3)) 33 #define PMD_SIZE (1UL << PMD_SHIFT) 34 #define PMD_MASK (~(PMD_SIZE-1)) 35 36 /* PGDIR_SHIFT determines what a third-level page table entry can map */ 37 #define PGDIR_SHIFT (PAGE_SHIFT + 2*(PAGE_SHIFT-3)) 38 #define PGDIR_SIZE (1UL << PGDIR_SHIFT) 39 #define PGDIR_MASK (~(PGDIR_SIZE-1)) 40 41 /* 42 * Entries per page directory level: the Alpha is three-level, with 43 * all levels having a one-page page table. 44 */ 45 #define PTRS_PER_PTE (1UL << (PAGE_SHIFT-3)) 46 #define PTRS_PER_PMD (1UL << (PAGE_SHIFT-3)) 47 #define PTRS_PER_PGD (1UL << (PAGE_SHIFT-3)) 48 #define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE) 49 50 /* Number of pointers that fit on a page: this will go away. */ 51 #define PTRS_PER_PAGE (1UL << (PAGE_SHIFT-3)) 52 53 #ifdef CONFIG_ALPHA_LARGE_VMALLOC 54 #define VMALLOC_START 0xfffffe0000000000 55 #else 56 #define VMALLOC_START (-2*PGDIR_SIZE) 57 #endif 58 #define VMALLOC_END (-PGDIR_SIZE) 59 60 /* 61 * OSF/1 PAL-code-imposed page table bits 62 */ 63 #define _PAGE_VALID 0x0001 64 #define _PAGE_FOR 0x0002 /* used for page protection (fault on read) */ 65 #define _PAGE_FOW 0x0004 /* used for page protection (fault on write) */ 66 #define _PAGE_FOE 0x0008 /* used for page protection (fault on exec) */ 67 #define _PAGE_ASM 0x0010 68 #define _PAGE_KRE 0x0100 /* xxx - see below on the "accessed" bit */ 69 #define _PAGE_URE 0x0200 /* xxx */ 70 #define _PAGE_KWE 0x1000 /* used to do the dirty bit in software */ 71 #define _PAGE_UWE 0x2000 /* used to do the dirty bit in software */ 72 73 /* .. and these are ours ... */ 74 #define _PAGE_DIRTY 0x20000 75 #define _PAGE_ACCESSED 0x40000 76 #define _PAGE_SPECIAL 0x80000 77 78 /* We borrow bit 39 to store the exclusive marker in swap PTEs. */ 79 #define _PAGE_SWP_EXCLUSIVE 0x8000000000UL 80 81 /* 82 * NOTE! The "accessed" bit isn't necessarily exact: it can be kept exactly 83 * by software (use the KRE/URE/KWE/UWE bits appropriately), but I'll fake it. 84 * Under Linux/AXP, the "accessed" bit just means "read", and I'll just use 85 * the KRE/URE bits to watch for it. That way we don't need to overload the 86 * KWE/UWE bits with both handling dirty and accessed. 87 * 88 * Note that the kernel uses the accessed bit just to check whether to page 89 * out a page or not, so it doesn't have to be exact anyway. 90 */ 91 92 #define __DIRTY_BITS (_PAGE_DIRTY | _PAGE_KWE | _PAGE_UWE) 93 #define __ACCESS_BITS (_PAGE_ACCESSED | _PAGE_KRE | _PAGE_URE) 94 95 #define _PFN_MASK 0xFFFFFFFF00000000UL 96 97 #define _PAGE_TABLE (_PAGE_VALID | __DIRTY_BITS | __ACCESS_BITS) 98 #define _PAGE_CHG_MASK (_PFN_MASK | __DIRTY_BITS | __ACCESS_BITS | _PAGE_SPECIAL) 99 100 /* 101 * All the normal masks have the "page accessed" bits on, as any time they are used, 102 * the page is accessed. They are cleared only by the page-out routines 103 */ 104 #define PAGE_NONE __pgprot(_PAGE_VALID | __ACCESS_BITS | _PAGE_FOR | _PAGE_FOW | _PAGE_FOE) 105 #define PAGE_SHARED __pgprot(_PAGE_VALID | __ACCESS_BITS) 106 #define PAGE_COPY __pgprot(_PAGE_VALID | __ACCESS_BITS | _PAGE_FOW) 107 #define PAGE_READONLY __pgprot(_PAGE_VALID | __ACCESS_BITS | _PAGE_FOW) 108 #define PAGE_KERNEL __pgprot(_PAGE_VALID | _PAGE_ASM | _PAGE_KRE | _PAGE_KWE) 109 110 #define _PAGE_NORMAL(x) __pgprot(_PAGE_VALID | __ACCESS_BITS | (x)) 111 112 #define _PAGE_P(x) _PAGE_NORMAL((x) | _PAGE_FOW) 113 #define _PAGE_S(x) _PAGE_NORMAL(x) 114 115 /* 116 * The hardware can handle write-only mappings, but as the Alpha 117 * architecture does byte-wide writes with a read-modify-write 118 * sequence, it's not practical to have write-without-read privs. 119 * Thus the "-w- -> rw-" and "-wx -> rwx" mapping here (and in 120 * arch/alpha/mm/fault.c) 121 */ 122 /* xwr */ 123 124 /* 125 * pgprot_noncached() is only for infiniband pci support, and a real 126 * implementation for RAM would be more complicated. 127 */ 128 #define pgprot_noncached(prot) (prot) 129 130 /* 131 * All caching attribute macros are identity on Alpha, so the generic 132 * pgprot_modify() degenerates to tautological self-comparisons. 133 * Override it to just return newprot directly. 134 */ 135 #define pgprot_modify pgprot_modify 136 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) 137 { 138 return newprot; 139 } 140 141 /* 142 * On certain platforms whose physical address space can overlap KSEG, 143 * namely EV6 and above, we must re-twiddle the physaddr to restore the 144 * correct high-order bits. 145 * 146 * This is extremely confusing until you realize that this is actually 147 * just working around a userspace bug. The X server was intending to 148 * provide the physical address but instead provided the KSEG address. 149 * Or tried to, except it's not representable. 150 * 151 * On Tsunami there's nothing meaningful at 0x40000000000, so this is 152 * a safe thing to do. Come the first core logic that does put something 153 * in this area -- memory or whathaveyou -- then this hack will have 154 * to go away. So be prepared! 155 */ 156 157 #if defined(CONFIG_ALPHA_GENERIC) && defined(USE_48_BIT_KSEG) 158 #error "EV6-only feature in a generic kernel" 159 #endif 160 #if defined(CONFIG_ALPHA_GENERIC) || \ 161 (defined(CONFIG_ALPHA_EV6) && !defined(USE_48_BIT_KSEG)) 162 #define KSEG_PFN (0xc0000000000UL >> PAGE_SHIFT) 163 #define PHYS_TWIDDLE(pfn) \ 164 ((((pfn) & KSEG_PFN) == (0x40000000000UL >> PAGE_SHIFT)) \ 165 ? ((pfn) ^= KSEG_PFN) : (pfn)) 166 #else 167 #define PHYS_TWIDDLE(pfn) (pfn) 168 #endif 169 170 /* 171 * Conversion functions: convert a page and protection to a page entry, 172 * and a page entry and page directory to the page they refer to. 173 */ 174 #define page_to_pa(page) (page_to_pfn(page) << PAGE_SHIFT) 175 #define PFN_PTE_SHIFT 32 176 #define pte_pfn(pte) (pte_val(pte) >> PFN_PTE_SHIFT) 177 178 #define pte_page(pte) pfn_to_page(pte_pfn(pte)) 179 180 extern inline pte_t pfn_pte(unsigned long physpfn, pgprot_t pgprot) 181 { pte_t pte; pte_val(pte) = (PHYS_TWIDDLE(physpfn) << 32) | pgprot_val(pgprot); return pte; } 182 183 extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 184 { pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; } 185 186 extern inline void pmd_set(pmd_t * pmdp, pte_t * ptep) 187 { pmd_val(*pmdp) = _PAGE_TABLE | ((((unsigned long) ptep) - PAGE_OFFSET) << (32-PAGE_SHIFT)); } 188 189 extern inline void pud_set(pud_t * pudp, pmd_t * pmdp) 190 { pud_val(*pudp) = _PAGE_TABLE | ((((unsigned long) pmdp) - PAGE_OFFSET) << (32-PAGE_SHIFT)); } 191 192 193 extern void migrate_flush_tlb_page(struct vm_area_struct *vma, 194 unsigned long addr); 195 196 extern inline unsigned long 197 pmd_page_vaddr(pmd_t pmd) 198 { 199 return ((pmd_val(pmd) & _PFN_MASK) >> (32-PAGE_SHIFT)) + PAGE_OFFSET; 200 } 201 202 #define pmd_pfn(pmd) (pmd_val(pmd) >> 32) 203 #define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> 32)) 204 #define pud_page(pud) (pfn_to_page(pud_val(pud) >> 32)) 205 206 extern inline pmd_t *pud_pgtable(pud_t pgd) 207 { 208 return (pmd_t *)(PAGE_OFFSET + ((pud_val(pgd) & _PFN_MASK) >> (32-PAGE_SHIFT))); 209 } 210 211 extern inline int pte_none(pte_t pte) { return !pte_val(pte); } 212 extern inline int pte_present(pte_t pte) { return pte_val(pte) & _PAGE_VALID; } 213 extern inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 214 { 215 WRITE_ONCE(pte_val(*ptep), 0); 216 } 217 218 extern inline int pmd_none(pmd_t pmd) { return !pmd_val(pmd); } 219 extern inline int pmd_bad(pmd_t pmd) { return (pmd_val(pmd) & ~_PFN_MASK) != _PAGE_TABLE; } 220 extern inline int pmd_present(pmd_t pmd) { return pmd_val(pmd) & _PAGE_VALID; } 221 extern inline void pmd_clear(pmd_t * pmdp) { pmd_val(*pmdp) = 0; } 222 223 extern inline int pud_none(pud_t pud) { return !pud_val(pud); } 224 extern inline int pud_bad(pud_t pud) { return (pud_val(pud) & ~_PFN_MASK) != _PAGE_TABLE; } 225 extern inline int pud_present(pud_t pud) { return pud_val(pud) & _PAGE_VALID; } 226 extern inline void pud_clear(pud_t * pudp) { pud_val(*pudp) = 0; } 227 228 /* 229 * The following only work if pte_present() is true. 230 * Undefined behaviour if not.. 231 */ 232 extern inline int pte_write(pte_t pte) { return !(pte_val(pte) & _PAGE_FOW); } 233 extern inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; } 234 extern inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; } 235 extern inline int pte_user(pte_t pte) { return pte_val(pte) & _PAGE_URE; } 236 237 static inline bool pte_user_accessible_page(struct mm_struct *mm, 238 unsigned long addr, pte_t pte) 239 { 240 return pte_present(pte) && pte_user(pte); 241 } 242 243 static inline bool pmd_user_accessible_page(struct mm_struct *mm, 244 unsigned long addr, pmd_t pmd) 245 { 246 return false; 247 } 248 249 static inline bool pud_user_accessible_page(struct mm_struct *mm, 250 unsigned long addr, pud_t pud) 251 { 252 return false; 253 } 254 255 extern inline pte_t pte_wrprotect(pte_t pte) { pte_val(pte) |= _PAGE_FOW; return pte; } 256 extern inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~(__DIRTY_BITS); return pte; } 257 extern inline pte_t pte_mkold(pte_t pte) { pte_val(pte) &= ~(__ACCESS_BITS); return pte; } 258 extern inline pte_t pte_mkwrite_novma(pte_t pte){ pte_val(pte) &= ~_PAGE_FOW; return pte; } 259 extern inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) |= __DIRTY_BITS; return pte; } 260 extern inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= __ACCESS_BITS; return pte; } 261 extern inline int pte_special(pte_t pte) { return pte_val(pte) & _PAGE_SPECIAL; } 262 extern inline pte_t pte_mkspecial(pte_t pte) { pte_val(pte) |= _PAGE_SPECIAL; return pte; } 263 264 /* 265 * The smp_rmb() in the following functions are required to order the load of 266 * *dir (the pointer in the top level page table) with any subsequent load of 267 * the returned pmd_t *ret (ret is data dependent on *dir). 268 * 269 * If this ordering is not enforced, the CPU might load an older value of 270 * *ret, which may be uninitialized data. See mm/memory.c:__pte_alloc for 271 * more details. 272 * 273 * Note that we never change the mm->pgd pointer after the task is running, so 274 * pgd_offset does not require such a barrier. 275 */ 276 277 /* Find an entry in the second-level page table.. */ 278 extern inline pmd_t * pmd_offset(pud_t * dir, unsigned long address) 279 { 280 pmd_t *ret = pud_pgtable(*dir) + ((address >> PMD_SHIFT) & (PTRS_PER_PAGE - 1)); 281 smp_rmb(); /* see above */ 282 return ret; 283 } 284 #define pmd_offset pmd_offset 285 286 /* Find an entry in the third-level page table.. */ 287 extern inline pte_t * pte_offset_kernel(pmd_t * dir, unsigned long address) 288 { 289 pte_t *ret = (pte_t *) pmd_page_vaddr(*dir) 290 + ((address >> PAGE_SHIFT) & (PTRS_PER_PAGE - 1)); 291 smp_rmb(); /* see above */ 292 return ret; 293 } 294 #define pte_offset_kernel pte_offset_kernel 295 296 extern pgd_t swapper_pg_dir[1024]; 297 298 #ifdef CONFIG_COMPACTION 299 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR 300 301 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, 302 unsigned long address, 303 pte_t *ptep) 304 { 305 pte_t pte = READ_ONCE(*ptep); 306 307 pte_clear(mm, address, ptep); 308 return pte; 309 } 310 311 #define __HAVE_ARCH_PTEP_CLEAR_FLUSH 312 313 static inline pte_t ptep_clear_flush(struct vm_area_struct *vma, 314 unsigned long addr, pte_t *ptep) 315 { 316 struct mm_struct *mm = vma->vm_mm; 317 pte_t pte = ptep_get_and_clear(mm, addr, ptep); 318 319 page_table_check_pte_clear(mm, addr, pte); 320 migrate_flush_tlb_page(vma, addr); 321 return pte; 322 } 323 324 #endif 325 /* 326 * The Alpha doesn't have any external MMU info: the kernel page 327 * tables contain all the necessary information. 328 */ 329 extern inline void update_mmu_cache(struct vm_area_struct * vma, 330 unsigned long address, pte_t *ptep) 331 { 332 } 333 334 static inline void update_mmu_cache_range(struct vm_fault *vmf, 335 struct vm_area_struct *vma, unsigned long address, 336 pte_t *ptep, unsigned int nr) 337 { 338 } 339 340 /* 341 * Encode/decode swap entries and swap PTEs. Swap PTEs are all PTEs that 342 * are !pte_none() && !pte_present(). 343 * 344 * Format of swap PTEs: 345 * 346 * 6 6 6 6 5 5 5 5 5 5 5 5 5 5 4 4 4 4 4 4 4 4 4 4 3 3 3 3 3 3 3 3 347 * 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 348 * <------------------- offset ------------------> E <--- type --> 349 * 350 * 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 351 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 352 * <--------------------------- zeroes --------------------------> 353 * 354 * E is the exclusive marker that is not stored in swap entries. 355 */ 356 extern inline pte_t mk_swap_pte(unsigned long type, unsigned long offset) 357 { pte_t pte; pte_val(pte) = ((type & 0x7f) << 32) | (offset << 40); return pte; } 358 359 #define __swp_type(x) (((x).val >> 32) & 0x7f) 360 #define __swp_offset(x) ((x).val >> 40) 361 #define __swp_entry(type, off) ((swp_entry_t) { pte_val(mk_swap_pte((type), (off))) }) 362 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) 363 #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) 364 365 static inline bool pte_swp_exclusive(pte_t pte) 366 { 367 return pte_val(pte) & _PAGE_SWP_EXCLUSIVE; 368 } 369 370 static inline pte_t pte_swp_mkexclusive(pte_t pte) 371 { 372 pte_val(pte) |= _PAGE_SWP_EXCLUSIVE; 373 return pte; 374 } 375 376 static inline pte_t pte_swp_clear_exclusive(pte_t pte) 377 { 378 pte_val(pte) &= ~_PAGE_SWP_EXCLUSIVE; 379 return pte; 380 } 381 382 #define pte_ERROR(e) \ 383 printk("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e)) 384 #define pmd_ERROR(e) \ 385 printk("%s:%d: bad pmd %016lx.\n", __FILE__, __LINE__, pmd_val(e)) 386 #define pgd_ERROR(e) \ 387 printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e)) 388 389 extern void paging_init(void); 390 391 /* We have our own get_unmapped_area */ 392 #define HAVE_ARCH_UNMAPPED_AREA 393 394 #endif /* _ALPHA_PGTABLE_H */ 395