1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __ALPHA_PAL_H 3 #define __ALPHA_PAL_H 4 5 #include <uapi/asm/pal.h> 6 7 #ifndef __ASSEMBLY__ 8 9 extern void halt(void) __attribute__((noreturn)); 10 #define __halt() __asm__ __volatile__ ("call_pal %0 #halt" : : "i" (PAL_halt)) 11 12 #define imb() \ 13 __asm__ __volatile__ ("call_pal %0 #imb" : : "i" (PAL_imb) : "memory") 14 15 #define draina() \ 16 __asm__ __volatile__ ("call_pal %0 #draina" : : "i" (PAL_draina) : "memory") 17 18 #define __CALL_PAL_R0(NAME, TYPE) \ 19 extern inline TYPE NAME(void) \ 20 { \ 21 register TYPE __r0 __asm__("$0"); \ 22 __asm__ __volatile__( \ 23 "call_pal %1 # " #NAME \ 24 :"=r" (__r0) \ 25 :"i" (PAL_ ## NAME) \ 26 :"$1", "$16", "$22", "$23", "$24", "$25"); \ 27 return __r0; \ 28 } 29 30 #define __CALL_PAL_W1(NAME, TYPE0) \ 31 extern inline void NAME(TYPE0 arg0) \ 32 { \ 33 register TYPE0 __r16 __asm__("$16") = arg0; \ 34 __asm__ __volatile__( \ 35 "call_pal %1 # "#NAME \ 36 : "=r"(__r16) \ 37 : "i"(PAL_ ## NAME), "0"(__r16) \ 38 : "$1", "$22", "$23", "$24", "$25"); \ 39 } 40 41 #define __CALL_PAL_W2(NAME, TYPE0, TYPE1) \ 42 extern inline void NAME(TYPE0 arg0, TYPE1 arg1) \ 43 { \ 44 register TYPE0 __r16 __asm__("$16") = arg0; \ 45 register TYPE1 __r17 __asm__("$17") = arg1; \ 46 __asm__ __volatile__( \ 47 "call_pal %2 # "#NAME \ 48 : "=r"(__r16), "=r"(__r17) \ 49 : "i"(PAL_ ## NAME), "0"(__r16), "1"(__r17) \ 50 : "$1", "$22", "$23", "$24", "$25"); \ 51 } 52 53 #define __CALL_PAL_RW1(NAME, RTYPE, TYPE0) \ 54 extern inline RTYPE NAME(TYPE0 arg0) \ 55 { \ 56 register RTYPE __r0 __asm__("$0"); \ 57 register TYPE0 __r16 __asm__("$16") = arg0; \ 58 __asm__ __volatile__( \ 59 "call_pal %2 # "#NAME \ 60 : "=r"(__r16), "=r"(__r0) \ 61 : "i"(PAL_ ## NAME), "0"(__r16) \ 62 : "$1", "$22", "$23", "$24", "$25"); \ 63 return __r0; \ 64 } 65 66 #define __CALL_PAL_RW2(NAME, RTYPE, TYPE0, TYPE1) \ 67 extern inline RTYPE NAME(TYPE0 arg0, TYPE1 arg1) \ 68 { \ 69 register RTYPE __r0 __asm__("$0"); \ 70 register TYPE0 __r16 __asm__("$16") = arg0; \ 71 register TYPE1 __r17 __asm__("$17") = arg1; \ 72 __asm__ __volatile__( \ 73 "call_pal %3 # "#NAME \ 74 : "=r"(__r16), "=r"(__r17), "=r"(__r0) \ 75 : "i"(PAL_ ## NAME), "0"(__r16), "1"(__r17) \ 76 : "$1", "$22", "$23", "$24", "$25"); \ 77 return __r0; \ 78 } 79 80 __CALL_PAL_W1(cflush, unsigned long); 81 __CALL_PAL_R0(rdmces, unsigned long); 82 __CALL_PAL_R0(rdps, unsigned long); 83 __CALL_PAL_R0(rdusp, unsigned long); 84 __CALL_PAL_RW1(swpipl, unsigned long, unsigned long); 85 __CALL_PAL_R0(whami, unsigned long); 86 __CALL_PAL_W2(wrent, void*, unsigned long); 87 __CALL_PAL_W1(wripir, unsigned long); 88 __CALL_PAL_W1(wrkgp, unsigned long); 89 __CALL_PAL_W1(wrmces, unsigned long); 90 __CALL_PAL_RW2(wrperfmon, unsigned long, unsigned long, unsigned long); 91 __CALL_PAL_W1(wrusp, unsigned long); 92 __CALL_PAL_W1(wrvptptr, unsigned long); 93 __CALL_PAL_RW1(wtint, unsigned long, unsigned long); 94 95 /* 96 * TB routines.. 97 */ 98 #define __tbi(nr,arg,arg1...) \ 99 ({ \ 100 register unsigned long __r16 __asm__("$16") = (nr); \ 101 register unsigned long __r17 __asm__("$17"); arg; \ 102 __asm__ __volatile__( \ 103 "call_pal %3 #__tbi" \ 104 :"=r" (__r16),"=r" (__r17) \ 105 :"0" (__r16),"i" (PAL_tbi) ,##arg1 \ 106 :"$0", "$1", "$22", "$23", "$24", "$25"); \ 107 }) 108 109 #define tbi(x,y) __tbi(x,__r17=(y),"1" (__r17)) 110 #define tbisi(x) __tbi(1,__r17=(x),"1" (__r17)) 111 #define tbisd(x) __tbi(2,__r17=(x),"1" (__r17)) 112 #define tbis(x) __tbi(3,__r17=(x),"1" (__r17)) 113 #define tbiap() __tbi(-1, /* no second argument */) 114 #define tbia() __tbi(-2, /* no second argument */) 115 116 /* 117 * QEMU Cserv routines.. 118 */ 119 120 static inline unsigned long 121 qemu_get_walltime(void) 122 { 123 register unsigned long v0 __asm__("$0"); 124 register unsigned long a0 __asm__("$16") = 3; 125 126 asm("call_pal %2 # cserve get_time" 127 : "=r"(v0), "+r"(a0) 128 : "i"(PAL_cserve) 129 : "$17", "$18", "$19", "$20", "$21"); 130 131 return v0; 132 } 133 134 static inline unsigned long 135 qemu_get_alarm(void) 136 { 137 register unsigned long v0 __asm__("$0"); 138 register unsigned long a0 __asm__("$16") = 4; 139 140 asm("call_pal %2 # cserve get_alarm" 141 : "=r"(v0), "+r"(a0) 142 : "i"(PAL_cserve) 143 : "$17", "$18", "$19", "$20", "$21"); 144 145 return v0; 146 } 147 148 static inline void 149 qemu_set_alarm_rel(unsigned long expire) 150 { 151 register unsigned long a0 __asm__("$16") = 5; 152 register unsigned long a1 __asm__("$17") = expire; 153 154 asm volatile("call_pal %2 # cserve set_alarm_rel" 155 : "+r"(a0), "+r"(a1) 156 : "i"(PAL_cserve) 157 : "$0", "$18", "$19", "$20", "$21"); 158 } 159 160 static inline void 161 qemu_set_alarm_abs(unsigned long expire) 162 { 163 register unsigned long a0 __asm__("$16") = 6; 164 register unsigned long a1 __asm__("$17") = expire; 165 166 asm volatile("call_pal %2 # cserve set_alarm_abs" 167 : "+r"(a0), "+r"(a1) 168 : "i"(PAL_cserve) 169 : "$0", "$18", "$19", "$20", "$21"); 170 } 171 172 static inline unsigned long 173 qemu_get_vmtime(void) 174 { 175 register unsigned long v0 __asm__("$0"); 176 register unsigned long a0 __asm__("$16") = 7; 177 178 asm("call_pal %2 # cserve get_time" 179 : "=r"(v0), "+r"(a0) 180 : "i"(PAL_cserve) 181 : "$17", "$18", "$19", "$20", "$21"); 182 183 return v0; 184 } 185 186 #endif /* !__ASSEMBLY__ */ 187 #endif /* __ALPHA_PAL_H */ 188