1.. SPDX-License-Identifier: GPL-2.0 2 3====================== 4Generic vcpu interface 5====================== 6 7The virtual cpu "device" also accepts the ioctls KVM_SET_DEVICE_ATTR, 8KVM_GET_DEVICE_ATTR, and KVM_HAS_DEVICE_ATTR. The interface uses the same struct 9kvm_device_attr as other devices, but targets VCPU-wide settings and controls. 10 11The groups and attributes per virtual cpu, if any, are architecture specific. 12 131. GROUP: KVM_ARM_VCPU_PMU_V3_CTRL 14================================== 15 16:Architectures: ARM64 17 181.1. ATTRIBUTE: KVM_ARM_VCPU_PMU_V3_IRQ 19--------------------------------------- 20 21:Parameters: in kvm_device_attr.addr the address for PMU overflow interrupt is a 22 pointer to an int 23 24Returns: 25 26 ======= ======================================================== 27 -EBUSY The PMU overflow interrupt is already set 28 -ENXIO The overflow interrupt not set when attempting to get it 29 -ENODEV PMUv3 not supported 30 -EINVAL Invalid PMU overflow interrupt number supplied or 31 trying to set the IRQ number without using an in-kernel 32 irqchip. 33 ======= ======================================================== 34 35A value describing the PMUv3 (Performance Monitor Unit v3) overflow interrupt 36number for this vcpu. This interrupt could be a PPI or SPI, but the interrupt 37type must be same for each vcpu. As a PPI, the interrupt number is the same for 38all vcpus, while as an SPI it must be a separate number per vcpu. 39 401.2 ATTRIBUTE: KVM_ARM_VCPU_PMU_V3_INIT 41--------------------------------------- 42 43:Parameters: no additional parameter in kvm_device_attr.addr 44 45Returns: 46 47 ======= ====================================================== 48 -ENODEV PMUv3 not supported or GIC not initialized 49 -ENXIO PMUv3 not properly configured or in-kernel irqchip not 50 configured as required prior to calling this attribute 51 -EBUSY PMUv3 already initialized 52 ======= ====================================================== 53 54Request the initialization of the PMUv3. If using the PMUv3 with an in-kernel 55virtual GIC implementation, this must be done after initializing the in-kernel 56irqchip. 57 58 592. GROUP: KVM_ARM_VCPU_TIMER_CTRL 60================================= 61 62:Architectures: ARM, ARM64 63 642.1. ATTRIBUTES: KVM_ARM_VCPU_TIMER_IRQ_VTIMER, KVM_ARM_VCPU_TIMER_IRQ_PTIMER 65----------------------------------------------------------------------------- 66 67:Parameters: in kvm_device_attr.addr the address for the timer interrupt is a 68 pointer to an int 69 70Returns: 71 72 ======= ================================= 73 -EINVAL Invalid timer interrupt number 74 -EBUSY One or more VCPUs has already run 75 ======= ================================= 76 77A value describing the architected timer interrupt number when connected to an 78in-kernel virtual GIC. These must be a PPI (16 <= intid < 32). Setting the 79attribute overrides the default values (see below). 80 81============================= ========================================== 82KVM_ARM_VCPU_TIMER_IRQ_VTIMER The EL1 virtual timer intid (default: 27) 83KVM_ARM_VCPU_TIMER_IRQ_PTIMER The EL1 physical timer intid (default: 30) 84============================= ========================================== 85 86Setting the same PPI for different timers will prevent the VCPUs from running. 87Setting the interrupt number on a VCPU configures all VCPUs created at that 88time to use the number provided for a given timer, overwriting any previously 89configured values on other VCPUs. Userspace should configure the interrupt 90numbers on at least one VCPU after creating all VCPUs and before running any 91VCPUs. 92 933. GROUP: KVM_ARM_VCPU_PVTIME_CTRL 94================================== 95 96:Architectures: ARM64 97 983.1 ATTRIBUTE: KVM_ARM_VCPU_PVTIME_IPA 99-------------------------------------- 100 101:Parameters: 64-bit base address 102 103Returns: 104 105 ======= ====================================== 106 -ENXIO Stolen time not implemented 107 -EEXIST Base address already set for this VCPU 108 -EINVAL Base address not 64 byte aligned 109 ======= ====================================== 110 111Specifies the base address of the stolen time structure for this VCPU. The 112base address must be 64 byte aligned and exist within a valid guest memory 113region. See Documentation/virt/kvm/arm/pvtime.rst for more information 114including the layout of the stolen time structure. 115