xref: /linux/Documentation/scsi/aic7xxx.rst (revision 87c9c16317882dd6dbbc07e349bc3223e14f3244)
1.. SPDX-License-Identifier: GPL-2.0
2.. include:: <isonum.txt>
3
4========================================================
5Adaptec Aic7xxx Fast -> Ultra160 Family Manager Set v7.0
6========================================================
7
8README for The Linux Operating System
9
10The following information is available in this file:
11
12  1. Supported Hardware
13  2. Version History
14  3. Command Line Options
15  4. Contacting Adaptec
16
171. Supported Hardware
18=====================
19
20   The following Adaptec SCSI Chips and Host Adapters are supported by
21   the aic7xxx driver.
22
23   ======== ===== ========= ======== ========= ===== ===============
24   Chip     MIPS  Host Bus  MaxSync  MaxWidth  SCBs  Notes
25   ======== ===== ========= ======== ========= ===== ===============
26   aic7770  10    EISA/VL   10MHz    16Bit      4    1
27   aic7850  10    PCI/32    10MHz    8Bit       3
28   aic7855  10    PCI/32    10MHz    8Bit       3
29   aic7856  10    PCI/32    10MHz    8Bit       3
30   aic7859  10    PCI/32    20MHz    8Bit       3
31   aic7860  10    PCI/32    20MHz    8Bit       3
32   aic7870  10    PCI/32    10MHz    16Bit      16
33   aic7880  10    PCI/32    20MHz    16Bit      16
34   aic7890  20    PCI/32    40MHz    16Bit      16      3 4 5 6 7 8
35   aic7891  20    PCI/64    40MHz    16Bit      16      3 4 5 6 7 8
36   aic7892  20    PCI/64-66 80MHz    16Bit      16      3 4 5 6 7 8
37   aic7895  15    PCI/32    20MHz    16Bit      16    2 3 4 5
38   aic7895C 15    PCI/32    20MHz    16Bit      16    2 3 4 5     8
39   aic7896  20    PCI/32    40MHz    16Bit      16    2 3 4 5 6 7 8
40   aic7897  20    PCI/64    40MHz    16Bit      16    2 3 4 5 6 7 8
41   aic7899  20    PCI/64-66 80MHz    16Bit      16    2 3 4 5 6 7 8
42   ======== ===== ========= ======== ========= ===== ===============
43
44   1.   Multiplexed Twin Channel Device - One controller servicing two
45        busses.
46   2.   Multi-function Twin Channel Device - Two controllers on one chip.
47   3.   Command Channel Secondary DMA Engine - Allows scatter gather list
48        and SCB prefetch.
49   4.   64 Byte SCB Support - Allows disconnected, untagged request table
50        for all possible target/lun combinations.
51   5.   Block Move Instruction Support - Doubles the speed of certain
52        sequencer operations.
53   6.   'Bayonet' style Scatter Gather Engine - Improves S/G prefetch
54        performance.
55   7.   Queuing Registers - Allows queuing of new transactions without
56        pausing the sequencer.
57   8.   Multiple Target IDs - Allows the controller to respond to selection
58        as a target on multiple SCSI IDs.
59
60   ============== ======= =========== =============== =============== =========
61   Controller      Chip   Host-Bus    Int-Connectors  Ext-Connectors  Notes
62   ============== ======= =========== =============== =============== =========
63   AHA-274X[A]    aic7770   EISA         SE-50M         SE-HD50F
64   AHA-274X[A]W   aic7770   EISA         SE-HD68F       SE-HD68F
65                                         SE-50M
66   AHA-274X[A]T   aic7770   EISA       2 X SE-50M       SE-HD50F
67   AHA-2842       aic7770    VL          SE-50M         SE-HD50F
68   AHA-2940AU     aic7860   PCI/32       SE-50M         SE-HD50F
69   AVA-2902I      aic7860   PCI/32       SE-50M
70   AVA-2902E      aic7860   PCI/32       SE-50M
71   AVA-2906       aic7856   PCI/32       SE-50M         SE-DB25F
72   APC-7850       aic7850   PCI/32       SE-50M                       1
73   AVA-2940       aic7860   PCI/32       SE-50M
74   AHA-2920B      aic7860   PCI/32       SE-50M
75   AHA-2930B      aic7860   PCI/32       SE-50M
76   AHA-2920C      aic7856   PCI/32       SE-50M         SE-HD50F
77   AHA-2930C      aic7860   PCI/32       SE-50M
78   AHA-2930C      aic7860   PCI/32       SE-50M
79   AHA-2910C      aic7860   PCI/32       SE-50M
80   AHA-2915C      aic7860   PCI/32       SE-50M
81   AHA-2940AU/CN  aic7860   PCI/32       SE-50M         SE-HD50F
82   AHA-2944W      aic7870   PCI/32     HVD-HD68F        HVD-HD68F
83                                       HVD-50M
84   AHA-3940W      aic7870   PCI/32     2 X SE-HD68F     SE-HD68F        2
85   AHA-2940UW     aic7880   PCI/32       SE-HD68F
86                                         SE-50M         SE-HD68F
87   AHA-2940U      aic7880   PCI/32       SE-50M         SE-HD50F
88   AHA-2940D      aic7880   PCI/32
89   aHA-2940 A/T   aic7880   PCI/32
90   AHA-2940D A/T  aic7880   PCI/32
91   AHA-3940UW     aic7880   PCI/32     2 X SE-HD68F     SE-HD68F          3
92   AHA-3940UWD    aic7880   PCI/32     2 X SE-HD68F   2 X SE-VHD68F       3
93   AHA-3940U      aic7880   PCI/32     2 X SE-50M       SE-HD50F          3
94   AHA-2944UW     aic7880   PCI/32      HVD-HD68F       HVD-HD68F
95                                        HVD-50M
96   AHA-3944UWD    aic7880   PCI/32     2 X HVD-HD68F  2 X HVD-VHD68F      3
97   AHA-4944UW     aic7880   PCI/32
98   AHA-2930UW     aic7880   PCI/32
99   AHA-2940UW Pro aic7880   PCI/32      SE-HD68F        SE-HD68F            4
100                                        SE-50M
101   AHA-2940UW/CN  aic7880   PCI/32
102   AHA-2940UDual  aic7895   PCI/32
103   AHA-2940UWDual aic7895   PCI/32
104   AHA-3940UWD    aic7895   PCI/32
105   AHA-3940AUW    aic7895   PCI/32
106   AHA-3940AUWD   aic7895   PCI/32
107   AHA-3940AU     aic7895   PCI/32
108   AHA-3944AUWD   aic7895   PCI/32     2 X HVD-HD68F  2 X HVD-VHD68F
109   AHA-2940U2B    aic7890   PCI/32      LVD-HD68F       LVD-HD68F
110   AHA-2940U2 OEM aic7891   PCI/64
111   AHA-2940U2W    aic7890   PCI/32      LVD-HD68F       LVD-HD68F
112                                        SE-HD68F
113                                        SE-50M
114   AHA-2950U2B    aic7891   PCI/64      LVD-HD68F       LVD-HD68F
115   AHA-2930U2     aic7890   PCI/32      LVD-HD68F       SE-HD50F
116                                        SE-50M
117   AHA-3950U2B    aic7897   PCI/64
118   AHA-3950U2D    aic7897   PCI/64
119   AHA-29160      aic7892   PCI/64-66
120   AHA-29160 CPQ  aic7892   PCI/64-66
121   AHA-29160N     aic7892   PCI/32      LVD-HD68F       SE-HD50F
122                                        SE-50M
123   AHA-29160LP    aic7892   PCI/64-66
124   AHA-19160      aic7892   PCI/64-66
125   AHA-29150LP    aic7892   PCI/64-66
126   AHA-29130LP    aic7892   PCI/64-66
127   AHA-3960D      aic7899   PCI/64-66  2 X LVD-HD68F  2 X LVD-VHD68F
128                                       LVD-50M
129   AHA-3960D CPQ  aic7899   PCI/64-66  2 X LVD-HD68F  2 X LVD-VHD68F
130                                       LVD-50M
131   AHA-39160      aic7899   PCI/64-66  2 X LVD-HD68F  2 X LVD-VHD68F
132                                       LVD-50M
133   ============== ======= =========== =============== =============== =========
134
135   1. No BIOS support
136   2. DEC21050 PCI-PCI bridge with multiple controller chips on secondary bus
137   3. DEC2115X PCI-PCI bridge with multiple controller chips on secondary bus
138   4. All three SCSI connectors may be used simultaneously without
139      SCSI "stub" effects.
140
1412. Version History
142==================
143
144   * 7.0	  (4th August, 2005)
145	- Updated driver to use SCSI transport class infrastructure
146	- Upported sequencer and core fixes from last adaptec released
147	  version of the driver.
148
149   * 6.2.36 (June 3rd, 2003)
150        - Correct code that disables PCI parity error checking.
151        - Correct and simplify handling of the ignore wide residue
152          message.  The previous code would fail to report a residual
153          if the transaction data length was even and we received
154          an IWR message.
155        - Add support for the 2.5.X EISA framework.
156        - Update for change in 2.5.X SCSI proc FS interface.
157        - Correct Domain Validation command-line option parsing.
158        - When negotiation async via an 8bit WDTR message, send
159          an SDTR with an offset of 0 to be sure the target
160          knows we are async.  This works around a firmware defect
161          in the Quantum Atlas 10K.
162        - Clear PCI error state during driver attach so that we
163          don't disable memory mapped I/O due to a stray write
164          by some other driver probe that occurred before we
165          claimed the controller.
166
167   * 6.2.35 (May 14th, 2003)
168        - Fix a few GCC 3.3 compiler warnings.
169        - Correct operation on EISA Twin Channel controller.
170        - Add support for 2.5.X's scsi_report_device_reset().
171
172   * 6.2.34 (May 5th, 2003)
173        - Fix locking regression introduced in 6.2.29 that
174          could cause a lock order reversal between the io_request_lock
175          and our per-softc lock.  This was only possible on RH9,
176          SuSE, and kernel.org 2.4.X kernels.
177
178   * 6.2.33 (April 30th, 2003)
179        - Dynamically disable PCI parity error reporting after
180          10 errors are reported to the user.  These errors are
181          the result of some other device issuing PCI transactions
182          with bad parity.  Once the user has been informed of the
183          problem, continuing to report the errors just degrades
184          our performance.
185
186   * 6.2.32 (March 28th, 2003)
187        - Dynamically sized S/G lists to avoid SCSI malloc
188          pool fragmentation and SCSI mid-layer deadlock.
189
190   * 6.2.28 (January 20th, 2003)
191        - Domain Validation Fixes
192        - Add ability to disable PCI parity error checking.
193        - Enhanced Memory Mapped I/O probe
194
195   * 6.2.20 (November 7th, 2002)
196        - Added Domain Validation.
197
1983. Command Line Options
199=======================
200
201
202    .. Warning::
203
204                 ALTERING OR ADDING THESE DRIVER PARAMETERS
205                 INCORRECTLY CAN RENDER YOUR SYSTEM INOPERABLE.
206                 USE THEM WITH CAUTION.
207
208   Put a .conf file in the /etc/modprobe.d directory and add/edit a
209   line containing ``options aic7xxx aic7xxx=[command[,command...]]`` where
210   ``command`` is one or more of the following:
211
212verbose
213
214    :Definition: enable additional informative messages during driver operation.
215    :Possible Values: This option is a flag
216    :Default Value: disabled
217
218
219debug:[value]
220
221    :Definition: Enables various levels of debugging information
222    :Possible Values: 0x0000 = no debugging, 0xffff = full debugging
223    :Default Value: 0x0000
224
225no_probe
226
227probe_eisa_vl
228
229    :Definition: Do not probe for EISA/VLB controllers.
230		 This is a toggle.  If the driver is compiled
231		 to not probe EISA/VLB controllers by default,
232		 specifying "no_probe" will enable this probing.
233		 If the driver is compiled to probe EISA/VLB
234		 controllers by default, specifying "no_probe"
235		 will disable this probing.
236
237    :Possible Values: This option is a toggle
238    :Default Value: EISA/VLB probing is disabled by default.
239
240pci_parity
241
242    :Definition: Toggles the detection of PCI parity errors.
243		 On many motherboards with VIA chipsets,
244		 PCI parity is not generated correctly on the
245		 PCI bus.  It is impossible for the hardware to
246		 differentiate between these "spurious" parity
247		 errors and real parity errors.  The symptom of
248		 this problem is a stream of the message::
249
250		    "scsi0:	Data Parity Error Detected during address or write data phase"
251
252		 output by the driver.
253
254    :Possible Values: This option is a toggle
255    :Default Value: PCI Parity Error reporting is disabled
256
257no_reset
258
259    :Definition: Do not reset the bus during the initial probe
260		 phase
261
262    :Possible Values: This option is a flag
263    :Default Value: disabled
264
265extended
266
267    :Definition: Force extended translation on the controller
268    :Possible Values: This option is a flag
269    :Default Value: disabled
270
271periodic_otag
272
273    :Definition: Send an ordered tag periodically to prevent
274		 tag starvation.  Needed for some older devices
275
276    :Possible Values: This option is a flag
277    :Default Value: disabled
278
279reverse_scan
280
281    :Definition: Probe the scsi bus in reverse order, starting
282		with target 15
283
284    :Possible Values: This option is a flag
285    :Default Value: disabled
286
287global_tag_depth:[value]
288
289    :Definition: Global tag depth for all targets on all busses.
290		 This option sets the default tag depth which
291		 may be selectively overridden vi the tag_info
292		 option.
293
294    :Possible Values: 1 - 253
295    :Default Value: 32
296
297tag_info:{{value[,value...]}[,{value[,value...]}...]}
298
299    :Definition: Set the per-target tagged queue depth on a
300		 per controller basis.  Both controllers and targets
301		 may be omitted indicating that they should retain
302		 the default tag depth.
303
304    :Possible Values: 1 - 253
305    :Default Value: 32
306
307    Examples:
308
309	    ::
310
311	        tag_info:{{16,32,32,64,8,8,,32,32,32,32,32,32,32,32,32}
312
313	    On Controller 0:
314
315		- specifies a tag depth of 16 for target 0
316		- specifies a tag depth of 64 for target 3
317		- specifies a tag depth of 8 for targets 4 and 5
318		- leaves target 6 at the default
319		- specifies a tag depth of 32 for targets 1,2,7-15
320		- All other targets retain the default depth.
321
322	    ::
323
324                tag_info:{{},{32,,32}}
325
326	    On Controller 1:
327
328		- specifies a tag depth of 32 for targets 0 and 2
329		- All other targets retain the default depth.
330
331seltime:[value]
332
333    :Definition: Specifies the selection timeout value
334    :Possible Values: 0 = 256ms, 1 = 128ms, 2 = 64ms, 3 = 32ms
335    :Default Value: 0
336
337dv: {value[,value...]}
338
339    :Definition: Set Domain Validation Policy on a per-controller basis.
340		 Controllers may be omitted indicating that
341		 they should retain the default read streaming setting.
342
343    :Possible Values:
344
345		      ==== ===============================
346		       < 0 Use setting from serial EEPROM.
347                         0 Disable DV
348		       > 0 Enable DV
349		      ==== ===============================
350
351
352    :Default Value: SCSI-Select setting on controllers with a SCSI Select
353		    option for DV.  Otherwise, on for controllers supporting
354		    U160 speeds and off for all other controller types.
355
356    Example:
357
358	    ::
359
360		dv:{-1,0,,1,1,0}
361
362	   - On Controller 0 leave DV at its default setting.
363	   - On Controller 1 disable DV.
364	   - Skip configuration on Controller 2.
365	   - On Controllers 3 and 4 enable DV.
366	   - On Controller 5 disable DV.
367
368Example::
369
370    options aic7xxx aic7xxx=verbose,no_probe,tag_info:{{},{,,10}},seltime:1
371
372enables verbose logging, Disable EISA/VLB probing,
373and set tag depth on Controller 1/Target 2 to 10 tags.
374
3754. Adaptec Customer Support
376===========================
377
378   A Technical Support Identification (TSID) Number is required for
379   Adaptec technical support.
380
381    - The 12-digit TSID can be found on the white barcode-type label
382      included inside the box with your product.  The TSID helps us
383      provide more efficient service by accurately identifying your
384      product and support status.
385
386   Support Options
387    - Search the Adaptec Support Knowledgebase (ASK) at
388      http://ask.adaptec.com for articles, troubleshooting tips, and
389      frequently asked questions about your product.
390    - For support via Email, submit your question to Adaptec's
391      Technical Support Specialists at http://ask.adaptec.com/.
392
393   North America
394    - Visit our Web site at http://www.adaptec.com/.
395    - For information about Adaptec's support options, call
396      408-957-2550, 24 hours a day, 7 days a week.
397    - To speak with a Technical Support Specialist,
398
399      * For hardware products, call 408-934-7274,
400        Monday to Friday, 3:00 am to 5:00 pm, PDT.
401      * For RAID and Fibre Channel products, call 321-207-2000,
402        Monday to Friday, 3:00 am to 5:00 pm, PDT.
403
404      To expedite your service, have your computer with you.
405    - To order Adaptec products, including accessories and cables,
406      call 408-957-7274.  To order cables online go to
407      http://www.adaptec.com/buy-cables/.
408
409   Europe
410    - Visit our Web site at http://www.adaptec.com/en-US/_common/world_index.
411    - To speak with a Technical Support Specialist, call, or email,
412
413      * German:  +49 89 4366 5522, Monday-Friday, 9:00-17:00 CET,
414        http://ask-de.adaptec.com/.
415      * French:  +49 89 4366 5533, Monday-Friday, 9:00-17:00 CET,
416	http://ask-fr.adaptec.com/.
417      * English: +49 89 4366 5544, Monday-Friday, 9:00-17:00 GMT,
418	http://ask.adaptec.com/.
419
420    - You can order Adaptec cables online at
421      http://www.adaptec.com/buy-cables/.
422
423   Japan
424    - Visit our web site at http://www.adaptec.co.jp/.
425    - To speak with a Technical Support Specialist, call
426      +81 3 5308 6120, Monday-Friday, 9:00 a.m. to 12:00 p.m.,
427      1:00 p.m. to 6:00 p.m.
428
429Copyright |copy| 2003 Adaptec Inc. 691 S. Milpitas Blvd., Milpitas CA 95035 USA.
430
431All rights reserved.
432
433You are permitted to redistribute, use and modify this README file in whole
434or in part in conjunction with redistribution of software governed by the
435General Public License, provided that the following conditions are met:
436
4371. Redistributions of README file must retain the above copyright
438   notice, this list of conditions, and the following disclaimer,
439   without modification.
4402. The name of the author may not be used to endorse or promote products
441   derived from this software without specific prior written permission.
4423. Modifications or new contributions must be attributed in a copyright
443   notice identifying the author ("Contributor") and added below the
444   original copyright notice. The copyright notice is for purposes of
445   identifying contributors and should not be deemed as permission to alter
446   the permissions given by Adaptec.
447
448THIS README FILE IS PROVIDED BY ADAPTEC AND CONTRIBUTORS ``AS IS`` AND
449ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ANY
450WARRANTIES OF NON-INFRINGEMENT OR THE IMPLIED WARRANTIES OF MERCHANTABILITY
451AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
452ADAPTEC OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
453SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
454TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
455PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
456LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
457NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS README
458FILE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
459