1*a14d11a0SAndrea Parri.. SPDX-License-Identifier: GPL-2.0 2*a14d11a0SAndrea Parri 3*a14d11a0SAndrea Parri======================== 4*a14d11a0SAndrea Parrimembarrier() System Call 5*a14d11a0SAndrea Parri======================== 6*a14d11a0SAndrea Parri 7*a14d11a0SAndrea ParriMEMBARRIER_CMD_{PRIVATE,GLOBAL}_EXPEDITED - Architecture requirements 8*a14d11a0SAndrea Parri===================================================================== 9*a14d11a0SAndrea Parri 10*a14d11a0SAndrea ParriMemory barriers before updating rq->curr 11*a14d11a0SAndrea Parri---------------------------------------- 12*a14d11a0SAndrea Parri 13*a14d11a0SAndrea ParriThe commands MEMBARRIER_CMD_PRIVATE_EXPEDITED and MEMBARRIER_CMD_GLOBAL_EXPEDITED 14*a14d11a0SAndrea Parrirequire each architecture to have a full memory barrier after coming from 15*a14d11a0SAndrea Parriuser-space, before updating rq->curr. This barrier is implied by the sequence 16*a14d11a0SAndrea Parrirq_lock(); smp_mb__after_spinlock() in __schedule(). The barrier matches a full 17*a14d11a0SAndrea Parribarrier in the proximity of the membarrier system call exit, cf. 18*a14d11a0SAndrea Parrimembarrier_{private,global}_expedited(). 19*a14d11a0SAndrea Parri 20*a14d11a0SAndrea ParriMemory barriers after updating rq->curr 21*a14d11a0SAndrea Parri--------------------------------------- 22*a14d11a0SAndrea Parri 23*a14d11a0SAndrea ParriThe commands MEMBARRIER_CMD_PRIVATE_EXPEDITED and MEMBARRIER_CMD_GLOBAL_EXPEDITED 24*a14d11a0SAndrea Parrirequire each architecture to have a full memory barrier after updating rq->curr, 25*a14d11a0SAndrea Parribefore returning to user-space. The schemes providing this barrier on the various 26*a14d11a0SAndrea Parriarchitectures are as follows. 27*a14d11a0SAndrea Parri 28*a14d11a0SAndrea Parri - alpha, arc, arm, hexagon, mips rely on the full barrier implied by 29*a14d11a0SAndrea Parri spin_unlock() in finish_lock_switch(). 30*a14d11a0SAndrea Parri 31*a14d11a0SAndrea Parri - arm64 relies on the full barrier implied by switch_to(). 32*a14d11a0SAndrea Parri 33*a14d11a0SAndrea Parri - powerpc, riscv, s390, sparc, x86 rely on the full barrier implied by 34*a14d11a0SAndrea Parri switch_mm(), if mm is not NULL; they rely on the full barrier implied 35*a14d11a0SAndrea Parri by mmdrop(), otherwise. On powerpc and riscv, switch_mm() relies on 36*a14d11a0SAndrea Parri membarrier_arch_switch_mm(). 37*a14d11a0SAndrea Parri 38*a14d11a0SAndrea ParriThe barrier matches a full barrier in the proximity of the membarrier system call 39*a14d11a0SAndrea Parrientry, cf. membarrier_{private,global}_expedited(). 40