xref: /linux/Documentation/networking/pse-pd/pse-pi.rst (revision 249ebf3f65f8530beb2cbfb91bff1d83ba88d23c)
1.. SPDX-License-Identifier: GPL-2.0
2
3PSE Power Interface (PSE PI) Documentation
4==========================================
5
6The Power Sourcing Equipment Power Interface (PSE PI) plays a pivotal role in
7the architecture of Power over Ethernet (PoE) systems. It is essentially a
8blueprint that outlines how one or multiple power sources are connected to the
9eight-pin modular jack, commonly known as the Ethernet RJ45 port. This
10connection scheme is crucial for enabling the delivery of power alongside data
11over Ethernet cables.
12
13Documentation and Standards
14---------------------------
15
16The IEEE 802.3 standard provides detailed documentation on the PSE PI.
17Specifically:
18
19- Section "33.2.3 PI pin assignments" covers the pin assignments for PoE
20  systems that utilize two pairs for power delivery.
21- Section "145.2.4 PSE PI" addresses the configuration for PoE systems that
22  deliver power over all four pairs of an Ethernet cable.
23
24PSE PI and Single Pair Ethernet
25-------------------------------
26
27Single Pair Ethernet (SPE) represents a different approach to Ethernet
28connectivity, utilizing just one pair of conductors for both data and power
29transmission. Unlike the configurations detailed in the PSE PI for standard
30Ethernet, which can involve multiple power sourcing arrangements across four or
31two pairs of wires, SPE operates on a simpler model due to its single-pair
32design. As a result, the complexities of choosing between alternative pin
33assignments for power delivery, as described in the PSE PI for multi-pair
34Ethernet, are not applicable to SPE.
35
36Understanding PSE PI
37--------------------
38
39The Power Sourcing Equipment Power Interface (PSE PI) is a framework defining
40how Power Sourcing Equipment (PSE) delivers power to Powered Devices (PDs) over
41Ethernet cables. It details two main configurations for power delivery, known
42as Alternative A and Alternative B, which are distinguished not only by their
43method of power transmission but also by the implications for polarity and data
44transmission direction.
45
46Alternative A and B Overview
47----------------------------
48
49- **Alternative A:** Utilizes RJ45 conductors 1, 2, 3 and 6. In either case of
50  networks 10/100BaseT or 1G/2G/5G/10GBaseT, the pairs used are carrying data.
51  The power delivery's polarity in this alternative can vary based on the MDI
52  (Medium Dependent Interface) or MDI-X (Medium Dependent Interface Crossover)
53  configuration.
54
55- **Alternative B:** Utilizes RJ45 conductors 4, 5, 7 and 8. In case of
56  10/100BaseT network the pairs used are spare pairs without data and are less
57  influenced by data transmission direction. This is not the case for
58  1G/2G/5G/10GBaseT network. Alternative B includes two configurations with
59  different polarities, known as variant X and variant S, to accommodate
60  different network requirements and device specifications.
61
62Table 145-3 PSE Pinout Alternatives
63-----------------------------------
64
65The following table outlines the pin configurations for both Alternative A and
66Alternative B.
67
68+------------+-------------------+-----------------+-----------------+-----------------+
69| Conductor  | Alternative A     | Alternative A   | Alternative B   | Alternative B   |
70|            |    (MDI-X)        |      (MDI)      |        (X)      |        (S)      |
71+============+===================+=================+=================+=================+
72| 1          | Negative V        | Positive V      | -               | -               |
73+------------+-------------------+-----------------+-----------------+-----------------+
74| 2          | Negative V        | Positive V      | -               | -               |
75+------------+-------------------+-----------------+-----------------+-----------------+
76| 3          | Positive V        | Negative V      | -               | -               |
77+------------+-------------------+-----------------+-----------------+-----------------+
78| 4          | -                 | -               | Negative V      | Positive V      |
79+------------+-------------------+-----------------+-----------------+-----------------+
80| 5          | -                 | -               | Negative V      | Positive V      |
81+------------+-------------------+-----------------+-----------------+-----------------+
82| 6          | Positive V        | Negative V      | -               | -               |
83+------------+-------------------+-----------------+-----------------+-----------------+
84| 7          | -                 | -               | Positive V      | Negative V      |
85+------------+-------------------+-----------------+-----------------+-----------------+
86| 8          | -                 | -               | Positive V      | Negative V      |
87+------------+-------------------+-----------------+-----------------+-----------------+
88
89.. note::
90    - "Positive V" and "Negative V" indicate the voltage polarity for each pin.
91    - "-" indicates that the pin is not used for power delivery in that
92      specific configuration.
93
94PSE PI compatibilities
95----------------------
96
97The following table outlines the compatibility between the pinout alternative
98and the 1000/2.5G/5G/10GBaseT in the PSE 2 pairs connection.
99
100+---------+---------------+---------------------+-----------------------+
101| Variant | Alternative   | Power Feeding Type  | Compatibility with    |
102|         | (A/B)         | (Direct/Phantom)    | 1000/2.5G/5G/10GBaseT |
103+=========+===============+=====================+=======================+
104| 1       | A             | Phantom             | Yes                   |
105+---------+---------------+---------------------+-----------------------+
106| 2       | B             | Phantom             | Yes                   |
107+---------+---------------+---------------------+-----------------------+
108| 3       | B             | Direct              | No                    |
109+---------+---------------+---------------------+-----------------------+
110
111.. note::
112    - "Direct" indicate a variant where the power is injected directly to pairs
113       without using magnetics in case of spare pairs.
114    - "Phantom" indicate power path over coils/magnetics as it is done for
115       Alternative A variant.
116
117In case of PSE 4 pairs, a PSE supporting only 10/100BaseT (which mean Direct
118Power on pinout Alternative B) is not compatible with a 4 pairs
1191000/2.5G/5G/10GBaseT.
120
121PSE Power Interface (PSE PI) Connection Diagram
122-----------------------------------------------
123
124The diagram below illustrates the connection architecture between the RJ45
125port, the Ethernet PHY (Physical Layer), and the PSE PI (Power Sourcing
126Equipment Power Interface), demonstrating how power and data are delivered
127simultaneously through an Ethernet cable. The RJ45 port serves as the physical
128interface for these connections, with each of its eight pins connected to both
129the Ethernet PHY for data transmission and the PSE PI for power delivery.
130
131.. code-block::
132
133    +--------------------------+
134    |                          |
135    |          RJ45 Port       |
136    |                          |
137    +--+--+--+--+--+--+--+--+--+                +-------------+
138      1| 2| 3| 4| 5| 6| 7| 8|                   |             |
139       |  |  |  |  |  |  |  o-------------------+             |
140       |  |  |  |  |  |  o--|-------------------+             +<--- PSE 1
141       |  |  |  |  |  o--|--|-------------------+             |
142       |  |  |  |  o--|--|--|-------------------+             |
143       |  |  |  o--|--|--|--|-------------------+  PSE PI     |
144       |  |  o--|--|--|--|--|-------------------+             |
145       |  o--|--|--|--|--|--|-------------------+             +<--- PSE 2 (optional)
146       o--|--|--|--|--|--|--|-------------------+             |
147       |  |  |  |  |  |  |  |                   |             |
148    +--+--+--+--+--+--+--+--+--+                +-------------+
149    |                          |
150    |       Ethernet PHY       |
151    |                          |
152    +--------------------------+
153
154Simple PSE PI Configuration for Alternative A
155---------------------------------------------
156
157The diagram below illustrates a straightforward PSE PI (Power Sourcing
158Equipment Power Interface) configuration designed to support the Alternative A
159setup for Power over Ethernet (PoE). This implementation is tailored to provide
160power delivery through the data-carrying pairs of an Ethernet cable, suitable
161for either MDI or MDI-X configurations, albeit supporting one variation at a
162time.
163
164.. code-block::
165
166         +-------------+
167         |    PSE PI   |
168 8  -----+                             +-------------+
169 7  -----+                    Rail 1   |
170 6  -----+------+----------------------+
171 5  -----+      |                      |
172 4  -----+      |             Rail 2   |  PSE 1
173 3  -----+------/         +------------+
174 2  -----+--+-------------/            |
175 1  -----+--/                          +-------------+
176         |
177         +-------------+
178
179In this configuration:
180
181- Pins 1 and 2, as well as pins 3 and 6, are utilized for power delivery in
182  addition to data transmission. This aligns with the standard wiring for
183  10/100BaseT Ethernet networks where these pairs are used for data.
184- Rail 1 and Rail 2 represent the positive and negative voltage rails, with
185  Rail 1 connected to pins 1 and 2, and Rail 2 connected to pins 3 and 6.
186  More advanced PSE PI configurations may include integrated or external
187  switches to change the polarity of the voltage rails, allowing for
188  compatibility with both MDI and MDI-X configurations.
189
190More complex PSE PI configurations may include additional components, to support
191Alternative B, or to provide additional features such as power management, or
192additional power delivery capabilities such as 2-pair or 4-pair power delivery.
193
194.. code-block::
195
196         +-------------+
197         |    PSE PI   |
198         |        +---+
199 8  -----+--------+   |                 +-------------+
200 7  -----+--------+   |       Rail 1   |
201 6  -----+--------+   +-----------------+
202 5  -----+--------+   |                |
203 4  -----+--------+   |       Rail 2   |  PSE 1
204 3  -----+--------+   +----------------+
205 2  -----+--------+   |                |
206 1  -----+--------+   |                 +-------------+
207         |        +---+
208         +-------------+
209
210Device Tree Configuration: Describing PSE PI Configurations
211-----------------------------------------------------------
212
213The necessity for a separate PSE PI node in the device tree is influenced by
214the intricacy of the Power over Ethernet (PoE) system's setup. Here are
215descriptions of both simple and complex PSE PI configurations to illustrate
216this decision-making process:
217
218**Simple PSE PI Configuration:**
219In a straightforward scenario, the PSE PI setup involves a direct, one-to-one
220connection between a single PSE controller and an Ethernet port. This setup
221typically supports basic PoE functionality without the need for dynamic
222configuration or management of multiple power delivery modes. For such simple
223configurations, detailing the PSE PI within the existing PSE controller's node
224may suffice, as the system does not encompass additional complexity that
225warrants a separate node. The primary focus here is on the clear and direct
226association of power delivery to a specific Ethernet port.
227
228**Complex PSE PI Configuration:**
229Contrastingly, a complex PSE PI setup may encompass multiple PSE controllers or
230auxiliary circuits that collectively manage power delivery to one Ethernet
231port. Such configurations might support a range of PoE standards and require
232the capability to dynamically configure power delivery based on the operational
233mode (e.g., PoE2 versus PoE4) or specific requirements of connected devices. In
234these instances, a dedicated PSE PI node becomes essential for accurately
235documenting the system architecture. This node would serve to detail the
236interactions between different PSE controllers, the support for various PoE
237modes, and any additional logic required to coordinate power delivery across
238the network infrastructure.
239
240**Guidance:**
241
242For simple PSE setups, including PSE PI information in the PSE controller node
243might suffice due to the straightforward nature of these systems. However,
244complex configurations, involving multiple components or advanced PoE features,
245benefit from a dedicated PSE PI node. This method adheres to IEEE 802.3
246specifications, improving documentation clarity and ensuring accurate
247representation of the PoE system's complexity.
248
249PSE PI Node: Essential Information
250----------------------------------
251
252The PSE PI (Power Sourcing Equipment Power Interface) node in a device tree can
253include several key pieces of information critical for defining the power
254delivery capabilities and configurations of a PoE (Power over Ethernet) system.
255Below is a list of such information, along with explanations for their
256necessity and reasons why they might not be found within a PSE controller node:
257
2581. **Powered Pairs Configuration**
259
260   - *Description:* Identifies the pairs used for power delivery in the
261     Ethernet cable.
262   - *Necessity:* Essential to ensure the correct pairs are powered according
263     to the board's design.
264   - *PSE Controller Node:* Typically lacks details on physical pair usage,
265     focusing on power regulation.
266
2672. **Polarity of Powered Pairs**
268
269   - *Description:* Specifies the polarity (positive or negative) for each
270     powered pair.
271   - *Necessity:* Critical for safe and effective power transmission to PDs.
272   - *PSE Controller Node:* Polarity management may exceed the standard
273     functionalities of PSE controllers.
274
2753. **PSE Cells Association**
276
277   - *Description:* Details the association of PSE cells with Ethernet ports or
278     pairs in multi-cell configurations.
279   - *Necessity:* Allows for optimized power resource allocation in complex
280     systems.
281   - *PSE Controller Node:* Controllers may not manage cell associations
282     directly, focusing instead on power flow regulation.
283
2844. **Support for PoE Standards**
285
286   - *Description:* Lists the PoE standards and configurations supported by the
287     system.
288   - *Necessity:* Ensures system compatibility with various PDs and adherence
289     to industry standards.
290   - *PSE Controller Node:* Specific capabilities may depend on the overall PSE
291     PI design rather than the controller alone. Multiple PSE cells per PI
292     do not necessarily imply support for multiple PoE standards.
293
2945. **Protection Mechanisms**
295
296   - *Description:* Outlines additional protection mechanisms, such as
297     overcurrent protection and thermal management.
298   - *Necessity:* Provides extra safety and stability, complementing PSE
299     controller protections.
300   - *PSE Controller Node:* Some protections may be implemented via
301     board-specific hardware or algorithms external to the controller.
302