1 2.. SPDX-License-Identifier: GPL-2.0 3 4========================================= 5A vmemmap diet for HugeTLB and Device DAX 6========================================= 7 8HugeTLB 9======= 10 11This section is to explain how HugeTLB Vmemmap Optimization (HVO) works. 12 13The ``struct page`` structures are used to describe a physical page frame. By 14default, there is a one-to-one mapping from a page frame to its corresponding 15``struct page``. 16 17HugeTLB pages consist of multiple base page size pages and is supported by many 18architectures. See Documentation/admin-guide/mm/hugetlbpage.rst for more 19details. On the x86-64 architecture, HugeTLB pages of size 2MB and 1GB are 20currently supported. Since the base page size on x86 is 4KB, a 2MB HugeTLB page 21consists of 512 base pages and a 1GB HugeTLB page consists of 262144 base pages. 22For each base page, there is a corresponding ``struct page``. 23 24Within the HugeTLB subsystem, only the first 4 ``struct page`` are used to 25contain unique information about a HugeTLB page. ``__NR_USED_SUBPAGE`` provides 26this upper limit. The only 'useful' information in the remaining ``struct page`` 27is the compound_info field, and this field is the same for all tail pages. 28 29By removing redundant ``struct page`` for HugeTLB pages, memory can be returned 30to the buddy allocator for other uses. 31 32Different architectures support different HugeTLB pages. For example, the 33following table is the HugeTLB page size supported by x86 and arm64 34architectures. Because arm64 supports 4k, 16k, and 64k base pages and 35supports contiguous entries, so it supports many kinds of sizes of HugeTLB 36page. 37 38+--------------+-----------+-----------------------------------------------+ 39| Architecture | Page Size | HugeTLB Page Size | 40+--------------+-----------+-----------+-----------+-----------+-----------+ 41| x86-64 | 4KB | 2MB | 1GB | | | 42+--------------+-----------+-----------+-----------+-----------+-----------+ 43| | 4KB | 64KB | 2MB | 32MB | 1GB | 44| +-----------+-----------+-----------+-----------+-----------+ 45| arm64 | 16KB | 2MB | 32MB | 1GB | | 46| +-----------+-----------+-----------+-----------+-----------+ 47| | 64KB | 2MB | 512MB | 16GB | | 48+--------------+-----------+-----------+-----------+-----------+-----------+ 49 50When the system boot up, every HugeTLB page has more than one ``struct page`` 51structs which size is (unit: pages):: 52 53 struct_size = HugeTLB_Size / PAGE_SIZE * sizeof(struct page) / PAGE_SIZE 54 55Where HugeTLB_Size is the size of the HugeTLB page. We know that the size 56of the HugeTLB page is always n times PAGE_SIZE. So we can get the following 57relationship:: 58 59 HugeTLB_Size = n * PAGE_SIZE 60 61Then:: 62 63 struct_size = n * PAGE_SIZE / PAGE_SIZE * sizeof(struct page) / PAGE_SIZE 64 = n * sizeof(struct page) / PAGE_SIZE 65 66We can use huge mapping at the pud/pmd level for the HugeTLB page. 67 68For the HugeTLB page of the pmd level mapping, then:: 69 70 struct_size = n * sizeof(struct page) / PAGE_SIZE 71 = PAGE_SIZE / sizeof(pte_t) * sizeof(struct page) / PAGE_SIZE 72 = sizeof(struct page) / sizeof(pte_t) 73 = 64 / 8 74 = 8 (pages) 75 76Where n is how many pte entries which one page can contains. So the value of 77n is (PAGE_SIZE / sizeof(pte_t)). 78 79This optimization only supports 64-bit system, so the value of sizeof(pte_t) 80is 8. And this optimization also applicable only when the size of ``struct page`` 81is a power of two. In most cases, the size of ``struct page`` is 64 bytes (e.g. 82x86-64 and arm64). So if we use pmd level mapping for a HugeTLB page, the 83size of ``struct page`` structs of it is 8 page frames which size depends on the 84size of the base page. 85 86For the HugeTLB page of the pud level mapping, then:: 87 88 struct_size = PAGE_SIZE / sizeof(pmd_t) * struct_size(pmd) 89 = PAGE_SIZE / 8 * 8 (pages) 90 = PAGE_SIZE (pages) 91 92Where the struct_size(pmd) is the size of the ``struct page`` structs of a 93HugeTLB page of the pmd level mapping. 94 95E.g.: A 2MB HugeTLB page on x86_64 consists in 8 page frames while 1GB 96HugeTLB page consists in 4096. 97 98Next, we take the pmd level mapping of the HugeTLB page as an example to 99show the internal implementation of this optimization. There are 8 pages 100``struct page`` structs associated with a HugeTLB page which is pmd mapped. 101 102Here is how things look before optimization:: 103 104 HugeTLB struct pages(8 pages) page frame(8 pages) 105 +-----------+ ---virt_to_page---> +-----------+ mapping to +-----------+ 106 | | | 0 | -------------> | 0 | 107 | | +-----------+ +-----------+ 108 | | | 1 | -------------> | 1 | 109 | | +-----------+ +-----------+ 110 | | | 2 | -------------> | 2 | 111 | | +-----------+ +-----------+ 112 | | | 3 | -------------> | 3 | 113 | | +-----------+ +-----------+ 114 | | | 4 | -------------> | 4 | 115 | PMD | +-----------+ +-----------+ 116 | level | | 5 | -------------> | 5 | 117 | mapping | +-----------+ +-----------+ 118 | | | 6 | -------------> | 6 | 119 | | +-----------+ +-----------+ 120 | | | 7 | -------------> | 7 | 121 | | +-----------+ +-----------+ 122 | | 123 | | 124 | | 125 +-----------+ 126 127The first page of ``struct page`` (page 0) associated with the HugeTLB page 128contains the 4 ``struct page`` necessary to describe the HugeTLB. The remaining 129pages of ``struct page`` (page 1 to page 7) are tail pages. 130 131The optimization is only applied when the size of the struct page is a power 132of 2. In this case, all tail pages of the same order are identical. See 133compound_head(). This allows us to remap the tail pages of the vmemmap to a 134shared, read-only page. The head page is also remapped to a new page. This 135allows the original vmemmap pages to be freed. 136 137Here is how things look after remapping:: 138 139 HugeTLB struct pages(8 pages) page frame (new) 140 +-----------+ ---virt_to_page---> +-----------+ mapping to +----------------+ 141 | | | 0 | -------------> | 0 | 142 | | +-----------+ +----------------+ 143 | | | 1 | ------┐ 144 | | +-----------+ | 145 | | | 2 | ------┼ +----------------------------+ 146 | | +-----------+ | | A single, per-zone page | 147 | | | 3 | ------┼------> | frame shared among all | 148 | | +-----------+ | | hugepages of the same size | 149 | | | 4 | ------┼ +----------------------------+ 150 | | +-----------+ | 151 | | | 5 | ------┼ 152 | PMD | +-----------+ | 153 | level | | 6 | ------┼ 154 | mapping | +-----------+ | 155 | | | 7 | ------┘ 156 | | +-----------+ 157 | | 158 | | 159 | | 160 +-----------+ 161 162When a HugeTLB is freed to the buddy system, we should allocate 7 pages for 163vmemmap pages and restore the previous mapping relationship. 164 165For the HugeTLB page of the pud level mapping. It is similar to the former. 166We also can use this approach to free (PAGE_SIZE - 1) vmemmap pages. 167 168Apart from the HugeTLB page of the pmd/pud level mapping, some architectures 169(e.g. aarch64) provides a contiguous bit in the translation table entries 170that hints to the MMU to indicate that it is one of a contiguous set of 171entries that can be cached in a single TLB entry. 172 173The contiguous bit is used to increase the mapping size at the pmd and pte 174(last) level. So this type of HugeTLB page can be optimized only when its 175size of the ``struct page`` structs is greater than **1** page. 176 177Device DAX 178========== 179 180The device-dax interface uses the same tail deduplication technique explained 181in the previous chapter, except when used with the vmemmap in 182the device (altmap). 183 184The following page sizes are supported in DAX: PAGE_SIZE (4K on x86_64), 185PMD_SIZE (2M on x86_64) and PUD_SIZE (1G on x86_64). 186For powerpc equivalent details see Documentation/arch/powerpc/vmemmap_dedup.rst 187 188The differences with HugeTLB are relatively minor. 189 190It only use 3 ``struct page`` for storing all information as opposed 191to 4 on HugeTLB pages. 192 193There's no remapping of vmemmap given that device-dax memory is not part of 194System RAM ranges initialized at boot. Thus the tail page deduplication 195happens at a later stage when we populate the sections. HugeTLB reuses the 196the head vmemmap page representing, whereas device-dax reuses the tail 197vmemmap page. This results in only half of the savings compared to HugeTLB. 198 199Deduplicated tail pages are not mapped read-only. 200 201Here's how things look like on device-dax after the sections are populated:: 202 203 +-----------+ ---virt_to_page---> +-----------+ mapping to +-----------+ 204 | | | 0 | -------------> | 0 | 205 | | +-----------+ +-----------+ 206 | | | 1 | -------------> | 1 | 207 | | +-----------+ +-----------+ 208 | | | 2 | ----------------^ ^ ^ ^ ^ ^ 209 | | +-----------+ | | | | | 210 | | | 3 | ------------------+ | | | | 211 | | +-----------+ | | | | 212 | | | 4 | --------------------+ | | | 213 | PMD | +-----------+ | | | 214 | level | | 5 | ----------------------+ | | 215 | mapping | +-----------+ | | 216 | | | 6 | ------------------------+ | 217 | | +-----------+ | 218 | | | 7 | --------------------------+ 219 | | +-----------+ 220 | | 221 | | 222 | | 223 +-----------+ 224