1e1181b5bSGustavo Pimentel.. SPDX-License-Identifier: GPL-2.0 2e1181b5bSGustavo Pimentel 3e1181b5bSGustavo Pimentel=========================================================================== 4e1181b5bSGustavo PimentelDriver for Synopsys DesignWare PCIe traffic generator (also known as xData) 5e1181b5bSGustavo Pimentel=========================================================================== 6e1181b5bSGustavo Pimentel 7*23188e0dSGustavo PimentelSupported chips: 8*23188e0dSGustavo PimentelSynopsys DesignWare PCIe prototype solution 9*23188e0dSGustavo Pimentel 10*23188e0dSGustavo PimentelDatasheet: 11*23188e0dSGustavo PimentelNot freely available 12*23188e0dSGustavo Pimentel 13*23188e0dSGustavo PimentelAuthor: 14*23188e0dSGustavo PimentelGustavo Pimentel <gustavo.pimentel@synopsys.com> 15*23188e0dSGustavo Pimentel 16*23188e0dSGustavo PimentelDescription 17*23188e0dSGustavo Pimentel----------- 18*23188e0dSGustavo Pimentel 19e1181b5bSGustavo PimentelThis driver should be used as a host-side (Root Complex) driver and Synopsys 20e1181b5bSGustavo PimentelDesignWare prototype that includes this IP. 21e1181b5bSGustavo Pimentel 22*23188e0dSGustavo PimentelThe dw-xdata-pcie driver can be used to enable/disable PCIe traffic 23e1181b5bSGustavo Pimentelgenerator in either direction (mutual exclusion) besides allowing the 24e1181b5bSGustavo PimentelPCIe link performance analysis. 25e1181b5bSGustavo Pimentel 26e1181b5bSGustavo PimentelThe interaction with this driver is done through the module parameter and 27e1181b5bSGustavo Pimentelcan be changed in runtime. The driver outputs the requested command state 28*23188e0dSGustavo Pimentelinformation to ``/var/log/kern.log`` or dmesg. 29e1181b5bSGustavo Pimentel 30*23188e0dSGustavo PimentelExample 31*23188e0dSGustavo Pimentel------- 32e1181b5bSGustavo Pimentel 33*23188e0dSGustavo PimentelWrite TLPs traffic generation - Root Complex to Endpoint direction 34*23188e0dSGustavo Pimentel~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 35*23188e0dSGustavo Pimentel 36*23188e0dSGustavo PimentelGenerate traffic:: 37*23188e0dSGustavo Pimentel 38*23188e0dSGustavo Pimentel # echo 1 > /sys/class/misc/dw-xdata-pcie.0/write 39*23188e0dSGustavo Pimentel 40*23188e0dSGustavo PimentelGet link throughput in MB/s:: 41*23188e0dSGustavo Pimentel 42*23188e0dSGustavo Pimentel # cat /sys/class/misc/dw-xdata-pcie.0/write 43e1181b5bSGustavo Pimentel 204 44e1181b5bSGustavo Pimentel 45*23188e0dSGustavo PimentelStop traffic in any direction:: 46e1181b5bSGustavo Pimentel 47*23188e0dSGustavo Pimentel # echo 0 > /sys/class/misc/dw-xdata-pcie.0/write 48*23188e0dSGustavo Pimentel 49*23188e0dSGustavo PimentelRead TLPs traffic generation - Endpoint to Root Complex direction 50*23188e0dSGustavo Pimentel~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 51*23188e0dSGustavo Pimentel 52*23188e0dSGustavo PimentelGenerate traffic:: 53*23188e0dSGustavo Pimentel 54*23188e0dSGustavo Pimentel # echo 1 > /sys/class/misc/dw-xdata-pcie.0/read 55*23188e0dSGustavo Pimentel 56*23188e0dSGustavo PimentelGet link throughput in MB/s:: 57*23188e0dSGustavo Pimentel 58*23188e0dSGustavo Pimentel # cat /sys/class/misc/dw-xdata-pcie.0/read 59e1181b5bSGustavo Pimentel 199 60e1181b5bSGustavo Pimentel 61*23188e0dSGustavo PimentelStop traffic in any direction:: 62*23188e0dSGustavo Pimentel 63*23188e0dSGustavo Pimentel # echo 0 > /sys/class/misc/dw-xdata-pcie.0/read 64*23188e0dSGustavo Pimentel 65