xref: /linux/Documentation/i2c/smbus-protocol.rst (revision 1959ba4e40ce40c380dbe868433f5c4b20bb1ba3)
1==================
2The SMBus Protocol
3==================
4
5The following is a summary of the SMBus protocol. It applies to
6all revisions of the protocol (1.0, 1.1, and 2.0).
7Certain protocol features which are not supported by
8this package are briefly described at the end of this document.
9
10Some adapters understand only the SMBus (System Management Bus) protocol,
11which is a subset from the I2C protocol. Fortunately, many devices use
12only the same subset, which makes it possible to put them on an SMBus.
13
14If you write a driver for some I2C device, please try to use the SMBus
15commands if at all possible (if the device uses only that subset of the
16I2C protocol). This makes it possible to use the device driver on both
17SMBus adapters and I2C adapters (the SMBus command set is automatically
18translated to I2C on I2C adapters, but plain I2C commands can not be
19handled at all on most pure SMBus adapters).
20
21Below is a list of SMBus protocol operations, and the functions executing
22them.  Note that the names used in the SMBus protocol specifications usually
23don't match these function names.  For some of the operations which pass a
24single data byte, the functions using SMBus protocol operation names execute
25a different protocol operation entirely.
26
27Each transaction type corresponds to a functionality flag. Before calling a
28transaction function, a device driver should always check (just once) for
29the corresponding functionality flag to ensure that the underlying I2C
30adapter supports the transaction in question. See :doc:`functionality` for
31the details.
32
33
34Key to symbols
35==============
36
37=============== =============================================================
38S               Start condition
39P               Stop condition
40Rd/Wr (1 bit)   Read/Write bit. Rd equals 1, Wr equals 0.
41A, NA (1 bit)   Acknowledge (ACK) and Not Acknowledge (NACK) bit
42Addr  (7 bits)  I2C 7 bit address. Note that this can be expanded as usual to
43                get a 10 bit I2C address.
44Comm  (8 bits)  Command byte, a data byte which often selects a register on
45                the device.
46Data  (8 bits)  A plain data byte. Sometimes, I write DataLow, DataHigh
47                for 16 bit data.
48Count (8 bits)  A data byte containing the length of a block operation.
49
50[..]            Data sent by I2C device, as opposed to data sent by the host
51                adapter.
52=============== =============================================================
53
54
55SMBus Quick Command
56===================
57
58This sends a single bit to the device, at the place of the Rd/Wr bit::
59
60  S Addr Rd/Wr [A] P
61
62Functionality flag: I2C_FUNC_SMBUS_QUICK
63
64
65SMBus Receive Byte
66==================
67
68Implemented by i2c_smbus_read_byte()
69
70This reads a single byte from a device, without specifying a device
71register. Some devices are so simple that this interface is enough; for
72others, it is a shorthand if you want to read the same register as in
73the previous SMBus command::
74
75  S Addr Rd [A] [Data] NA P
76
77Functionality flag: I2C_FUNC_SMBUS_READ_BYTE
78
79
80SMBus Send Byte
81===============
82
83Implemented by i2c_smbus_write_byte()
84
85This operation is the reverse of Receive Byte: it sends a single byte
86to a device.  See Receive Byte for more information.
87
88::
89
90  S Addr Wr [A] Data [A] P
91
92Functionality flag: I2C_FUNC_SMBUS_WRITE_BYTE
93
94
95SMBus Read Byte
96===============
97
98Implemented by i2c_smbus_read_byte_data()
99
100This reads a single byte from a device, from a designated register.
101The register is specified through the Comm byte::
102
103  S Addr Wr [A] Comm [A] S Addr Rd [A] [Data] NA P
104
105Functionality flag: I2C_FUNC_SMBUS_READ_BYTE_DATA
106
107
108SMBus Read Word
109===============
110
111Implemented by i2c_smbus_read_word_data()
112
113This operation is very like Read Byte; again, data is read from a
114device, from a designated register that is specified through the Comm
115byte. But this time, the data is a complete word (16 bits)::
116
117  S Addr Wr [A] Comm [A] S Addr Rd [A] [DataLow] A [DataHigh] NA P
118
119Functionality flag: I2C_FUNC_SMBUS_READ_WORD_DATA
120
121Note the convenience function i2c_smbus_read_word_swapped() is
122available for reads where the two data bytes are the other way
123around (not SMBus compliant, but very popular.)
124
125
126SMBus Write Byte
127================
128
129Implemented by i2c_smbus_write_byte_data()
130
131This writes a single byte to a device, to a designated register. The
132register is specified through the Comm byte. This is the opposite of
133the Read Byte operation.
134
135::
136
137  S Addr Wr [A] Comm [A] Data [A] P
138
139Functionality flag: I2C_FUNC_SMBUS_WRITE_BYTE_DATA
140
141
142SMBus Write Word
143================
144
145Implemented by i2c_smbus_write_word_data()
146
147This is the opposite of the Read Word operation. 16 bits
148of data are written to a device, to the designated register that is
149specified through the Comm byte::
150
151  S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] P
152
153Functionality flag: I2C_FUNC_SMBUS_WRITE_WORD_DATA
154
155Note the convenience function i2c_smbus_write_word_swapped() is
156available for writes where the two data bytes are the other way
157around (not SMBus compliant, but very popular.)
158
159
160SMBus Process Call
161==================
162
163This command selects a device register (through the Comm byte), sends
16416 bits of data to it, and reads 16 bits of data in return::
165
166  S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A]
167                               S Addr Rd [A] [DataLow] A [DataHigh] NA P
168
169Functionality flag: I2C_FUNC_SMBUS_PROC_CALL
170
171
172SMBus Block Read
173================
174
175Implemented by i2c_smbus_read_block_data()
176
177This command reads a block of up to 32 bytes from a device, from a
178designated register that is specified through the Comm byte. The amount
179of data is specified by the device in the Count byte.
180
181::
182
183  S Addr Wr [A] Comm [A]
184             S Addr Rd [A] [Count] A [Data] A [Data] A ... A [Data] NA P
185
186Functionality flag: I2C_FUNC_SMBUS_READ_BLOCK_DATA
187
188
189SMBus Block Write
190=================
191
192Implemented by i2c_smbus_write_block_data()
193
194The opposite of the Block Read command, this writes up to 32 bytes to
195a device, to a designated register that is specified through the
196Comm byte. The amount of data is specified in the Count byte.
197
198::
199
200  S Addr Wr [A] Comm [A] Count [A] Data [A] Data [A] ... [A] Data [A] P
201
202Functionality flag: I2C_FUNC_SMBUS_WRITE_BLOCK_DATA
203
204
205SMBus Block Write - Block Read Process Call
206===========================================
207
208SMBus Block Write - Block Read Process Call was introduced in
209Revision 2.0 of the specification.
210
211This command selects a device register (through the Comm byte), sends
2121 to 31 bytes of data to it, and reads 1 to 31 bytes of data in return::
213
214  S Addr Wr [A] Comm [A] Count [A] Data [A] ...
215                               S Addr Rd [A] [Count] A [Data] ... A P
216
217Functionality flag: I2C_FUNC_SMBUS_BLOCK_PROC_CALL
218
219
220SMBus Host Notify
221=================
222
223This command is sent from a SMBus device acting as a master to the
224SMBus host acting as a slave.
225It is the same form as Write Word, with the command code replaced by the
226alerting device's address.
227
228::
229
230  [S] [HostAddr] [Wr] A [DevAddr] A [DataLow] A [DataHigh] A [P]
231
232This is implemented in the following way in the Linux kernel:
233
234* I2C bus drivers which support SMBus Host Notify should report
235  I2C_FUNC_SMBUS_HOST_NOTIFY.
236* I2C bus drivers trigger SMBus Host Notify by a call to
237  i2c_handle_smbus_host_notify().
238* I2C drivers for devices which can trigger SMBus Host Notify will have
239  client->irq assigned to a Host Notify IRQ if noone else specified an other.
240
241There is currently no way to retrieve the data parameter from the client.
242
243
244Packet Error Checking (PEC)
245===========================
246
247Packet Error Checking was introduced in Revision 1.1 of the specification.
248
249PEC adds a CRC-8 error-checking byte to transfers using it, immediately
250before the terminating STOP.
251
252
253Address Resolution Protocol (ARP)
254=================================
255
256The Address Resolution Protocol was introduced in Revision 2.0 of
257the specification. It is a higher-layer protocol which uses the
258messages above.
259
260ARP adds device enumeration and dynamic address assignment to
261the protocol. All ARP communications use slave address 0x61 and
262require PEC checksums.
263
264
265SMBus Alert
266===========
267
268SMBus Alert was introduced in Revision 1.0 of the specification.
269
270The SMBus alert protocol allows several SMBus slave devices to share a
271single interrupt pin on the SMBus master, while still allowing the master
272to know which slave triggered the interrupt.
273
274This is implemented the following way in the Linux kernel:
275
276* I2C bus drivers which support SMBus alert should call
277  i2c_new_smbus_alert_device() to install SMBus alert support.
278* I2C drivers for devices which can trigger SMBus alerts should implement
279  the optional alert() callback.
280
281
282I2C Block Transactions
283======================
284
285The following I2C block transactions are similar to the SMBus Block Read
286and Write operations, except these do not have a Count byte. They are
287supported by the SMBus layer and are described here for completeness, but
288they are *NOT* defined by the SMBus specification.
289
290I2C block transactions do not limit the number of bytes transferred
291but the SMBus layer places a limit of 32 bytes.
292
293
294I2C Block Read
295==============
296
297Implemented by i2c_smbus_read_i2c_block_data()
298
299This command reads a block of bytes from a device, from a
300designated register that is specified through the Comm byte::
301
302  S Addr Wr [A] Comm [A]
303             S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
304
305Functionality flag: I2C_FUNC_SMBUS_READ_I2C_BLOCK
306
307
308I2C Block Write
309===============
310
311Implemented by i2c_smbus_write_i2c_block_data()
312
313The opposite of the Block Read command, this writes bytes to
314a device, to a designated register that is specified through the
315Comm byte. Note that command lengths of 0, 2, or more bytes are
316supported as they are indistinguishable from data.
317
318::
319
320  S Addr Wr [A] Comm [A] Data [A] Data [A] ... [A] Data [A] P
321
322Functionality flag: I2C_FUNC_SMBUS_WRITE_I2C_BLOCK
323