xref: /linux/Documentation/i2c/busses/i2c-i801.rst (revision 24168c5e6dfbdd5b414f048f47f75d64533296ca)
1======================
2Kernel driver i2c-i801
3======================
4
5
6Supported adapters:
7  * Intel 82801AA and 82801AB (ICH and ICH0 - part of the
8    '810' and '810E' chipsets)
9  * Intel 82801BA (ICH2 - part of the '815E' chipset)
10  * Intel 82801CA/CAM (ICH3)
11  * Intel 82801DB (ICH4) (HW PEC supported)
12  * Intel 82801EB/ER (ICH5) (HW PEC supported)
13  * Intel 6300ESB
14  * Intel 82801FB/FR/FW/FRW (ICH6)
15  * Intel 82801G (ICH7)
16  * Intel 631xESB/632xESB (ESB2)
17  * Intel 82801H (ICH8)
18  * Intel 82801I (ICH9)
19  * Intel EP80579 (Tolapai)
20  * Intel 82801JI (ICH10)
21  * Intel 5/3400 Series (PCH)
22  * Intel 6 Series (PCH)
23  * Intel Patsburg (PCH)
24  * Intel DH89xxCC (PCH)
25  * Intel Panther Point (PCH)
26  * Intel Lynx Point (PCH)
27  * Intel Avoton (SOC)
28  * Intel Wellsburg (PCH)
29  * Intel Coleto Creek (PCH)
30  * Intel Wildcat Point (PCH)
31  * Intel BayTrail (SOC)
32  * Intel Braswell (SOC)
33  * Intel Sunrise Point (PCH)
34  * Intel Kaby Lake (PCH)
35  * Intel DNV (SOC)
36  * Intel Broxton (SOC)
37  * Intel Lewisburg (PCH)
38  * Intel Gemini Lake (SOC)
39  * Intel Cannon Lake (PCH)
40  * Intel Cedar Fork (PCH)
41  * Intel Ice Lake (PCH)
42  * Intel Comet Lake (PCH)
43  * Intel Elkhart Lake (PCH)
44  * Intel Tiger Lake (PCH)
45  * Intel Jasper Lake (SOC)
46  * Intel Emmitsburg (PCH)
47  * Intel Alder Lake (PCH)
48  * Intel Raptor Lake (PCH)
49  * Intel Meteor Lake (SOC and PCH)
50  * Intel Birch Stream (SOC)
51
52   Datasheets: Publicly available at the Intel website
53
54On Intel Patsburg and later chipsets, both the normal host SMBus controller
55and the additional 'Integrated Device Function' controllers are supported.
56
57Authors:
58	- Mark Studebaker <mdsxyz123@yahoo.com>
59	- Jean Delvare <jdelvare@suse.de>
60
61
62Module Parameters
63-----------------
64
65* disable_features (bit vector)
66
67Disable selected features normally supported by the device. This makes it
68possible to work around possible driver or hardware bugs if the feature in
69question doesn't work as intended for whatever reason. Bit values:
70
71 ====  =========================================
72 0x01  disable SMBus PEC
73 0x02  disable the block buffer
74 0x08  disable the I2C block read functionality
75 0x10  don't use interrupts
76 0x20  disable SMBus Host Notify
77 ====  =========================================
78
79
80Description
81-----------
82
83The ICH (properly known as the 82801AA), ICH0 (82801AB), ICH2 (82801BA),
84ICH3 (82801CA/CAM) and later devices (PCH) are Intel chips that are a part of
85Intel's '810' chipset for Celeron-based PCs, '810E' chipset for
86Pentium-based PCs, '815E' chipset, and others.
87
88The ICH chips contain at least SEVEN separate PCI functions in TWO logical
89PCI devices. An output of lspci will show something similar to the
90following::
91
92  00:1e.0 PCI bridge: Intel Corporation: Unknown device 2418 (rev 01)
93  00:1f.0 ISA bridge: Intel Corporation: Unknown device 2410 (rev 01)
94  00:1f.1 IDE interface: Intel Corporation: Unknown device 2411 (rev 01)
95  00:1f.2 USB Controller: Intel Corporation: Unknown device 2412 (rev 01)
96  00:1f.3 Unknown class [0c05]: Intel Corporation: Unknown device 2413 (rev 01)
97
98The SMBus controller is function 3 in device 1f. Class 0c05 is SMBus Serial
99Controller.
100
101The ICH chips are quite similar to Intel's PIIX4 chip, at least in the
102SMBus controller.
103
104
105Process Call Support
106--------------------
107
108Block process call is supported on the 82801EB (ICH5) and later chips.
109
110
111I2C Block Read Support
112----------------------
113
114I2C block read is supported on the 82801EB (ICH5) and later chips.
115
116
117SMBus 2.0 Support
118-----------------
119
120The 82801DB (ICH4) and later chips support several SMBus 2.0 features.
121
122
123Interrupt Support
124-----------------
125
126PCI interrupt support is supported on the 82801EB (ICH5) and later chips.
127
128
129Hidden ICH SMBus
130----------------
131
132If your system has an Intel ICH south bridge, but you do NOT see the
133SMBus device at 00:1f.3 in lspci, and you can't figure out any way in the
134BIOS to enable it, it means it has been hidden by the BIOS code. Asus is
135well known for first doing this on their P4B motherboard, and many other
136boards after that. Some vendor machines are affected as well.
137
138The first thing to try is the "i2c-scmi" ACPI driver. It could be that the
139SMBus was hidden on purpose because it'll be driven by ACPI. If the
140i2c-scmi driver works for you, just forget about the i2c-i801 driver and
141don't try to unhide the ICH SMBus. Even if i2c-scmi doesn't work, you
142better make sure that the SMBus isn't used by the ACPI code. Try loading
143the "fan" and "thermal" drivers, and check in /sys/class/thermal. If you
144find a thermal zone with type "acpitz", it's likely that the ACPI is
145accessing the SMBus and it's safer not to unhide it. Only once you are
146certain that ACPI isn't using the SMBus, you can attempt to unhide it.
147
148In order to unhide the SMBus, we need to change the value of a PCI
149register before the kernel enumerates the PCI devices. This is done in
150drivers/pci/quirks.c, where all affected boards must be listed (see
151function asus_hides_smbus_hostbridge.) If the SMBus device is missing,
152and you think there's something interesting on the SMBus (e.g. a
153hardware monitoring chip), you need to add your board to the list.
154
155The motherboard is identified using the subvendor and subdevice IDs of the
156host bridge PCI device. Get yours with ``lspci -n -v -s 00:00.0``::
157
158  00:00.0 Class 0600: 8086:2570 (rev 02)
159          Subsystem: 1043:80f2
160          Flags: bus master, fast devsel, latency 0
161          Memory at fc000000 (32-bit, prefetchable) [size=32M]
162          Capabilities: [e4] #09 [2106]
163          Capabilities: [a0] AGP version 3.0
164
165Here the host bridge ID is 2570 (82865G/PE/P), the subvendor ID is 1043
166(Asus) and the subdevice ID is 80f2 (P4P800-X). You can find the symbolic
167names for the bridge ID and the subvendor ID in include/linux/pci_ids.h,
168and then add a case for your subdevice ID at the right place in
169drivers/pci/quirks.c. Then please give it very good testing, to make sure
170that the unhidden SMBus doesn't conflict with e.g. ACPI.
171
172If it works, proves useful (i.e. there are usable chips on the SMBus)
173and seems safe, please submit a patch for inclusion into the kernel.
174
175Note: There's a useful script in lm_sensors 2.10.2 and later, named
176unhide_ICH_SMBus (in prog/hotplug), which uses the fakephp driver to
177temporarily unhide the SMBus without having to patch and recompile your
178kernel. It's very convenient if you just want to check if there's
179anything interesting on your hidden ICH SMBus.
180
181
182----------------------------------------------------------------------------
183
184The lm_sensors project gratefully acknowledges the support of Texas
185Instruments in the initial development of this driver.
186
187The lm_sensors project gratefully acknowledges the support of Intel in the
188development of SMBus 2.0 / ICH4 features of this driver.
189