1.. SPDX-License-Identifier: GPL-2.0 2 3Kernel driver max16601 4====================== 5 6Supported chips: 7 8 * Maxim MAX16508 9 10 Prefix: 'max16508' 11 12 Addresses scanned: - 13 14 Datasheet: Not published 15 16 * Maxim MAX16601 17 18 Prefix: 'max16601' 19 20 Addresses scanned: - 21 22 Datasheet: Not published 23 24Author: Guenter Roeck <linux@roeck-us.net> 25 26 27Description 28----------- 29 30This driver supports the MAX16508 VR13 Dual-Output Voltage Regulator 31as well as the MAX16601 VR13.HC Dual-Output Voltage Regulator chipsets. 32 33The driver is a client driver to the core PMBus driver. 34Please see Documentation/hwmon/pmbus.rst for details on PMBus client drivers. 35 36 37Usage Notes 38----------- 39 40This driver does not auto-detect devices. You will have to instantiate the 41devices explicitly. Please see Documentation/i2c/instantiating-devices.rst for 42details. 43 44 45Platform data support 46--------------------- 47 48The driver supports standard PMBus driver platform data. 49 50 51Sysfs entries 52------------- 53 54The following attributes are supported. 55 56=============================== =============================================== 57in1_label "vin1" 58in1_input VCORE input voltage. 59in1_alarm Input voltage alarm. 60 61in2_label "vout1" 62in2_input VCORE output voltage. 63in2_alarm Output voltage alarm. 64 65curr1_label "iin1" 66curr1_input VCORE input current, derived from duty cycle 67 and output current. 68curr1_max Maximum input current. 69curr1_max_alarm Current high alarm. 70 71curr[P+2]_label "iin1.P" 72curr[P+2]_input VCORE phase P input current. 73 74curr[N+2]_label "iin2" 75curr[N+2]_input VCORE input current, derived from sensor 76 element. 77 'N' is the number of enabled/populated phases. 78 79curr[N+3]_label "iin3" 80curr[N+3]_input VSA input current. 81 82curr[N+4]_label "iout1" 83curr[N+4]_input VCORE output current. 84curr[N+4]_crit Critical output current. 85curr[N+4]_crit_alarm Output current critical alarm. 86curr[N+4]_max Maximum output current. 87curr[N+4]_max_alarm Output current high alarm. 88 89curr[N+P+5]_label "iout1.P" 90curr[N+P+5]_input VCORE phase P output current. 91 92curr[2*N+5]_label "iout3" 93curr[2*N+5]_input VSA output current. 94curr[2*N+5]_highest Historical maximum VSA output current. 95curr[2*N+5]_reset_history Write any value to reset curr21_highest. 96curr[2*N+5]_crit Critical output current. 97curr[2*N+5]_crit_alarm Output current critical alarm. 98curr[2*N+5]_max Maximum output current. 99curr[2*N+5]_max_alarm Output current high alarm. 100 101power1_label "pin1" 102power1_input Input power, derived from duty cycle and output 103 current. 104power1_alarm Input power alarm. 105 106power2_label "pin2" 107power2_input Input power, derived from input current sensor. 108 109power3_label "pout" 110power3_input Output power. 111 112temp1_input VCORE temperature. 113temp1_crit Critical high temperature. 114temp1_crit_alarm Chip temperature critical high alarm. 115temp1_max Maximum temperature. 116temp1_max_alarm Chip temperature high alarm. 117 118temp2_input TSENSE_0 temperature 119temp3_input TSENSE_1 temperature 120temp4_input TSENSE_2 temperature 121temp5_input TSENSE_3 temperature 122 123temp6_input VSA temperature. 124temp6_crit Critical high temperature. 125temp6_crit_alarm Chip temperature critical high alarm. 126temp6_max Maximum temperature. 127temp6_max_alarm Chip temperature high alarm. 128=============================== =============================================== 129