1.. SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 3========= 4Task List 5========= 6 7Tasks may have the following fields: 8 9- ``Complexity``: Describes the required familiarity with Rust and / or the 10 corresponding kernel APIs or subsystems. There are four different complexities, 11 ``Beginner``, ``Intermediate``, ``Advanced`` and ``Expert``. 12- ``Reference``: References to other tasks. 13- ``Link``: Links to external resources. 14- ``Contact``: The person that can be contacted for further information about 15 the task. 16 17A task might have `[ABCD]` code after its name. This code can be used to grep 18into the code for `TODO` entries related to it. 19 20Enablement (Rust) 21================= 22 23Tasks that are not directly related to nova-core, but are preconditions in terms 24of required APIs. 25 26FromPrimitive API [FPRI] 27------------------------ 28 29Sometimes the need arises to convert a number to a value of an enum or a 30structure. 31 32A good example from nova-core would be the ``Chipset`` enum type, which defines 33the value ``AD102``. When probing the GPU the value ``0x192`` can be read from a 34certain register indication the chipset AD102. Hence, the enum value ``AD102`` 35should be derived from the number ``0x192``. Currently, nova-core uses a custom 36implementation (``Chipset::from_u32`` for this. 37 38Instead, it would be desirable to have something like the ``FromPrimitive`` 39trait [1] from the num crate. 40 41Having this generalization also helps with implementing a generic macro that 42automatically generates the corresponding mappings between a value and a number. 43 44FromPrimitive support has been worked on in the past, but hasn't been followed 45since then [1]. 46 47There also have been considerations of ToPrimitive [2]. 48 49| Complexity: Beginner 50| Link: https://docs.rs/num/latest/num/trait.FromPrimitive.html 51| Link: https://lore.kernel.org/all/cover.1750689857.git.y.j3ms.n@gmail.com/ [1] 52| Link: https://rust-for-linux.zulipchat.com/#narrow/channel/288089-General/topic/Implement.20.60FromPrimitive.60.20trait.20.2B.20derive.20macro.20for.20nova-core/with/541971854 [2] 53 54Numerical operations [NUMM] 55--------------------------- 56 57Nova uses integer operations that are not part of the standard library (or not 58implemented in an optimized way for the kernel). These include: 59 60- The "Find Last Set Bit" (`fls` function of the C part of the kernel) 61 operation. 62 63A `num` core kernel module is being designed to provide these operations. 64 65| Complexity: Intermediate 66| Contact: Alexandre Courbot 67 68Page abstraction for foreign pages 69---------------------------------- 70 71Rust abstractions for pages not created by the Rust page abstraction without 72direct ownership. 73 74There is active onging work from Abdiel Janulgue [1] and Lina [2]. 75 76| Complexity: Advanced 77| Link: https://lore.kernel.org/linux-mm/20241119112408.779243-1-abdiel.janulgue@gmail.com/ [1] 78| Link: https://lore.kernel.org/rust-for-linux/20250202-rust-page-v1-0-e3170d7fe55e@asahilina.net/ [2] 79 80PCI MISC APIs 81------------- 82 83Extend the existing PCI device / driver abstractions by SR-IOV, capability, MSI 84API abstractions. 85 86SR-IOV [1] is work in progress. 87 88| Complexity: Beginner 89| Link: https://lore.kernel.org/all/20251119-rust-pci-sriov-v1-0-883a94599a97@redhat.com/ [1] 90 91GPU (general) 92============= 93 94Initial Devinit support 95----------------------- 96 97Implement BIOS Device Initialization, i.e. memory sizing, waiting, PLL 98configuration. 99 100| Contact: Dave Airlie 101| Complexity: Beginner 102 103MMU / PT management 104------------------- 105 106Work out the architecture for MMU / page table management. 107 108We need to consider that nova-drm will need rather fine-grained control, 109especially in terms of locking, in order to be able to implement asynchronous 110Vulkan queues. 111 112While generally sharing the corresponding code is desirable, it needs to be 113evaluated how (and if at all) sharing the corresponding code is expedient. 114 115| Complexity: Expert 116 117VRAM memory allocator 118--------------------- 119 120Investigate options for a VRAM memory allocator. 121 122Some possible options: 123 - Rust abstractions for 124 - RB tree (interval tree) / drm_mm 125 - maple_tree 126 - native Rust collections 127 128There is work in progress for using drm_buddy [1]. 129 130| Complexity: Advanced 131| Link: https://lore.kernel.org/all/20251219203805.1246586-4-joelagnelf@nvidia.com/ [1] 132 133Instance Memory 134--------------- 135 136Implement support for instmem (bar2) used to store page tables. 137 138| Complexity: Intermediate 139| Contact: Dave Airlie 140 141GPU System Processor (GSP) 142========================== 143 144Export GSP log buffers 145---------------------- 146 147Recent patches from Timur Tabi [1] added support to expose GSP-RM log buffers 148(even after failure to probe the driver) through debugfs. 149 150This is also an interesting feature for nova-core, especially in the early days. 151 152| Link: https://lore.kernel.org/nouveau/20241030202952.694055-2-ttabi@nvidia.com/ [1] 153| Reference: Debugfs abstractions 154| Complexity: Intermediate 155 156GSP firmware abstraction 157------------------------ 158 159The GSP-RM firmware API is unstable and may incompatibly change from version to 160version, in terms of data structures and semantics. 161 162This problem is one of the big motivations for using Rust for nova-core, since 163it turns out that Rust's procedural macro feature provides a rather elegant way 164to address this issue: 165 1661. generate Rust structures from the C headers in a separate namespace per version 1672. build abstraction structures (within a generic namespace) that implement the 168 firmware interfaces; annotate the differences in implementation with version 169 identifiers 1703. use a procedural macro to generate the actual per version implementation out 171 of this abstraction 1724. instantiate the correct version type one on runtime (can be sure that all 173 have the same interface because it's defined by a common trait) 174 175There is a PoC implementation of this pattern, in the context of the nova-core 176PoC driver. 177 178This task aims at refining the feature and ideally generalize it, to be usable 179by other drivers as well. 180 181| Complexity: Expert 182 183GSP message queue 184----------------- 185 186Implement low level GSP message queue (command, status) for communication 187between the kernel driver and GSP. 188 189| Complexity: Advanced 190| Contact: Dave Airlie 191 192Bootstrap GSP 193------------- 194 195Call the boot firmware to boot the GSP processor; execute initial control 196messages. 197 198| Complexity: Intermediate 199| Contact: Dave Airlie 200 201Client / Device APIs 202-------------------- 203 204Implement the GSP message interface for client / device allocation and the 205corresponding client and device allocation APIs. 206 207| Complexity: Intermediate 208| Contact: Dave Airlie 209 210Bar PDE handling 211---------------- 212 213Synchronize page table handling for BARs between the kernel driver and GSP. 214 215| Complexity: Beginner 216| Contact: Dave Airlie 217 218FIFO engine 219----------- 220 221Implement support for the FIFO engine, i.e. the corresponding GSP message 222interface and provide an API for chid allocation and channel handling. 223 224| Complexity: Advanced 225| Contact: Dave Airlie 226 227GR engine 228--------- 229 230Implement support for the graphics engine, i.e. the corresponding GSP message 231interface and provide an API for (golden) context creation and promotion. 232 233| Complexity: Advanced 234| Contact: Dave Airlie 235 236CE engine 237--------- 238 239Implement support for the copy engine, i.e. the corresponding GSP message 240interface. 241 242| Complexity: Intermediate 243| Contact: Dave Airlie 244 245VFN IRQ controller 246------------------ 247 248Support for the VFN interrupt controller. 249 250| Complexity: Intermediate 251| Contact: Dave Airlie 252 253External APIs 254============= 255 256nova-core base API 257------------------ 258 259Work out the common pieces of the API to connect 2nd level drivers, i.e. vGPU 260manager and nova-drm. 261 262| Complexity: Advanced 263 264vGPU manager API 265---------------- 266 267Work out the API parts required by the vGPU manager, which are not covered by 268the base API. 269 270| Complexity: Advanced 271 272nova-core C API 273--------------- 274 275Implement a C wrapper for the APIs required by the vGPU manager driver. 276 277| Complexity: Intermediate 278 279Testing 280======= 281 282CI pipeline 283----------- 284 285Investigate option for continuous integration testing. 286 287This can go from as simple as running KUnit tests over running (graphics) CTS to 288booting up (multiple) guest VMs to test VFIO use-cases. 289 290It might also be worth to consider the introduction of a new test suite directly 291sitting on top of the uAPI for more targeted testing and debugging. There may be 292options for collaboration / shared code with the Mesa project. 293 294| Complexity: Advanced 295