xref: /linux/Documentation/gpu/msm-crash-dump.rst (revision 249ebf3f65f8530beb2cbfb91bff1d83ba88d23c)
1:orphan:
2
3=====================
4MSM Crash Dump Format
5=====================
6
7Following a GPU hang the MSM driver outputs debugging information via
8/sys/kernel/dri/X/show or via devcoredump (/sys/class/devcoredump/dcdX/data).
9This document describes how the output is formatted.
10
11Each entry is in the form key: value. Sections headers will not have a value
12and all the contents of a section will be indented two spaces from the header.
13Each section might have multiple array entries the start of which is designated
14by a (-).
15
16Mappings
17--------
18
19kernel
20	The kernel version that generated the dump (UTS_RELEASE).
21
22module
23	The module that generated the crashdump.
24
25time
26	The kernel time at crash formatted as seconds.microseconds.
27
28comm
29	Comm string for the binary that generated the fault.
30
31cmdline
32	Command line for the binary that generated the fault.
33
34revision
35	ID of the GPU that generated the crash formatted as
36	core.major.minor.patchlevel separated by dots.
37
38rbbm-status
39	The current value of RBBM_STATUS which shows what top level GPU
40	components are in use at the time of crash.
41
42ringbuffer
43	Section containing the contents of each ringbuffer. Each ringbuffer is
44	identified with an id number.
45
46	id
47		Ringbuffer ID (0 based index).  Each ringbuffer in the section
48		will have its own unique id.
49	iova
50		GPU address of the ringbuffer.
51
52	last-fence
53		The last fence that was issued on the ringbuffer
54
55	retired-fence
56		The last fence retired on the ringbuffer.
57
58	rptr
59		The current read pointer (rptr) for the ringbuffer.
60
61	wptr
62		The current write pointer (wptr) for the ringbuffer.
63
64	size
65		Maximum size of the ringbuffer programmed in the hardware.
66
67	data
68		The contents of the ring encoded as ascii85.  Only the used
69		portions of the ring will be printed.
70
71bo
72	List of buffers from the hanging submission if available.
73	Each buffer object will have a uinque iova.
74
75	iova
76		GPU address of the buffer object.
77
78	size
79		Allocated size of the buffer object.
80
81	data
82		The contents of the buffer object encoded with ascii85.  Only
83		Trailing zeros at the end of the buffer will be skipped.
84
85registers
86	Set of registers values. Each entry is on its own line enclosed
87	by brackets { }.
88
89	offset
90		Byte offset of the register from the start of the
91		GPU memory region.
92
93	value
94		Hexadecimal value of the register.
95
96registers-hlsq
97		(5xx only) Register values from the HLSQ aperture.
98		Same format as the register section.
99