1*8ae1a4eeSAlex Deucher============== 2*8ae1a4eeSAlex DeucherAMDGPU DebugFS 3*8ae1a4eeSAlex Deucher============== 4*8ae1a4eeSAlex Deucher 5*8ae1a4eeSAlex DeucherThe amdgpu driver provides a number of debugfs files to aid in debugging 6*8ae1a4eeSAlex Deucherissues in the driver. These are usually found in 7*8ae1a4eeSAlex Deucher/sys/kernel/debug/dri/<num>. 8*8ae1a4eeSAlex Deucher 9*8ae1a4eeSAlex DeucherDebugFS Files 10*8ae1a4eeSAlex Deucher============= 11*8ae1a4eeSAlex Deucher 12*8ae1a4eeSAlex Deucheramdgpu_benchmark 13*8ae1a4eeSAlex Deucher---------------- 14*8ae1a4eeSAlex Deucher 15*8ae1a4eeSAlex DeucherRun benchmarks using the DMA engine the driver uses for GPU memory paging. 16*8ae1a4eeSAlex DeucherWrite a number to the file to run the test. The results are written to the 17*8ae1a4eeSAlex Deucherkernel log. VRAM is on device memory (dGPUs) or cave out (APUs) and GTT 18*8ae1a4eeSAlex Deucher(Graphics Translation Tables) is system memory that is accessible by the GPU. 19*8ae1a4eeSAlex DeucherThe following tests are available: 20*8ae1a4eeSAlex Deucher 21*8ae1a4eeSAlex Deucher- 1: simple test, VRAM to GTT and GTT to VRAM 22*8ae1a4eeSAlex Deucher- 2: simple test, VRAM to VRAM 23*8ae1a4eeSAlex Deucher- 3: GTT to VRAM, buffer size sweep, powers of 2 24*8ae1a4eeSAlex Deucher- 4: VRAM to GTT, buffer size sweep, powers of 2 25*8ae1a4eeSAlex Deucher- 5: VRAM to VRAM, buffer size sweep, powers of 2 26*8ae1a4eeSAlex Deucher- 6: GTT to VRAM, buffer size sweep, common display sizes 27*8ae1a4eeSAlex Deucher- 7: VRAM to GTT, buffer size sweep, common display sizes 28*8ae1a4eeSAlex Deucher- 8: VRAM to VRAM, buffer size sweep, common display sizes 29*8ae1a4eeSAlex Deucher 30*8ae1a4eeSAlex Deucheramdgpu_test_ib 31*8ae1a4eeSAlex Deucher-------------- 32*8ae1a4eeSAlex Deucher 33*8ae1a4eeSAlex DeucherRead this file to run simple IB (Indirect Buffer) tests on all kernel managed 34*8ae1a4eeSAlex Deucherrings. IBs are command buffers usually generated by userspace applications 35*8ae1a4eeSAlex Deucherwhich are submitted to the kernel for execution on an particular GPU engine. 36*8ae1a4eeSAlex DeucherThis just runs the simple IB tests included in the kernel. These tests 37*8ae1a4eeSAlex Deucherare engine specific and verify that IB submission works. 38*8ae1a4eeSAlex Deucher 39*8ae1a4eeSAlex Deucheramdgpu_discovery 40*8ae1a4eeSAlex Deucher---------------- 41*8ae1a4eeSAlex Deucher 42*8ae1a4eeSAlex DeucherProvides raw access to the IP discovery binary provided by the GPU. Read this 43*8ae1a4eeSAlex Deucherfile to access the raw binary. This is useful for verifying the contents of 44*8ae1a4eeSAlex Deucherthe IP discovery table. It is chip specific. 45*8ae1a4eeSAlex Deucher 46*8ae1a4eeSAlex Deucheramdgpu_vbios 47*8ae1a4eeSAlex Deucher------------ 48*8ae1a4eeSAlex Deucher 49*8ae1a4eeSAlex DeucherProvides raw access to the ROM binary image from the GPU. Read this file to 50*8ae1a4eeSAlex Deucheraccess the raw binary. This is useful for verifying the contents of the 51*8ae1a4eeSAlex Deuchervideo BIOS ROM. It is board specific. 52*8ae1a4eeSAlex Deucher 53*8ae1a4eeSAlex Deucheramdgpu_evict_gtt 54*8ae1a4eeSAlex Deucher---------------- 55*8ae1a4eeSAlex Deucher 56*8ae1a4eeSAlex DeucherEvict all buffers from the GTT memory pool. Read this file to evict all 57*8ae1a4eeSAlex Deucherbuffers from this pool. 58*8ae1a4eeSAlex Deucher 59*8ae1a4eeSAlex Deucheramdgpu_evict_vram 60*8ae1a4eeSAlex Deucher----------------- 61*8ae1a4eeSAlex Deucher 62*8ae1a4eeSAlex DeucherEvict all buffers from the VRAM memory pool. Read this file to evict all 63*8ae1a4eeSAlex Deucherbuffers from this pool. 64*8ae1a4eeSAlex Deucher 65*8ae1a4eeSAlex Deucheramdgpu_gpu_recover 66*8ae1a4eeSAlex Deucher------------------ 67*8ae1a4eeSAlex Deucher 68*8ae1a4eeSAlex DeucherTrigger a GPU reset. Read this file to trigger reset the entire GPU. 69*8ae1a4eeSAlex DeucherAll work currently running on the GPU will be lost. 70*8ae1a4eeSAlex Deucher 71*8ae1a4eeSAlex Deucheramdgpu_ring_<name> 72*8ae1a4eeSAlex Deucher------------------ 73*8ae1a4eeSAlex Deucher 74*8ae1a4eeSAlex DeucherProvides read access to the kernel managed ring buffers for each ring <name>. 75*8ae1a4eeSAlex DeucherThese are useful for debugging problems on a particular ring. The ring buffer 76*8ae1a4eeSAlex Deucheris how the CPU sends commands to the GPU. The CPU writes commands into the 77*8ae1a4eeSAlex Deucherbuffer and then asks the GPU engine to process it. This is the raw binary 78*8ae1a4eeSAlex Deuchercontents of the ring buffer. Use a tool like UMR to decode the rings into human 79*8ae1a4eeSAlex Deucherreadable form. 80*8ae1a4eeSAlex Deucher 81*8ae1a4eeSAlex Deucheramdgpu_mqd_<name> 82*8ae1a4eeSAlex Deucher----------------- 83*8ae1a4eeSAlex Deucher 84*8ae1a4eeSAlex DeucherProvides read access to the kernel managed MQD (Memory Queue Descriptor) for 85*8ae1a4eeSAlex Deucherring <name> managed by the kernel driver. MQDs define the features of the ring 86*8ae1a4eeSAlex Deucherand are used to store the ring's state when it is not connected to hardware. 87*8ae1a4eeSAlex DeucherThe driver writes the requested ring features and metadata (GPU addresses of 88*8ae1a4eeSAlex Deucherthe ring itself and associated buffers) to the MQD and the firmware uses the MQD 89*8ae1a4eeSAlex Deucherto populate the hardware when the ring is mapped to a hardware slot. Only 90*8ae1a4eeSAlex Deucheravailable on engines which use MQDs. This provides access to the raw MQD 91*8ae1a4eeSAlex Deucherbinary. 92*8ae1a4eeSAlex Deucher 93*8ae1a4eeSAlex Deucheramdgpu_error_<name> 94*8ae1a4eeSAlex Deucher------------------- 95*8ae1a4eeSAlex Deucher 96*8ae1a4eeSAlex DeucherProvides an interface to set an error code on the dma fences associated with 97*8ae1a4eeSAlex Deucherring <name>. The error code specified is propogated to all fences associated 98*8ae1a4eeSAlex Deucherwith the ring. Use this to inject a fence error into a ring. 99*8ae1a4eeSAlex Deucher 100*8ae1a4eeSAlex Deucheramdgpu_pm_info 101*8ae1a4eeSAlex Deucher-------------- 102*8ae1a4eeSAlex Deucher 103*8ae1a4eeSAlex DeucherProvides human readable information about the power management features 104*8ae1a4eeSAlex Deucherand state of the GPU. This includes current GFX clock, Memory clock, 105*8ae1a4eeSAlex Deuchervoltages, average SoC power, temperature, GFX load, Memory load, SMU 106*8ae1a4eeSAlex Deucherfeature mask, VCN power state, clock and power gating features. 107*8ae1a4eeSAlex Deucher 108*8ae1a4eeSAlex Deucheramdgpu_firmware_info 109*8ae1a4eeSAlex Deucher-------------------- 110*8ae1a4eeSAlex Deucher 111*8ae1a4eeSAlex DeucherLists the firmware versions for all firmwares used by the GPU. Only 112*8ae1a4eeSAlex Deucherentries with a non-0 version are valid. If the version is 0, the firmware 113*8ae1a4eeSAlex Deucheris not valid for the GPU. 114*8ae1a4eeSAlex Deucher 115*8ae1a4eeSAlex Deucheramdgpu_fence_info 116*8ae1a4eeSAlex Deucher----------------- 117*8ae1a4eeSAlex Deucher 118*8ae1a4eeSAlex DeucherShows the last signalled and emitted fence sequence numbers for each 119*8ae1a4eeSAlex Deucherkernel driver managed ring. Fences are associated with submissions 120*8ae1a4eeSAlex Deucherto the engine. Emitted fences have been submitted to the ring 121*8ae1a4eeSAlex Deucherand signalled fences have been signalled by the GPU. Rings with a 122*8ae1a4eeSAlex Deucherlarger emitted fence value have outstanding work that is still being 123*8ae1a4eeSAlex Deucherprocessed by the engine that owns that ring. When the emitted and 124*8ae1a4eeSAlex Deuchersignalled fence values are equal, the ring is idle. 125*8ae1a4eeSAlex Deucher 126*8ae1a4eeSAlex Deucheramdgpu_gem_info 127*8ae1a4eeSAlex Deucher--------------- 128*8ae1a4eeSAlex Deucher 129*8ae1a4eeSAlex DeucherLists all of the PIDs using the GPU and the GPU buffers that they have 130*8ae1a4eeSAlex Deucherallocated. This lists the buffer size, pool (VRAM, GTT, etc.), and buffer 131*8ae1a4eeSAlex Deucherattributes (CPU access required, CPU cache attributes, etc.). 132*8ae1a4eeSAlex Deucher 133*8ae1a4eeSAlex Deucheramdgpu_vm_info 134*8ae1a4eeSAlex Deucher-------------- 135*8ae1a4eeSAlex Deucher 136*8ae1a4eeSAlex DeucherLists all of the PIDs using the GPU and the GPU buffers that they have 137*8ae1a4eeSAlex Deucherallocated as well as the status of those buffers relative to that process' 138*8ae1a4eeSAlex DeucherGPU virtual address space (e.g., evicted, idle, invalidated, etc.). 139*8ae1a4eeSAlex Deucher 140*8ae1a4eeSAlex Deucheramdgpu_sa_info 141*8ae1a4eeSAlex Deucher-------------- 142*8ae1a4eeSAlex Deucher 143*8ae1a4eeSAlex DeucherPrints out all of the suballocations (sa) by the suballocation manager in the 144*8ae1a4eeSAlex Deucherkernel driver. Prints the GPU address, size, and fence info associated 145*8ae1a4eeSAlex Deucherwith each suballocation. The suballocations are used internally within 146*8ae1a4eeSAlex Deucherthe kernel driver for various things. 147*8ae1a4eeSAlex Deucher 148*8ae1a4eeSAlex Deucheramdgpu_<pool>_mm 149*8ae1a4eeSAlex Deucher---------------- 150*8ae1a4eeSAlex Deucher 151*8ae1a4eeSAlex DeucherPrints TTM information about the memory pool <pool>. 152*8ae1a4eeSAlex Deucher 153*8ae1a4eeSAlex Deucheramdgpu_vram 154*8ae1a4eeSAlex Deucher----------- 155*8ae1a4eeSAlex Deucher 156*8ae1a4eeSAlex DeucherProvides direct access to VRAM. Used by tools like UMR to inspect 157*8ae1a4eeSAlex Deucherobjects in VRAM. 158*8ae1a4eeSAlex Deucher 159*8ae1a4eeSAlex Deucheramdgpu_iomem 160*8ae1a4eeSAlex Deucher------------ 161*8ae1a4eeSAlex Deucher 162*8ae1a4eeSAlex DeucherProvides direct access to GTT memory. Used by tools like UMR to inspect 163*8ae1a4eeSAlex DeucherGTT memory. 164*8ae1a4eeSAlex Deucher 165*8ae1a4eeSAlex Deucheramdgpu_regs_* 166*8ae1a4eeSAlex Deucher------------- 167*8ae1a4eeSAlex Deucher 168*8ae1a4eeSAlex DeucherProvides direct access to various register aperatures on the GPU. Used 169*8ae1a4eeSAlex Deucherby tools like UMR to access GPU registers. 170*8ae1a4eeSAlex Deucher 171*8ae1a4eeSAlex Deucheramdgpu_regs2 172*8ae1a4eeSAlex Deucher------------ 173*8ae1a4eeSAlex Deucher 174*8ae1a4eeSAlex DeucherProvides an IOCTL interface used by UMR for interacting with GPU registers. 175*8ae1a4eeSAlex Deucher 176*8ae1a4eeSAlex Deucher 177*8ae1a4eeSAlex Deucheramdgpu_sensors 178*8ae1a4eeSAlex Deucher-------------- 179*8ae1a4eeSAlex Deucher 180*8ae1a4eeSAlex DeucherProvides an interface to query GPU power metrics (temperature, average 181*8ae1a4eeSAlex Deucherpower, etc.). Used by tools like UMR to query GPU power metrics. 182*8ae1a4eeSAlex Deucher 183*8ae1a4eeSAlex Deucher 184*8ae1a4eeSAlex Deucheramdgpu_gca_config 185*8ae1a4eeSAlex Deucher----------------- 186*8ae1a4eeSAlex Deucher 187*8ae1a4eeSAlex DeucherProvides an interface to query GPU details (Graphics/Compute Array config, 188*8ae1a4eeSAlex DeucherPCI config, GPU family, etc.). Used by tools like UMR to query GPU details. 189*8ae1a4eeSAlex Deucher 190*8ae1a4eeSAlex Deucheramdgpu_wave 191*8ae1a4eeSAlex Deucher----------- 192*8ae1a4eeSAlex Deucher 193*8ae1a4eeSAlex DeucherUsed to query GFX/compute wave information from the hardware. Used by tools 194*8ae1a4eeSAlex Deucherlike UMR to query GFX/compute wave information. 195*8ae1a4eeSAlex Deucher 196*8ae1a4eeSAlex Deucheramdgpu_gpr 197*8ae1a4eeSAlex Deucher---------- 198*8ae1a4eeSAlex Deucher 199*8ae1a4eeSAlex DeucherUsed to query GFX/compute GPR (General Purpose Register) information from the 200*8ae1a4eeSAlex Deucherhardware. Used by tools like UMR to query GPRs when debugging shaders. 201*8ae1a4eeSAlex Deucher 202*8ae1a4eeSAlex Deucheramdgpu_gprwave 203*8ae1a4eeSAlex Deucher-------------- 204*8ae1a4eeSAlex Deucher 205*8ae1a4eeSAlex DeucherProvides an IOCTL interface used by UMR for interacting with shader waves. 206*8ae1a4eeSAlex Deucher 207*8ae1a4eeSAlex Deucheramdgpu_fw_attestation 208*8ae1a4eeSAlex Deucher--------------------- 209*8ae1a4eeSAlex Deucher 210*8ae1a4eeSAlex DeucherProvides an interface for reading back firmware attestation records. 211