1547b822cSAlan TullFPGA Manager 2547b822cSAlan Tull============ 3547b822cSAlan Tull 4547b822cSAlan TullOverview 5547b822cSAlan Tull-------- 6547b822cSAlan Tull 7547b822cSAlan TullThe FPGA manager core exports a set of functions for programming an FPGA with 8547b822cSAlan Tullan image. The API is manufacturer agnostic. All manufacturer specifics are 9547b822cSAlan Tullhidden away in a low level driver which registers a set of ops with the core. 10547b822cSAlan TullThe FPGA image data itself is very manufacturer specific, but for our purposes 11547b822cSAlan Tullit's just binary data. The FPGA manager core won't parse it. 12547b822cSAlan Tull 13547b822cSAlan TullThe FPGA image to be programmed can be in a scatter gather list, a single 14547b822cSAlan Tullcontiguous buffer, or a firmware file. Because allocating contiguous kernel 15547b822cSAlan Tullmemory for the buffer should be avoided, users are encouraged to use a scatter 16547b822cSAlan Tullgather list instead if possible. 17547b822cSAlan Tull 18547b822cSAlan TullThe particulars for programming the image are presented in a structure (struct 19547b822cSAlan Tullfpga_image_info). This struct contains parameters such as pointers to the 20547b822cSAlan TullFPGA image as well as image-specific particulars such as whether the image was 21547b822cSAlan Tullbuilt for full or partial reconfiguration. 22547b822cSAlan Tull 23547b822cSAlan TullHow to support a new FPGA device 24547b822cSAlan Tull-------------------------------- 25547b822cSAlan Tull 26547b822cSAlan TullTo add another FPGA manager, write a driver that implements a set of ops. The 274ba0b2c2SRuss Weightprobe function calls fpga_mgr_register() or fpga_mgr_register_full(), such as:: 28547b822cSAlan Tull 29547b822cSAlan Tull static const struct fpga_manager_ops socfpga_fpga_ops = { 30547b822cSAlan Tull .write_init = socfpga_fpga_ops_configure_init, 31547b822cSAlan Tull .write = socfpga_fpga_ops_configure_write, 32547b822cSAlan Tull .write_complete = socfpga_fpga_ops_configure_complete, 33547b822cSAlan Tull .state = socfpga_fpga_ops_state, 34547b822cSAlan Tull }; 35547b822cSAlan Tull 36547b822cSAlan Tull static int socfpga_fpga_probe(struct platform_device *pdev) 37547b822cSAlan Tull { 38547b822cSAlan Tull struct device *dev = &pdev->dev; 39547b822cSAlan Tull struct socfpga_fpga_priv *priv; 40547b822cSAlan Tull struct fpga_manager *mgr; 41547b822cSAlan Tull int ret; 42547b822cSAlan Tull 43547b822cSAlan Tull priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 44547b822cSAlan Tull if (!priv) 45547b822cSAlan Tull return -ENOMEM; 46547b822cSAlan Tull 47547b822cSAlan Tull /* 48547b822cSAlan Tull * do ioremaps, get interrupts, etc. and save 49547b822cSAlan Tull * them in priv 50547b822cSAlan Tull */ 51547b822cSAlan Tull 524ba0b2c2SRuss Weight mgr = fpga_mgr_register(dev, "Altera SOCFPGA FPGA Manager", 53547b822cSAlan Tull &socfpga_fpga_ops, priv); 544ba0b2c2SRuss Weight if (IS_ERR(mgr)) 554ba0b2c2SRuss Weight return PTR_ERR(mgr); 56547b822cSAlan Tull 57547b822cSAlan Tull platform_set_drvdata(pdev, mgr); 58547b822cSAlan Tull 594ba0b2c2SRuss Weight return 0; 60547b822cSAlan Tull } 61547b822cSAlan Tull 62547b822cSAlan Tull static int socfpga_fpga_remove(struct platform_device *pdev) 63547b822cSAlan Tull { 64547b822cSAlan Tull struct fpga_manager *mgr = platform_get_drvdata(pdev); 65547b822cSAlan Tull 66547b822cSAlan Tull fpga_mgr_unregister(mgr); 67547b822cSAlan Tull 68547b822cSAlan Tull return 0; 69547b822cSAlan Tull } 70547b822cSAlan Tull 714ba0b2c2SRuss WeightAlternatively, the probe function could call one of the resource managed 724ba0b2c2SRuss Weightregister functions, devm_fpga_mgr_register() or devm_fpga_mgr_register_full(). 734ba0b2c2SRuss WeightWhen these functions are used, the parameter syntax is the same, but the call 744ba0b2c2SRuss Weightto fpga_mgr_unregister() should be removed. In the above example, the 754ba0b2c2SRuss Weightsocfpga_fpga_remove() function would not be required. 76547b822cSAlan Tull 77547b822cSAlan TullThe ops will implement whatever device specific register writes are needed to 78547b822cSAlan Tulldo the programming sequence for this particular FPGA. These ops return 0 for 79547b822cSAlan Tullsuccess or negative error codes otherwise. 80547b822cSAlan Tull 81547b822cSAlan TullThe programming sequence is:: 82*288cc44bSIvan Bornyakov 1. .parse_header (optional, may be called once or multiple times) 83*288cc44bSIvan Bornyakov 2. .write_init 84*288cc44bSIvan Bornyakov 3. .write or .write_sg (may be called once or multiple times) 85*288cc44bSIvan Bornyakov 4. .write_complete 86*288cc44bSIvan Bornyakov 87*288cc44bSIvan BornyakovThe .parse_header function will set header_size and data_size to 88*288cc44bSIvan Bornyakovstruct fpga_image_info. Before parse_header call, header_size is initialized 89*288cc44bSIvan Bornyakovwith initial_header_size. If flag skip_header of fpga_manager_ops is true, 90*288cc44bSIvan Bornyakov.write function will get image buffer starting at header_size offset from the 91*288cc44bSIvan Bornyakovbeginning. If data_size is set, .write function will get data_size bytes of 92*288cc44bSIvan Bornyakovthe image buffer, otherwise .write will get data up to the end of image buffer. 93*288cc44bSIvan BornyakovThis will not affect .write_sg, .write_sg will still get whole image in 94*288cc44bSIvan Bornyakovsg_table form. If FPGA image is already mapped as a single contiguous buffer, 95*288cc44bSIvan Bornyakovwhole buffer will be passed into .parse_header. If image is in scatter-gather 96*288cc44bSIvan Bornyakovform, core code will buffer up at least .initial_header_size before the first 97*288cc44bSIvan Bornyakovcall of .parse_header, if it is not enough, .parse_header should set desired 98*288cc44bSIvan Bornyakovsize into info->header_size and return -EAGAIN, then it will be called again 99*288cc44bSIvan Bornyakovwith greater part of image buffer on the input. 100547b822cSAlan Tull 101547b822cSAlan TullThe .write_init function will prepare the FPGA to receive the image data. The 102*288cc44bSIvan Bornyakovbuffer passed into .write_init will be at least info->header_size bytes long; 103547b822cSAlan Tullif the whole bitstream is not immediately available then the core code will 104547b822cSAlan Tullbuffer up at least this much before starting. 105547b822cSAlan Tull 106547b822cSAlan TullThe .write function writes a buffer to the FPGA. The buffer may be contain the 107547b822cSAlan Tullwhole FPGA image or may be a smaller chunk of an FPGA image. In the latter 108547b822cSAlan Tullcase, this function is called multiple times for successive chunks. This interface 109547b822cSAlan Tullis suitable for drivers which use PIO. 110547b822cSAlan Tull 111547b822cSAlan TullThe .write_sg version behaves the same as .write except the input is a sg_table 112547b822cSAlan Tullscatter list. This interface is suitable for drivers which use DMA. 113547b822cSAlan Tull 114547b822cSAlan TullThe .write_complete function is called after all the image has been written 115547b822cSAlan Tullto put the FPGA into operating mode. 116547b822cSAlan Tull 117a59f95c7SAlan TullThe ops include a .state function which will determine the state the FPGA is in 118a59f95c7SAlan Tulland return a code of type enum fpga_mgr_states. It doesn't result in a change 119a59f95c7SAlan Tullin state. 120547b822cSAlan Tull 121547b822cSAlan TullAPI for implementing a new FPGA Manager driver 122547b822cSAlan Tull---------------------------------------------- 123547b822cSAlan Tull 124758f7467SMauro Carvalho Chehab* ``fpga_mgr_states`` - Values for :c:expr:`fpga_manager->state`. 125758f7467SMauro Carvalho Chehab* struct fpga_manager - the FPGA manager struct 126758f7467SMauro Carvalho Chehab* struct fpga_manager_ops - Low level FPGA manager driver ops 1274ba0b2c2SRuss Weight* struct fpga_manager_info - Parameter structure for fpga_mgr_register_full() 1284ba0b2c2SRuss Weight* fpga_mgr_register_full() - Create and register an FPGA manager using the 1294ba0b2c2SRuss Weight fpga_mgr_info structure to provide the full flexibility of options 1304ba0b2c2SRuss Weight* fpga_mgr_register() - Create and register an FPGA manager using standard 1314ba0b2c2SRuss Weight arguments 1324ba0b2c2SRuss Weight* devm_fpga_mgr_register_full() - Resource managed version of 1334ba0b2c2SRuss Weight fpga_mgr_register_full() 1344ba0b2c2SRuss Weight* devm_fpga_mgr_register() - Resource managed version of fpga_mgr_register() 135758f7467SMauro Carvalho Chehab* fpga_mgr_unregister() - Unregister an FPGA manager 1364a6ff3c9SAlan Tull 1374a6ff3c9SAlan Tull.. kernel-doc:: include/linux/fpga/fpga-mgr.h 1384a6ff3c9SAlan Tull :functions: fpga_mgr_states 1394a6ff3c9SAlan Tull 140547b822cSAlan Tull.. kernel-doc:: include/linux/fpga/fpga-mgr.h 141547b822cSAlan Tull :functions: fpga_manager 142547b822cSAlan Tull 143547b822cSAlan Tull.. kernel-doc:: include/linux/fpga/fpga-mgr.h 144547b822cSAlan Tull :functions: fpga_manager_ops 145547b822cSAlan Tull 1464ba0b2c2SRuss Weight.. kernel-doc:: include/linux/fpga/fpga-mgr.h 1474ba0b2c2SRuss Weight :functions: fpga_manager_info 1484ba0b2c2SRuss Weight 149547b822cSAlan Tull.. kernel-doc:: drivers/fpga/fpga-mgr.c 1504ba0b2c2SRuss Weight :functions: fpga_mgr_register_full 151084181feSAlan Tull 152084181feSAlan Tull.. kernel-doc:: drivers/fpga/fpga-mgr.c 153547b822cSAlan Tull :functions: fpga_mgr_register 154547b822cSAlan Tull 155547b822cSAlan Tull.. kernel-doc:: drivers/fpga/fpga-mgr.c 1564ba0b2c2SRuss Weight :functions: devm_fpga_mgr_register_full 1574ba0b2c2SRuss Weight 1584ba0b2c2SRuss Weight.. kernel-doc:: drivers/fpga/fpga-mgr.c 1594ba0b2c2SRuss Weight :functions: devm_fpga_mgr_register 1604ba0b2c2SRuss Weight 1614ba0b2c2SRuss Weight.. kernel-doc:: drivers/fpga/fpga-mgr.c 162547b822cSAlan Tull :functions: fpga_mgr_unregister 163