xref: /linux/Documentation/devicetree/bindings/watchdog/xlnx,xps-timebase-wdt.yaml (revision dc1f12b916005e1a1a908fbfcded356634a07038)
1*dc1f12b9SSrinivas Neeli# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
2*dc1f12b9SSrinivas Neeli%YAML 1.2
3*dc1f12b9SSrinivas Neeli---
4*dc1f12b9SSrinivas Neeli$id: http://devicetree.org/schemas/watchdog/xlnx,xps-timebase-wdt.yaml#
5*dc1f12b9SSrinivas Neeli$schema: http://devicetree.org/meta-schemas/core.yaml#
6*dc1f12b9SSrinivas Neeli
7*dc1f12b9SSrinivas Neelititle: Xilinx AXI/PLB softcore and window Watchdog Timer
8*dc1f12b9SSrinivas Neeli
9*dc1f12b9SSrinivas Neelimaintainers:
10*dc1f12b9SSrinivas Neeli  - Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
11*dc1f12b9SSrinivas Neeli  - Srinivas Neeli <srinivas.neeli@xilinx.com>
12*dc1f12b9SSrinivas Neeli
13*dc1f12b9SSrinivas Neelidescription:
14*dc1f12b9SSrinivas Neeli  The Timebase watchdog timer(WDT) is a free-running 32 bit counter.
15*dc1f12b9SSrinivas Neeli  WDT uses a dual-expiration architecture. After one expiration of
16*dc1f12b9SSrinivas Neeli  the timeout interval, an interrupt is generated and the WDT state
17*dc1f12b9SSrinivas Neeli  bit is set to one in the status register. If the state bit is not
18*dc1f12b9SSrinivas Neeli  cleared (by writing a one to the state bit) before the next
19*dc1f12b9SSrinivas Neeli  expiration of the timeout interval, a WDT reset is generated.
20*dc1f12b9SSrinivas Neeli
21*dc1f12b9SSrinivas NeeliallOf:
22*dc1f12b9SSrinivas Neeli  - $ref: watchdog.yaml#
23*dc1f12b9SSrinivas Neeli
24*dc1f12b9SSrinivas Neeliproperties:
25*dc1f12b9SSrinivas Neeli  compatible:
26*dc1f12b9SSrinivas Neeli    enum:
27*dc1f12b9SSrinivas Neeli      - xlnx,xps-timebase-wdt-1.01.a
28*dc1f12b9SSrinivas Neeli      - xlnx,xps-timebase-wdt-1.00.a
29*dc1f12b9SSrinivas Neeli
30*dc1f12b9SSrinivas Neeli  reg:
31*dc1f12b9SSrinivas Neeli    maxItems: 1
32*dc1f12b9SSrinivas Neeli
33*dc1f12b9SSrinivas Neeli  clocks:
34*dc1f12b9SSrinivas Neeli    maxItems: 1
35*dc1f12b9SSrinivas Neeli
36*dc1f12b9SSrinivas Neeli  clock-frequency:
37*dc1f12b9SSrinivas Neeli    description: Frequency of clock in Hz
38*dc1f12b9SSrinivas Neeli
39*dc1f12b9SSrinivas Neeli  xlnx,wdt-interval:
40*dc1f12b9SSrinivas Neeli    $ref: /schemas/types.yaml#/definitions/uint32
41*dc1f12b9SSrinivas Neeli    description: Watchdog timeout interval
42*dc1f12b9SSrinivas Neeli    minimum: 8
43*dc1f12b9SSrinivas Neeli    maximum: 32
44*dc1f12b9SSrinivas Neeli
45*dc1f12b9SSrinivas Neeli  xlnx,wdt-enable-once:
46*dc1f12b9SSrinivas Neeli    $ref: /schemas/types.yaml#/definitions/uint32
47*dc1f12b9SSrinivas Neeli    enum: [0, 1]
48*dc1f12b9SSrinivas Neeli    description: If watchdog is configured as enable once,
49*dc1f12b9SSrinivas Neeli                 then the watchdog cannot be disabled after
50*dc1f12b9SSrinivas Neeli                 it has been enabled.
51*dc1f12b9SSrinivas Neeli
52*dc1f12b9SSrinivas Neelirequired:
53*dc1f12b9SSrinivas Neeli  - compatible
54*dc1f12b9SSrinivas Neeli  - reg
55*dc1f12b9SSrinivas Neeli
56*dc1f12b9SSrinivas NeeliunevaluatedProperties: false
57*dc1f12b9SSrinivas Neeli
58*dc1f12b9SSrinivas Neeliexamples:
59*dc1f12b9SSrinivas Neeli  - |
60*dc1f12b9SSrinivas Neeli    watchdog@40100000 {
61*dc1f12b9SSrinivas Neeli      compatible = "xlnx,xps-timebase-wdt-1.00.a";
62*dc1f12b9SSrinivas Neeli      reg = <0x40100000 0x1000>;
63*dc1f12b9SSrinivas Neeli      clock-frequency = <50000000>;
64*dc1f12b9SSrinivas Neeli      clocks = <&clkc 15>;
65*dc1f12b9SSrinivas Neeli      xlnx,wdt-enable-once = <0x0>;
66*dc1f12b9SSrinivas Neeli      xlnx,wdt-interval = <0x1b>;
67*dc1f12b9SSrinivas Neeli    };
68*dc1f12b9SSrinivas Neeli...
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