1*e81e57feSBharat Bhushan# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*e81e57feSBharat Bhushan%YAML 1.2 3*e81e57feSBharat Bhushan--- 4*e81e57feSBharat Bhushan$id: http://devicetree.org/schemas/watchdog/marvell,cn10624-wdt.yaml# 5*e81e57feSBharat Bhushan$schema: http://devicetree.org/meta-schemas/core.yaml# 6*e81e57feSBharat Bhushan 7*e81e57feSBharat Bhushantitle: Marvell Global Timer (GTI) system watchdog 8*e81e57feSBharat Bhushan 9*e81e57feSBharat Bhushanmaintainers: 10*e81e57feSBharat Bhushan - Bharat Bhushan <bbhushan2@marvell.com> 11*e81e57feSBharat Bhushan 12*e81e57feSBharat BhushanallOf: 13*e81e57feSBharat Bhushan - $ref: watchdog.yaml# 14*e81e57feSBharat Bhushan 15*e81e57feSBharat Bhushanproperties: 16*e81e57feSBharat Bhushan compatible: 17*e81e57feSBharat Bhushan oneOf: 18*e81e57feSBharat Bhushan - enum: 19*e81e57feSBharat Bhushan - marvell,cn9670-wdt 20*e81e57feSBharat Bhushan - marvell,cn10624-wdt 21*e81e57feSBharat Bhushan 22*e81e57feSBharat Bhushan - items: 23*e81e57feSBharat Bhushan - enum: 24*e81e57feSBharat Bhushan - marvell,cn9880-wdt 25*e81e57feSBharat Bhushan - marvell,cnf9535-wdt 26*e81e57feSBharat Bhushan - const: marvell,cn9670-wdt 27*e81e57feSBharat Bhushan 28*e81e57feSBharat Bhushan - items: 29*e81e57feSBharat Bhushan - enum: 30*e81e57feSBharat Bhushan - marvell,cn10308-wdt 31*e81e57feSBharat Bhushan - marvell,cnf10518-wdt 32*e81e57feSBharat Bhushan - const: marvell,cn10624-wdt 33*e81e57feSBharat Bhushan 34*e81e57feSBharat Bhushan reg: 35*e81e57feSBharat Bhushan maxItems: 1 36*e81e57feSBharat Bhushan 37*e81e57feSBharat Bhushan interrupts: 38*e81e57feSBharat Bhushan maxItems: 1 39*e81e57feSBharat Bhushan 40*e81e57feSBharat Bhushan clocks: 41*e81e57feSBharat Bhushan maxItems: 1 42*e81e57feSBharat Bhushan 43*e81e57feSBharat Bhushan clock-names: 44*e81e57feSBharat Bhushan items: 45*e81e57feSBharat Bhushan - const: refclk 46*e81e57feSBharat Bhushan 47*e81e57feSBharat Bhushan marvell,wdt-timer-index: 48*e81e57feSBharat Bhushan $ref: /schemas/types.yaml#/definitions/uint32 49*e81e57feSBharat Bhushan minimum: 0 50*e81e57feSBharat Bhushan maximum: 63 51*e81e57feSBharat Bhushan description: 52*e81e57feSBharat Bhushan An SoC have many timers (up to 64), firmware can reserve one or more timer 53*e81e57feSBharat Bhushan for some other use case and configures one of the global timer as watchdog 54*e81e57feSBharat Bhushan timer. Firmware will update this field with the timer number configured 55*e81e57feSBharat Bhushan as watchdog timer. 56*e81e57feSBharat Bhushan 57*e81e57feSBharat Bhushanrequired: 58*e81e57feSBharat Bhushan - compatible 59*e81e57feSBharat Bhushan - reg 60*e81e57feSBharat Bhushan - interrupts 61*e81e57feSBharat Bhushan - clocks 62*e81e57feSBharat Bhushan - clock-names 63*e81e57feSBharat Bhushan 64*e81e57feSBharat BhushanunevaluatedProperties: false 65*e81e57feSBharat Bhushan 66*e81e57feSBharat Bhushanexamples: 67*e81e57feSBharat Bhushan - | 68*e81e57feSBharat Bhushan #include <dt-bindings/interrupt-controller/arm-gic.h> 69*e81e57feSBharat Bhushan soc { 70*e81e57feSBharat Bhushan #address-cells = <2>; 71*e81e57feSBharat Bhushan #size-cells = <2>; 72*e81e57feSBharat Bhushan 73*e81e57feSBharat Bhushan watchdog@802000040000 { 74*e81e57feSBharat Bhushan compatible = "marvell,cn9670-wdt"; 75*e81e57feSBharat Bhushan reg = <0x00008020 0x00040000 0x00000000 0x00020000>; 76*e81e57feSBharat Bhushan interrupts = <GIC_SPI 38 IRQ_TYPE_EDGE_RISING>; 77*e81e57feSBharat Bhushan clocks = <&sclk>; 78*e81e57feSBharat Bhushan clock-names = "refclk"; 79*e81e57feSBharat Bhushan marvell,wdt-timer-index = <63>; 80*e81e57feSBharat Bhushan }; 81*e81e57feSBharat Bhushan }; 82*e81e57feSBharat Bhushan 83*e81e57feSBharat Bhushan... 84