1*fdd81e90SShresth Prasad# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*fdd81e90SShresth Prasad%YAML 1.2 3*fdd81e90SShresth Prasad--- 4*fdd81e90SShresth Prasad$id: http://devicetree.org/schemas/watchdog/img,pdc-wdt.yaml# 5*fdd81e90SShresth Prasad$schema: http://devicetree.org/meta-schemas/core.yaml# 6*fdd81e90SShresth Prasad 7*fdd81e90SShresth Prasadtitle: ImgTec PowerDown Controller (PDC) Watchdog Timer (WDT) 8*fdd81e90SShresth Prasad 9*fdd81e90SShresth Prasadmaintainers: 10*fdd81e90SShresth Prasad - Shresth Prasad <shresthprasad7@gmail.com> 11*fdd81e90SShresth Prasad 12*fdd81e90SShresth PrasadallOf: 13*fdd81e90SShresth Prasad - $ref: watchdog.yaml# 14*fdd81e90SShresth Prasad 15*fdd81e90SShresth Prasadproperties: 16*fdd81e90SShresth Prasad compatible: 17*fdd81e90SShresth Prasad enum: 18*fdd81e90SShresth Prasad - img,pdc-wdt 19*fdd81e90SShresth Prasad 20*fdd81e90SShresth Prasad reg: 21*fdd81e90SShresth Prasad maxItems: 1 22*fdd81e90SShresth Prasad 23*fdd81e90SShresth Prasad clocks: 24*fdd81e90SShresth Prasad items: 25*fdd81e90SShresth Prasad - description: watchdog counter clock 26*fdd81e90SShresth Prasad - description: register interface clock 27*fdd81e90SShresth Prasad 28*fdd81e90SShresth Prasad clock-names: 29*fdd81e90SShresth Prasad items: 30*fdd81e90SShresth Prasad - const: wdt 31*fdd81e90SShresth Prasad - const: sys 32*fdd81e90SShresth Prasad 33*fdd81e90SShresth Prasad interrupts: 34*fdd81e90SShresth Prasad maxItems: 1 35*fdd81e90SShresth Prasad 36*fdd81e90SShresth Prasadrequired: 37*fdd81e90SShresth Prasad - compatible 38*fdd81e90SShresth Prasad - reg 39*fdd81e90SShresth Prasad - clocks 40*fdd81e90SShresth Prasad - clock-names 41*fdd81e90SShresth Prasad - interrupts 42*fdd81e90SShresth Prasad 43*fdd81e90SShresth PrasadunevaluatedProperties: false 44*fdd81e90SShresth Prasad 45*fdd81e90SShresth Prasadexamples: 46*fdd81e90SShresth Prasad - | 47*fdd81e90SShresth Prasad #include <dt-bindings/interrupt-controller/irq.h> 48*fdd81e90SShresth Prasad 49*fdd81e90SShresth Prasad watchdog@18102100 { 50*fdd81e90SShresth Prasad compatible = "img,pdc-wdt"; 51*fdd81e90SShresth Prasad reg = <0x18102100 0x100>; 52*fdd81e90SShresth Prasad clocks = <&pdc_wdt_clk>, <&sys_clk>; 53*fdd81e90SShresth Prasad clock-names = "wdt", "sys"; 54*fdd81e90SShresth Prasad interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>; 55*fdd81e90SShresth Prasad }; 56