xref: /linux/Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.yaml (revision dec1c62e91ba268ab2a6e339d4d7a59287d5eba1) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/watchdog/fsl-imx7ulp-wdt.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale i.MX7ULP Watchdog Timer (WDT) Controller
8
9maintainers:
10  - Anson Huang <Anson.Huang@nxp.com>
11
12allOf:
13  - $ref: "watchdog.yaml#"
14
15properties:
16  compatible:
17    oneOf:
18      - const: fsl,imx7ulp-wdt
19      - items:
20          - const: fsl,imx8ulp-wdt
21          - const: fsl,imx7ulp-wdt
22      - const: fsl,imx93-wdt
23
24  reg:
25    maxItems: 1
26
27  interrupts:
28    maxItems: 1
29
30  clocks:
31    maxItems: 1
32
33  timeout-sec: true
34
35required:
36  - compatible
37  - interrupts
38  - reg
39  - clocks
40
41additionalProperties: false
42
43examples:
44  - |
45    #include <dt-bindings/interrupt-controller/arm-gic.h>
46    #include <dt-bindings/clock/imx7ulp-clock.h>
47
48    watchdog@403d0000 {
49        compatible = "fsl,imx7ulp-wdt";
50        reg = <0x403d0000 0x10000>;
51        interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
52        clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
53        assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
54        assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
55        timeout-sec = <40>;
56    };
57
58...
59