xref: /linux/Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.yaml (revision c94cd9508b1335b949fd13ebd269313c65492df0)
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/watchdog/fsl-imx7ulp-wdt.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale i.MX7ULP Watchdog Timer (WDT) Controller
8
9maintainers:
10  - Shawn Guo <shawnguo@kernel.org>
11  - Sascha Hauer <s.hauer@pengutronix.de>
12  - Fabio Estevam <festevam@gmail.com>
13
14allOf:
15  - $ref: watchdog.yaml#
16
17properties:
18  compatible:
19    oneOf:
20      - const: fsl,imx7ulp-wdt
21      - items:
22          - const: fsl,imx8ulp-wdt
23          - const: fsl,imx7ulp-wdt
24      - const: fsl,imx93-wdt
25
26  reg:
27    maxItems: 1
28
29  interrupts:
30    maxItems: 1
31
32  clocks:
33    maxItems: 1
34
35  fsl,ext-reset-output:
36    description:
37      When set, wdog can generate external reset from the wdog_any pin.
38    type: boolean
39
40required:
41  - compatible
42  - interrupts
43  - reg
44  - clocks
45
46unevaluatedProperties: false
47
48examples:
49  - |
50    #include <dt-bindings/interrupt-controller/arm-gic.h>
51    #include <dt-bindings/clock/imx7ulp-clock.h>
52
53    watchdog@403d0000 {
54        compatible = "fsl,imx7ulp-wdt";
55        reg = <0x403d0000 0x10000>;
56        interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
57        clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
58        assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
59        assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
60        timeout-sec = <40>;
61    };
62
63...
64